Cleanup

Changelog:

• MLVDS S2M clock detection now relies on the main 125MHz aurora clock, (NO HARDWARE TESTS DONE, ONLY PROVEN ON SIMULATION)
• remove debug attributes from the overall project
• Make sure VIO shows signal names on the Vivado Hardware Manager
• Remove MLVDS Enable VIO output. MLVDS transceivers are now enabled as soon as FPGA wakes up

assigned to @michael.randall

added 5 commits

• 43d52912 - wip: revised clock detector
• 0b7fbedd - fix: add asynchronous reset to sensitivity list
• 9024dce6 - wip: add synchronizer for external motor status signals
• 55cc385c - fix: missing timing exceptions
• e426402f - wip: remove debugging signal

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added 1 commit

• 6f5cf64e - fix: buffer overflow on A7-to-K7 direction of Aurora

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added 1 commit

• 5022c0c3 - wip: write documentation for the motion control software

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approved this merge request

mentioned in commit 52285807

merged