Create trigger signals for external device

Creation of an I/O control module (pseudo module) that generates suitable trigger signals from single clock cycle events and other status signals and manages inputs/outputs of GPIO ports and MLVDS lanes.

requested review from @cagil.guemues

assigned to @michael.randall

added 1 commit

• 4170b1b5 - chore: relocate io control doc inside main project doc, remove unused files,...

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merged

mentioned in commit d4c331b5