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Commit 07e463b9 authored by Patrick Robbe's avatar Patrick Robbe
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Driver/pcie40_driver/pcie40_dma_regmap.h deleted 100644 → 0
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− 86
View file @ b6008ec2
// This output was generated by the following command:
// ../common/regmap_cfg_to_h.tcl P40_ ../common/pcie40_dma_regmap.cfg
// Do not edit this file manually, your changes will be overwritten by the generator.
#ifndef P40_REGMAP_H
#define P40_REGMAP_H
static const int P40_DMA_REGMAP_VERSION = 0x20170424;
static const int P40_DMA_CTRL_OFF_INBUF_SIZE = 0x0A0;
static const int P40_DMA_CTRL_OFF_META_EVID_HI = 0x034;
static const int P40_DMA_CTRL_OFF_VERSION = 0x008;
static const int P40_DMA_CTRL_OFF_MAIN_EVID_LO = 0x024;
static const int P40_DMA_CTRL_OFF_MAIN_MSI_CYCLES = 0x08C;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_HI = 0x0E0;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_CYCLES = 0x0D8;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_LO = 0x0D0;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_CYCLES = 0x0CC;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_HI = 0x0B4;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_LO = 0x0E4;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_HI = 0x0C8;
static const int P40_DMA_CTRL_OFF_TRUNC_THRES = 0x0A8;
static const int P40_DMA_CTRL_OFF_RWTEST = 0x000;
static const int P40_DMA_CTRL_OFF_PCIE_GEN = 0x080;
static const int P40_DMA_CTRL_OFF_INBUF_FILL = 0x0A4;
static const int P40_DMA_CTRL_OFF_CHIP_ID_LO = 0x044;
static const int P40_DMA_CTRL_OFF_LINK_ID = 0x00C;
static const int P40_DMA_CTRL_OFF_ERROR = 0x014;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_LO = 0x0BC;
static const int P40_DMA_CTRL_OFF_ODIN_EVID_LO = 0x03C;
static const int P40_DMA_CTRL_OFF_META_PACKING = 0x02C;
static const int P40_DMA_CTRL_OFF_RESET = 0x010;
static const int P40_DMA_CTRL_OFF_MAIN_EVID_HI = 0x028;
static const int P40_DMA_CTRL_BASE_DAQ_MAIN_STREAM = 0x100;
static const int P40_DMA_CTRL_OFF_META_MSI_BYTES = 0x090;
static const int P40_DMA_CTRL_OFF_MSI_MODE = 0x084;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_HI = 0x0D4;
static const int P40_DMA_CTRL_OFF_MAIN_GEN_FIXED = 0x01C;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_HI = 0x0E8;
static const int P40_DMA_CTRL_OFF_CHIP_ID_HI = 0x048;
static const int P40_DMA_CTRL_OFF_META_EVID_LO = 0x030;
static const int P40_DMA_CTRL_OFF_MAIN_GEN_CTL = 0x018;
static const int P40_DMA_CTRL_OFF_META_MSI_CYCLES = 0x094;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_LO = 0x0DC;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_HI = 0x0C0;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_CYCLES = 0x0B8;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_LO = 0x0B0;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_CYCLES = 0x0AC;
static const int P40_DMA_CTRL_OFF_ODIN_EVID_HI = 0x040;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_LO = 0x0C4;
static const int P40_DMA_CTRL_OFF_MAIN_RAW_MODE = 0x020;
static const int P40_DMA_CTRL_OFF_MAIN_MSI_BYTES = 0x088;
static const int P40_DMA_CTRL_OFF_META_MSI_BLOCKS = 0x098;
static const int P40_DMA_CTRL_OFF_REGMAP = 0x004;
static const int P40_DMA_CTRL_OFF_ODIN_GEN_CTL = 0x038;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_LO = 0x24;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_BYTES = 0x0C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_HI = 0x1C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_HI = 0x28;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_WRITE_OFF = 0x2C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_BYTES = 0x14;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_READ_OFF = 0x30;
static const int P40_DMA_DAQ_STREAM_OFF_ENABLE = 0x00;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_PAGES = 0x38;
static const int P40_DMA_DAQ_STREAM_OFF_FLUSH = 0x08;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS = 0x10;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_LO = 0x18;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_ENTRIES = 0x34;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_FILL_BYTES = 0x20;
static const int P40_DMA_DAQ_STREAM_OFF_READY = 0x04;
static const int P40_DMA_CTRL_QSYS_BASE = 0x1000;
static const int P40_DMA_DAQ_MAIN_STREAM_QSYS_BASE = 0x1100;
static const int P40_DMA_DAQ_MAIN_MAP_QSYS_BASE = 0x10000;
static const int P40_DMA_DAQ_MAIN_BUF_QSYS_BASE = 0x100000;
static const int P40_DMA_DAQ_META_STREAM_QSYS_BASE = 0x0400;
static const int P40_DMA_DAQ_META_MAP_QSYS_BASE = 0x20000;
static const int P40_DMA_DAQ_META_BUF_QSYS_BASE = 0x200000;
#endif//P40_REGMAP_H
Driver/pcie40_driver/pcie40_ioctl.h deleted 100644 → 0
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− 91
View file @ b6008ec2
#ifndef __PCIE40_IOCTL_H
#define __PCIE40_IOCTL_H
//ioctl.pcie``+
#define P40_CTRL_GET_RWTEST _IOR('c', 1, uint64_t)//+`P40_CTRL_GET_RWTEST` ?>
#define P40_CTRL_SET_RWTEST _IOW('c', 2, uint64_t)//+`P40_CTRL_SET_RWTEST` ?>
#define P40_CTRL_GET_VERSION _IOR('c', 3, uint64_t)//+`P40_CTRL_GET_VERSION` ?>
#define P40_CTRL_GET_LINK_ID _IOR('c', 4, uint64_t)//+`P40_CTRL_GET_LINK_ID` ?>
#define P40_CTRL_GET_CHIP_ID _IOR('c', 5, uint64_t)//+`P40_CTRL_GET_CHIP_ID` ?>
#define P40_CTRL_GET_ERROR _IOR('c', 6, uint64_t)//+`P40_CTRL_GET_ERROR` ?>
#define P40_CTRL_GET_RESET _IOR('c', 7, uint64_t)//+`P40_CTRL_GET_RESET` ?>
#define P40_CTRL_SET_RESET _IOW('c', 8, uint64_t)//+`P40_CTRL_SET_RESET` ?>
#define P40_RST_BIT_DEFAULT (0)
#define P40_RST_BIT_LOGIC (1)
#define P40_RST_BIT_FLUSH (2)
#define P40_RST_BIT_COUNTERS (3)
#define P40_CTRL_GET_MAIN_GEN_CTL _IOR('c', 9, uint64_t)//+`P40_CTRL_GET_MAIN_GEN_CTL` ?>
#define P40_CTRL_SET_MAIN_GEN_CTL _IOW('c', 10, uint64_t)//+`P40_CTRL_SET_MAIN_GEN_CTL` ?>
#define P40_MAIN_GEN_BIT_ENABLE (0)
#define P40_MAIN_GEN_BIT_RUNNING (1)
#define P40_MAIN_GEN_BIT_FIXED (2)
#define P40_MAIN_GEN_BIT_THROTTLE (3)
#define P40_CTRL_GET_MAIN_GEN_FIXED _IOR('c', 11, uint64_t)//+`P40_CTRL_GET_MAIN_GEN_FIXED` ?>
#define P40_CTRL_SET_MAIN_GEN_FIXED _IOW('c', 12, uint64_t)//+`P40_CTRL_SET_MAIN_GEN_FIXED` ?>
#define P40_CTRL_GET_MAIN_RAW_MODE _IOR('c', 13, uint64_t)//+`P40_CTRL_GET_MAIN_RAW_MODE` ?>
#define P40_CTRL_GET_PCIE_GEN _IOR('c', 14, uint64_t)//+`P40_CTRL_GET_PCIE_GEN` ?>
#define P40_CTRL_GET_META_PACKING _IOR('c', 15, uint64_t)//+`P40_CTRL_GET_META_PACKING` ?>
#define P40_CTRL_SET_META_PACKING _IOW('c', 16, uint64_t)//+`P40_CTRL_SET_META_PACKING` ?>
#define P40_CTRL_GET_MSI_MODE _IOR('c', 17, uint64_t)//+`P40_CTRL_GET_MSI_MODE` ?>
#define P40_CTRL_SET_MSI_MODE _IOW('c', 18, uint64_t)//+`P40_CTRL_SET_MSI_MODE` ?>
#define P40_MSI_MODE_BIT_DAQ (0)
#define P40_MSI_MODE_BIT_MAIN (1)
#define P40_MSI_MODE_BIT_META (2)
#define P40_CTRL_GET_MAIN_MSI_BYTES _IOR('c', 19, uint64_t)//+`P40_CTRL_GET_MAIN_MSI_BYTES` ?>
#define P40_CTRL_SET_MAIN_MSI_BYTES _IOW('c', 20, uint64_t)//+`P40_CTRL_SET_MAIN_MSI_BYTES` ?>
#define P40_CTRL_GET_MAIN_MSI_CYCLES _IOR('c', 21, uint64_t)//+`P40_CTRL_GET_MAIN_MSI_CYCLES` ?>
#define P40_CTRL_GET_META_MSI_BYTES _IOR('c', 22, uint64_t)//+`P40_CTRL_GET_META_MSI_BYTES` ?>
#define P40_CTRL_SET_META_MSI_BYTES _IOW('c', 23, uint64_t)//+`P40_CTRL_SET_META_MSI_BYTES` ?>
#define P40_CTRL_GET_META_MSI_CYCLES _IOR('c', 24, uint64_t)//+`P40_CTRL_GET_META_MSI_CYCLES` ?>
#define P40_CTRL_GET_META_MSI_BLOCKS _IOR('c', 25, uint64_t)//+`P40_CTRL_GET_META_MSI_BLOCKS` ?>
#define P40_CTRL_SET_META_MSI_BLOCKS _IOW('c', 26, uint64_t)//+`P40_CTRL_SET_META_MSI_BLOCKS` ?>
#define P40_CTRL_GET_INBUF_SIZE _IOR('c', 27, uint64_t)//+`P40_CTRL_GET_INBUF_SIZE` ?>
#define P40_CTRL_GET_INBUF_FILL _IOR('c', 28, uint64_t)//+`P40_CTRL_GET_INBUF_FILL` ?>
#define P40_CTRL_GET_TRUNC_THRES _IOR('c', 29, uint64_t)//+`P40_CTRL_GET_TRUNC_THRES` ?>
#define P40_CTRL_SET_TRUNC_THRES _IOW('c', 30, uint64_t)//+`P40_CTRL_SET_TRUNC_THRES` ?>
#define P40_CTRL_GET_TRUNC_TOTAL_CYCLES _IOR('c', 31, uint64_t)//+`P40_CTRL_GET_TRUNC_TOTAL_CYCLES` ?>
#define P40_CTRL_GET_TRUNC_TOTAL_SINCE_EVID _IOR('c', 32, uint64_t)//+`P40_CTRL_GET_TRUNC_TOTAL_SINCE_EVID` ?>
#define P40_CTRL_GET_TRUNC_LAST_CYCLES _IOR('c', 33, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_CYCLES` ?>
#define P40_CTRL_GET_TRUNC_LAST_FROM_EVID _IOR('c', 34, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_FROM_EVID` ?>
#define P40_CTRL_GET_TRUNC_LAST_TO_EVID _IOR('c', 35, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_TO_EVID` ?>
#define P40_CTRL_GET_CHOKE_TOTAL_CYCLES _IOR('c', 36, uint64_t)//+`P40_CTRL_GET_CHOKE_TOTAL_CYCLES` ?>
#define P40_CTRL_GET_CHOKE_TOTAL_SINCE_EVID _IOR('c', 37, uint64_t)//+`P40_CTRL_GET_CHOKE_TOTAL_SINCE_EVID` ?>
#define P40_CTRL_GET_CHOKE_LAST_CYCLES _IOR('c', 38, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_CYCLES` ?>
#define P40_CTRL_GET_CHOKE_LAST_FROM_EVID _IOR('c', 39, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_FROM_EVID` ?>
#define P40_CTRL_GET_CHOKE_LAST_TO_EVID _IOR('c', 40, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_TO_EVID` ?>
// this should advance both the main and meta read pointers
// after parsing the metadata information
// we might allow manually advancing the pointer,
// but only in MSI_META and MSI_MAIN modes, never in MSI_DAQ
#define P40_CTRL_GET_HOST_MAIN_MSI_NSECS _IOR('h', 2, uint64_t)//+`P40_CTRL_GET_HOST_MAIN_MSI_NSECS` ?>
#define P40_CTRL_GET_HOST_META_MSI_NSECS _IOR('h', 3, uint64_t)//+`P40_CTRL_GET_HOST_META_MSI_NSECS` ?>
#define P40_STREAM_GET_ENABLE _IOR('s', 1, uint64_t)//+`P40_STREAM_GET_ENABLE` ?>
#define P40_STREAM_SET_ENABLE _IOW('s', 2, uint64_t)//+`P40_STREAM_SET_ENABLE` ?>
#define P40_STREAM_GET_READY _IOR('s', 3, uint64_t)//+`P40_STREAM_GET_READY` ?>
#define P40_STREAM_GET_FLUSH _IOR('s', 4, uint64_t)//+`P40_STREAM_GET_FLUSH` ?>
#define P40_STREAM_SET_FLUSH _IOW('s', 5, uint64_t)//+`P40_STREAM_SET_FLUSH` ?>
#define P40_STREAM_GET_FPGA_BUF_BYTES _IOR('s', 6, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_BYTES` ?>
#define P40_STREAM_GET_FPGA_BUF_DESCS _IOR('s', 7, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS` ?>
#define P40_STREAM_GET_FPGA_BUF_DESC_BYTES _IOR('s', 8, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESC_BYTES` ?>
#define P40_STREAM_GET_FPGA_BUF_DESCS_FILL _IOR('s', 9, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS_FILL` ?>
#define P40_STREAM_GET_FPGA_BUF_DESC_FILL_BYTES _IOR('s', 10, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESC_FILL_BYTES` ?>
#define P40_STREAM_GET_FPGA_BUF_DESCS_BUSY _IOR('s', 11, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS_BUSY` ?>
#define P40_STREAM_GET_HOST_BUF_WRITE_OFF _IOR('s', 12, uint64_t)//+`P40_STREAM_GET_HOST_BUF_WRITE_OFF` ?>
#define P40_STREAM_GET_HOST_BUF_READ_OFF _IOR('s', 13, uint64_t)//+`P40_STREAM_GET_HOST_BUF_READ_OFF` ?>
#define P40_STREAM_GET_HOST_BUF_BYTES _IOR('m', 1, uint64_t)//+`P40_STREAM_GET_HOST_BUF_BYTES` ?>
#define P40_STREAM_GET_HOST_BUF_BYTES_USED _IOR('m', 2, uint64_t)//+`P40_STREAM_GET_HOST_BUF_BYTES_USED` ?>
#define P40_STREAM_GET_HOST_MSI_COUNT _IOR('m', 3, uint64_t)//+`P40_STREAM_GET_HOST_MSI_COUNT` ?>
#define P40_STREAM_FREE_HOST_BUF_BYTES _IOWR('m', 4, uint64_t)//+`P40_STREAM_FREE_HOST_BUF_BYTES` ?>
#define P40_ECS_GET_BAR_SIZE _IO('e', 1) //+`P40_ECS_GET_BAR_SIZE` ?>
//TODO: why not _IOR?
#endif//__PCIE40_IOCTL_H
Driver/pcie40_reload/.gitignore deleted 100644 → 0
+ 0
− 2
View file @ b6008ec2
pcie40_reload_suid
pcie40_reload_suid.out/
Driver/pcie40_reload/Makefile deleted 100644 → 0
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View file @ b6008ec2
HERE :=$(strip $(realpath $(dir $(lastword $(MAKEFILE_LIST)))))
TOP :=$(realpath $(HERE)/..)
include $(TOP)/common/flags.mk
SCRIPTS :=pcie40_reload.sh
SCRIPTS_INSTALL =$(DAQ40_PREFIX)/pcie40_reload
PCIE40_RELOAD_SUID :=pcie40_reload
PCIE40_RELOAD_SUID_OBJS =main.o
PCIE40_RELOAD_SUID_CFLAGS =$(CFLAGS)
PCIE40_RELOAD_SUID_INSTALL =$(SCRIPTS_INSTALL)
PCIE40_RELOAD :=pcie40_reload
PCIE40_RELOAD_LINK =$(SCRIPTS_INSTALL)/pcie40_reload_suid
PCIE40_RELOAD_INSTALL =$(PREFIX)/bin
PCIE40_RELOAD_MAN_DCRT =$(HERE)/man.dcrt
PCIE40_RELOAD_MAN_INSTALL =$(PREFIX)/share/man
include $(TOP)/common/rules.mk
ifeq ($(ENABLE_PCIE40), true)
$(eval $(call COPY_template,SCRIPTS,755))
$(eval $(call LINK_template,PCIE40_RELOAD))
$(eval $(call ODIR_template,PCIE40_RELOAD_SUID))
$(eval $(call MAN_template,PCIE40_RELOAD,1))
endif
$(eval $(call DEFAULT_template))
Driver/pcie40_reload/main.c deleted 100644 → 0
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View file @ b6008ec2
#define _GNU_SOURCE
#include <stdlib.h>
#include <unistd.h>
#include <stdio.h>
#include <signal.h>
#include <string.h>
#include <limits.h>
#include <libgen.h>
int main(int argc, char *argv[])
{
char here_path[PATH_MAX];
char script_path[PATH_MAX];
if (readlink("/proc/self/exe", here_path, PATH_MAX) == -1) {
perror("readlink");
return -1;
}
// if (setresuid(0,0,0)) {
// perror("setresuid");
// return -1;
//}
snprintf(script_path, sizeof(script_path), "%s/pcie40_reload.sh", dirname(here_path));
return execvp(script_path, argv);
}
Lib/src/ecs/ecs.c deleted 100644 → 0
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− 351
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/****************************************************************************************//**
* \file ecs.c
*
* \brief This file contains the user library to access PCI driver.
*
* \author JM : 02/11/2013
* \version 1.0
* \date 08/11/2013
* \copyright (c) Copyright CERN for the benefit of the LHCb Collaboration.
* Distributed under the terms of the GNU General Public Licence V3.
* ana.py script is free and open source software.
CHANGELOG
JM : 02/11/2013 Initial version
JM/PYD : 04/11/2013 PYD code integration
PYD : adapt for Paolo driver with its library and add multiple board choice
*/
/**************************************************************************************************
The *Bar*() type of functions concentrate the conditional code which depends of the driver type.
The ecs_*Lli() or ecs_*User() type of functions are driver blind and used to match user registers
or lli registers.
ecs_openUser() ecs_openLli()
ecs_iordUser() ecs_iordLli()
ecs_iowrUser() ecs_iowrLli()
ecs_iordBlocUser() ecs_iordBlocLli()
ecs_iowrBlocUser() ecs_iowrBlocLli()
ecs_closeUser() ecs_closeLli()
************************************************************************************************/
#include <stdio.h>
#include <unistd.h>
#include <string.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <linux/ioctl.h>
#include <sys/ioctl.h>
#include <ecs.h>
#include <systemConfig.h>
// rpm includes
// PYD 20/03/2018 force the use of rpm for all borads types
#include <pcie40/ecs.h>
/**
* \var ecs_userFile
* \brief ecs_open function return a file description which is stored on userFile for bar 0.
*/
static int ecs_userFile[MAX_DEV];
/**
* \var ecs_lliFile
* \brief ecs_open function return a file description which is stored on lliFile for bar 2.
*/
static int ecs_lliFile[MAX_DEV];
/**
* \var ecs_bar2_mm
* \brief ecs_open function for bar 2 mmaps registers area from a start address.
*/
static unsigned *ecs_bar1_mm[MAX_DEV]; // bar1 start add of mmap
static unsigned *ecs_bar2_mm[MAX_DEV]; // bar2 start add of mmap
/******************************************************//**
* \fn int ecs_close(int dev, int bar)
* \brief Function to close bar file
*
* \param dev: the selected board number
* \param bar: the bar number
*//******************************************************/
void ecs_close(int dev, int bar){
if (bar==2){
p40_ecs_close(ecs_lliFile[dev],ecs_bar2_mm[dev]);
}
else if (bar==0){
p40_ecs_close(ecs_lliFile[dev],ecs_bar1_mm[dev]);
}
}
/******************************************************//**
* \fn int ecs_open(int dev, int bar)
* \brief Function to open bar file
*
* \param dev: the selected board number
* \param bar: number of bar
* \return -1 error / file descriptor
*//******************************************************/
int ecs_open(int dev,int bar){
if (bar==2){
ecs_lliFile[dev] = p40_ecs_open(dev,bar,&(ecs_bar2_mm[dev]));
return ecs_lliFile[dev];
}
else if (bar==0){
ecs_userFile[dev] = p40_ecs_open(dev,bar,&(ecs_bar1_mm[dev]));
return ecs_userFile[dev];
}
return -1;
}
int ecs_write(int dev, int bar, unsigned add, int val){
if (add%4 != 0)
return(-1);
if (bar==2){
p40_ecs_w32(ecs_bar2_mm[dev],add,val);
}
else if (bar==0){
p40_ecs_w32(ecs_bar1_mm[dev],add,val);
}
return(0);
}
unsigned ecs_read(int dev, int bar, unsigned add){
uint32_t val;
if (add%4 != 0)
return(-1);
if (bar==2){
val = p40_ecs_r32(ecs_bar2_mm[dev],add);
}
else if (bar==0){
val = p40_ecs_r32(ecs_bar1_mm[dev],add);
}
return val;
}
int ecs_iowrBar(int dev, int bar, unsigned add, unsigned *val){
if (add%4 != 0)
return(-1);
if (bar==2){
if (ecs_lliFile[dev] == 0) ecs_open(dev,bar);
}
else if (bar==0){
if (ecs_userFile[dev] == 0) ecs_open(dev,bar);
}
ecs_write(dev,bar,add,*val);
return(0);
}
int ecs_iordBar(int dev, int bar, unsigned add, unsigned *val){
if (add%4 != 0)
return(-1);
if (bar==2){
if (ecs_lliFile[dev] == 0) ecs_open(dev,bar);
}
else if (bar==0){
if (ecs_userFile[dev] == 0) ecs_open(dev,bar);
}
*val = ecs_read(dev,bar,add);
return(0);
}
int ecs_writeBloc(int dev, int bar, unsigned add, int size, unsigned *val){
int i;
unsigned wd;
if (add%sizeof(unsigned) != 0)
return(-1);
for (i=0; i<size; i = i + 1){
wd = val[i];
ecs_write(dev,bar, add+i*sizeof(unsigned), wd);
}
return 0;
}
int ecs_readBloc(int dev, int bar, unsigned add, int size, unsigned *val){
int i;
if (add%4 != 0)
return(-1);
for (i=0; i<size; i = i + 1){
val[i] = ecs_read(dev,bar,add+i*sizeof(unsigned));
}
return 0;
}
int ecs_iowrBarBloc(int dev, int bar, unsigned add, int size, unsigned *val){
ecs_writeBloc(dev,bar,add,size,val);
return 0;
}
int ecs_iordBarBloc(int dev, int bar, unsigned add, int size, unsigned *val){
ecs_readBloc(dev,bar,add,size,val);
return 0;
}
/***********************************************************************//**
* \fn int ecs_printSetup()
* \brief Function to print BAR configurations for checking
*
*//***********************************************************************/
void ecs_printSetup(){
printf("-------------------------------------------------\n");
printf("driver type = MMAP (PCIe40 daq) version\n");
printf("-------------------------------------------------\n");
printf("BAR user = BAR%d\n",BAR_USER);
printf("BAR i2c = BAR%d\n",BAR_I2C);
printf("BASE i2c bus %d TEMPERATURES = 0x%08x\n", I2C_BUS_TEMPERATURES, I2C_BUS_BASE_TEMPERATURES);
printf("BASE i2c bus %d CLEANER1 = 0x%08x\n", I2C_BUS_PLL_CLEANER1, I2C_BUS_BASE_PLL_CLEANER1);
printf("BASE i2c bus %d CLEANER2 = 0x%08x\n", I2C_BUS_PLL_CLEANER2, I2C_BUS_BASE_PLL_CLEANER2);
printf("BASE i2c bus %d PLL_TFC = 0x%08x\n", I2C_BUS_PLL_TFC, I2C_BUS_BASE_PLL_TFC);
printf("BASE i2c bus %d SFP1 = 0x%08x\n", I2C_BUS_SFP1, I2C_BUS_BASE_SFP1);
printf("BASE i2c bus %d SFP2 = 0x%08x\n", I2C_BUS_SFP2, I2C_BUS_BASE_SFP2);
printf("BASE i2c bus %d MINIPODS = 0x%08x\n", I2C_BUS_MINIPODS, I2C_BUS_BASE_MINIPODS);
printf("BASE i2c bus %d TEMP_MEZZANINE = 0x%08x\n", I2C_BUS_TEMP_MEZZANINE, I2C_BUS_BASE_TEMP_MEZZANINE);
printf("BASE i2c bus %d CURRENT1 = 0x%08x\n", I2C_BUS_CURRENT1, I2C_BUS_BASE_CURRENT1);
printf("BASE i2c bus %d CURRENT2 = 0x%08x\n", I2C_BUS_CURRENT2, I2C_BUS_BASE_CURRENT2);
}
// Usefull for python wrappers when memory is allocated by the lli C libs
// it should be freed after python module has used it.
void ecs_free( int *data) {
free(data);
}
/***********************************************************************//**
* \fn int ecs_openUser(int dev)
* \brief Function to init the ecs pcie bus accesses for user space
* Thus function has to be done before any access.
*
* Here we have a detailed description of the function
*
* \param : dev the board number
* \return 0 success, -1 error
*//***********************************************************************/
int ecs_openUser(int dev){
return ecs_open(dev,0);
}
/***********************************************************************//**
* \fn int ecs_closeUser(int dev)
* \brief Function to disconnect from the ecs user space.
* A new ecs_open() should be done before any new read or write
*
* \param : dev the board number
*//***********************************************************************/
void ecs_closeUser(int dev){
ecs_close(dev,0);
}
/***********************************************************************//**
* \fn int ecs_openLli(int dev)
* \brief Function to init the ecs pcie bus accesses for LLI devices
* Thus function has to be done before any access.
*
* \param : dev the board number
* \return 0 success, -1 error
*//***********************************************************************/
int ecs_openLli(int dev){
return ecs_open(dev,2);
}
/***********************************************************************//**
* \fn int ecs_closeLli(int dev)
* \brief Function to disconnect from the LLI devices io.
* A new ecs_openLli() should be done before any new read or write
*
* \param : dev the board number
*//***********************************************************************/
void ecs_closeLli(int dev){
ecs_close(dev,2);
}
/***********************************************************************//**
* \fn int ecs_iordLli(int dev, unsigned add, unsigned *val)
* \brief Function to read a word at offset add in the lli registers space.
*
* \param : dev the board number
* \param add the offset of the word to read in the lli register space
* \param val a pointer to receive the read value in case of success
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iordLli(int dev, unsigned add, unsigned *val){
return ecs_iordBar(dev, 2, add, val);
}
/***********************************************************************//**
* \fn int ecs_iowrLli(int dev, unsigned add, unsigned *val)
* \brief Function to write a word at offset add in the Lli registers space.
*
* \param : dev the board number
* \param add the offset of the word to write in the Lli registers space
* \param val a pointer to the value to write
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iowrLli(int dev, unsigned add, unsigned *val){
return ecs_iowrBar(dev, 2, add, val);
}
/***********************************************************************//**
* \fn int ecs_iordBlocLli(unsigned add, int size, unsigned *val)
* \brief Function to read size words at offset add in the lli registers space.
*
* \param : dev the board number
* \param add : the offset of the word to read in the lli register space
* \param size : number of bytes to read
* \param val : a pointer to receive the read value in case of success
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iordBlocLli(int dev, unsigned add, int size, unsigned *val){
return ecs_iordBarBloc(dev, 2, add, size, val);
}
/***********************************************************************//**
* \fn int ecs_iowrBlocLli(unsigned add, int size, unsigned *val)
* \brief Function to write size words at offset add in the Lli registers space.
*
* \param : dev the board number
* \param add : the offset of the word to write in the Lli registers space
* \param size : number of bytes to write
* \param val : a pointer to the value to write
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iowrBlocLli(int dev, unsigned add, int size, unsigned *val){
return ecs_iowrBarBloc(dev, 2, add, size, val);
}
/***********************************************************************//**
* \fn int ecs_iordI2c(int dev, unsigned add, unsigned *val)
* \brief Function to read a word at offset add in the I2C core registers space.
*
* \param : dev the board number
* \param add the offset of the word to read in the I2C core register space
* \param val a pointer to receive the read value in case of success
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iordI2c(int dev, unsigned add, unsigned *val){
return ecs_iordLli(dev, add, val);
}
int ecs_iordI2c_slow(int dev, unsigned add, unsigned *val){
int dat = ecs_iordLli(dev, add, val);
usleep(0);
return dat;
}
/***********************************************************************//**
* \fn int ecs_iowrI2c(unsigned add, unsigned *val)
* \brief Function to write a word at offset add in the I2C core registers space.
*
* \param : dev the board number
* \param add the offset of the word to write in the I2C core registers space
* \param val a pointer to the value to write
* \return 0 success,-1 error
*//***********************************************************************/
int ecs_iowrI2c(int dev, unsigned add, unsigned *val){
return ecs_iowrLli(dev, add, val);
}
int ecs_iowrI2c_slow(int dev, unsigned add, unsigned *val){
int dat = ecs_iowrLli(dev, add, val);
usleep(0);
return dat;
}
Lib/src/minipods/i2cDriver.c deleted 100644 → 0
+ 0
− 656
View file @ b6008ec2
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