From 07e463b9e1e8f5e48344805abfa3a6b242306b71 Mon Sep 17 00:00:00 2001
From: Patrick Robbe <robbe@lal.in2p3.fr>
Date: Tue, 11 Jun 2019 18:40:49 +0900
Subject: [PATCH] Remove old file
---
Driver/pcie40_driver/pcie40_dma_regmap.h | 86 ---
Driver/pcie40_driver/pcie40_ioctl.h | 91 ----
Driver/pcie40_reload/.gitignore | 2 -
Driver/pcie40_reload/Makefile | 28 -
Driver/pcie40_reload/main.c | 25 -
Lib/src/ecs/ecs.c | 351 ------------
Lib/src/minipods/i2cDriver.c | 656 -----------------------
7 files changed, 1239 deletions(-)
delete mode 100644 Driver/pcie40_driver/pcie40_dma_regmap.h
delete mode 100644 Driver/pcie40_driver/pcie40_ioctl.h
delete mode 100644 Driver/pcie40_reload/.gitignore
delete mode 100644 Driver/pcie40_reload/Makefile
delete mode 100644 Driver/pcie40_reload/main.c
delete mode 100644 Lib/src/ecs/ecs.c
delete mode 100644 Lib/src/minipods/i2cDriver.c
diff --git a/Driver/pcie40_driver/pcie40_dma_regmap.h b/Driver/pcie40_driver/pcie40_dma_regmap.h
deleted file mode 100644
index 1c492d3..0000000
--- a/Driver/pcie40_driver/pcie40_dma_regmap.h
+++ /dev/null
@@ -1,86 +0,0 @@
-// This output was generated by the following command:
-// ../common/regmap_cfg_to_h.tcl P40_ ../common/pcie40_dma_regmap.cfg
-// Do not edit this file manually, your changes will be overwritten by the generator.
-
-#ifndef P40_REGMAP_H
-#define P40_REGMAP_H
- static const int P40_DMA_REGMAP_VERSION = 0x20170424;
-
- static const int P40_DMA_CTRL_OFF_INBUF_SIZE = 0x0A0;
- static const int P40_DMA_CTRL_OFF_META_EVID_HI = 0x034;
- static const int P40_DMA_CTRL_OFF_VERSION = 0x008;
- static const int P40_DMA_CTRL_OFF_MAIN_EVID_LO = 0x024;
- static const int P40_DMA_CTRL_OFF_MAIN_MSI_CYCLES = 0x08C;
- static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_HI = 0x0E0;
- static const int P40_DMA_CTRL_OFF_CHOKE_LAST_CYCLES = 0x0D8;
- static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_LO = 0x0D0;
- static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_CYCLES = 0x0CC;
- static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_HI = 0x0B4;
- static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_LO = 0x0E4;
- static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_HI = 0x0C8;
- static const int P40_DMA_CTRL_OFF_TRUNC_THRES = 0x0A8;
- static const int P40_DMA_CTRL_OFF_RWTEST = 0x000;
- static const int P40_DMA_CTRL_OFF_PCIE_GEN = 0x080;
- static const int P40_DMA_CTRL_OFF_INBUF_FILL = 0x0A4;
- static const int P40_DMA_CTRL_OFF_CHIP_ID_LO = 0x044;
- static const int P40_DMA_CTRL_OFF_LINK_ID = 0x00C;
- static const int P40_DMA_CTRL_OFF_ERROR = 0x014;
- static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_LO = 0x0BC;
- static const int P40_DMA_CTRL_OFF_ODIN_EVID_LO = 0x03C;
- static const int P40_DMA_CTRL_OFF_META_PACKING = 0x02C;
- static const int P40_DMA_CTRL_OFF_RESET = 0x010;
- static const int P40_DMA_CTRL_OFF_MAIN_EVID_HI = 0x028;
- static const int P40_DMA_CTRL_BASE_DAQ_MAIN_STREAM = 0x100;
- static const int P40_DMA_CTRL_OFF_META_MSI_BYTES = 0x090;
- static const int P40_DMA_CTRL_OFF_MSI_MODE = 0x084;
- static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_HI = 0x0D4;
- static const int P40_DMA_CTRL_OFF_MAIN_GEN_FIXED = 0x01C;
- static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_HI = 0x0E8;
- static const int P40_DMA_CTRL_OFF_CHIP_ID_HI = 0x048;
- static const int P40_DMA_CTRL_OFF_META_EVID_LO = 0x030;
- static const int P40_DMA_CTRL_OFF_MAIN_GEN_CTL = 0x018;
- static const int P40_DMA_CTRL_OFF_META_MSI_CYCLES = 0x094;
- static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_LO = 0x0DC;
- static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_HI = 0x0C0;
- static const int P40_DMA_CTRL_OFF_TRUNC_LAST_CYCLES = 0x0B8;
- static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_LO = 0x0B0;
- static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_CYCLES = 0x0AC;
- static const int P40_DMA_CTRL_OFF_ODIN_EVID_HI = 0x040;
- static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_LO = 0x0C4;
- static const int P40_DMA_CTRL_OFF_MAIN_RAW_MODE = 0x020;
- static const int P40_DMA_CTRL_OFF_MAIN_MSI_BYTES = 0x088;
- static const int P40_DMA_CTRL_OFF_META_MSI_BLOCKS = 0x098;
- static const int P40_DMA_CTRL_OFF_REGMAP = 0x004;
- static const int P40_DMA_CTRL_OFF_ODIN_GEN_CTL = 0x038;
-
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_LO = 0x24;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_BYTES = 0x0C;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_HI = 0x1C;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_HI = 0x28;
- static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_WRITE_OFF = 0x2C;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_BYTES = 0x14;
- static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_READ_OFF = 0x30;
- static const int P40_DMA_DAQ_STREAM_OFF_ENABLE = 0x00;
- static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_PAGES = 0x38;
- static const int P40_DMA_DAQ_STREAM_OFF_FLUSH = 0x08;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS = 0x10;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_LO = 0x18;
- static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_ENTRIES = 0x34;
- static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_FILL_BYTES = 0x20;
- static const int P40_DMA_DAQ_STREAM_OFF_READY = 0x04;
-
- static const int P40_DMA_CTRL_QSYS_BASE = 0x1000;
-
- static const int P40_DMA_DAQ_MAIN_STREAM_QSYS_BASE = 0x1100;
-
- static const int P40_DMA_DAQ_MAIN_MAP_QSYS_BASE = 0x10000;
-
- static const int P40_DMA_DAQ_MAIN_BUF_QSYS_BASE = 0x100000;
-
- static const int P40_DMA_DAQ_META_STREAM_QSYS_BASE = 0x0400;
-
- static const int P40_DMA_DAQ_META_MAP_QSYS_BASE = 0x20000;
-
- static const int P40_DMA_DAQ_META_BUF_QSYS_BASE = 0x200000;
-
-#endif//P40_REGMAP_H
diff --git a/Driver/pcie40_driver/pcie40_ioctl.h b/Driver/pcie40_driver/pcie40_ioctl.h
deleted file mode 100644
index 80c4c6d..0000000
--- a/Driver/pcie40_driver/pcie40_ioctl.h
+++ /dev/null
@@ -1,91 +0,0 @@
-#ifndef __PCIE40_IOCTL_H
-#define __PCIE40_IOCTL_H
-//ioctl.pcie``+
-
-#define P40_CTRL_GET_RWTEST _IOR('c', 1, uint64_t)//+`P40_CTRL_GET_RWTEST` ?>
-#define P40_CTRL_SET_RWTEST _IOW('c', 2, uint64_t)//+`P40_CTRL_SET_RWTEST` ?>
-#define P40_CTRL_GET_VERSION _IOR('c', 3, uint64_t)//+`P40_CTRL_GET_VERSION` ?>
-#define P40_CTRL_GET_LINK_ID _IOR('c', 4, uint64_t)//+`P40_CTRL_GET_LINK_ID` ?>
-#define P40_CTRL_GET_CHIP_ID _IOR('c', 5, uint64_t)//+`P40_CTRL_GET_CHIP_ID` ?>
-#define P40_CTRL_GET_ERROR _IOR('c', 6, uint64_t)//+`P40_CTRL_GET_ERROR` ?>
-#define P40_CTRL_GET_RESET _IOR('c', 7, uint64_t)//+`P40_CTRL_GET_RESET` ?>
-#define P40_CTRL_SET_RESET _IOW('c', 8, uint64_t)//+`P40_CTRL_SET_RESET` ?>
-#define P40_RST_BIT_DEFAULT (0)
-#define P40_RST_BIT_LOGIC (1)
-#define P40_RST_BIT_FLUSH (2)
-#define P40_RST_BIT_COUNTERS (3)
-#define P40_CTRL_GET_MAIN_GEN_CTL _IOR('c', 9, uint64_t)//+`P40_CTRL_GET_MAIN_GEN_CTL` ?>
-#define P40_CTRL_SET_MAIN_GEN_CTL _IOW('c', 10, uint64_t)//+`P40_CTRL_SET_MAIN_GEN_CTL` ?>
-#define P40_MAIN_GEN_BIT_ENABLE (0)
-#define P40_MAIN_GEN_BIT_RUNNING (1)
-#define P40_MAIN_GEN_BIT_FIXED (2)
-#define P40_MAIN_GEN_BIT_THROTTLE (3)
-#define P40_CTRL_GET_MAIN_GEN_FIXED _IOR('c', 11, uint64_t)//+`P40_CTRL_GET_MAIN_GEN_FIXED` ?>
-#define P40_CTRL_SET_MAIN_GEN_FIXED _IOW('c', 12, uint64_t)//+`P40_CTRL_SET_MAIN_GEN_FIXED` ?>
-#define P40_CTRL_GET_MAIN_RAW_MODE _IOR('c', 13, uint64_t)//+`P40_CTRL_GET_MAIN_RAW_MODE` ?>
-#define P40_CTRL_GET_PCIE_GEN _IOR('c', 14, uint64_t)//+`P40_CTRL_GET_PCIE_GEN` ?>
-#define P40_CTRL_GET_META_PACKING _IOR('c', 15, uint64_t)//+`P40_CTRL_GET_META_PACKING` ?>
-#define P40_CTRL_SET_META_PACKING _IOW('c', 16, uint64_t)//+`P40_CTRL_SET_META_PACKING` ?>
-#define P40_CTRL_GET_MSI_MODE _IOR('c', 17, uint64_t)//+`P40_CTRL_GET_MSI_MODE` ?>
-#define P40_CTRL_SET_MSI_MODE _IOW('c', 18, uint64_t)//+`P40_CTRL_SET_MSI_MODE` ?>
-#define P40_MSI_MODE_BIT_DAQ (0)
-#define P40_MSI_MODE_BIT_MAIN (1)
-#define P40_MSI_MODE_BIT_META (2)
-#define P40_CTRL_GET_MAIN_MSI_BYTES _IOR('c', 19, uint64_t)//+`P40_CTRL_GET_MAIN_MSI_BYTES` ?>
-#define P40_CTRL_SET_MAIN_MSI_BYTES _IOW('c', 20, uint64_t)//+`P40_CTRL_SET_MAIN_MSI_BYTES` ?>
-#define P40_CTRL_GET_MAIN_MSI_CYCLES _IOR('c', 21, uint64_t)//+`P40_CTRL_GET_MAIN_MSI_CYCLES` ?>
-#define P40_CTRL_GET_META_MSI_BYTES _IOR('c', 22, uint64_t)//+`P40_CTRL_GET_META_MSI_BYTES` ?>
-#define P40_CTRL_SET_META_MSI_BYTES _IOW('c', 23, uint64_t)//+`P40_CTRL_SET_META_MSI_BYTES` ?>
-#define P40_CTRL_GET_META_MSI_CYCLES _IOR('c', 24, uint64_t)//+`P40_CTRL_GET_META_MSI_CYCLES` ?>
-#define P40_CTRL_GET_META_MSI_BLOCKS _IOR('c', 25, uint64_t)//+`P40_CTRL_GET_META_MSI_BLOCKS` ?>
-#define P40_CTRL_SET_META_MSI_BLOCKS _IOW('c', 26, uint64_t)//+`P40_CTRL_SET_META_MSI_BLOCKS` ?>
-#define P40_CTRL_GET_INBUF_SIZE _IOR('c', 27, uint64_t)//+`P40_CTRL_GET_INBUF_SIZE` ?>
-#define P40_CTRL_GET_INBUF_FILL _IOR('c', 28, uint64_t)//+`P40_CTRL_GET_INBUF_FILL` ?>
-#define P40_CTRL_GET_TRUNC_THRES _IOR('c', 29, uint64_t)//+`P40_CTRL_GET_TRUNC_THRES` ?>
-#define P40_CTRL_SET_TRUNC_THRES _IOW('c', 30, uint64_t)//+`P40_CTRL_SET_TRUNC_THRES` ?>
-#define P40_CTRL_GET_TRUNC_TOTAL_CYCLES _IOR('c', 31, uint64_t)//+`P40_CTRL_GET_TRUNC_TOTAL_CYCLES` ?>
-#define P40_CTRL_GET_TRUNC_TOTAL_SINCE_EVID _IOR('c', 32, uint64_t)//+`P40_CTRL_GET_TRUNC_TOTAL_SINCE_EVID` ?>
-#define P40_CTRL_GET_TRUNC_LAST_CYCLES _IOR('c', 33, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_CYCLES` ?>
-#define P40_CTRL_GET_TRUNC_LAST_FROM_EVID _IOR('c', 34, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_FROM_EVID` ?>
-#define P40_CTRL_GET_TRUNC_LAST_TO_EVID _IOR('c', 35, uint64_t)//+`P40_CTRL_GET_TRUNC_LAST_TO_EVID` ?>
-#define P40_CTRL_GET_CHOKE_TOTAL_CYCLES _IOR('c', 36, uint64_t)//+`P40_CTRL_GET_CHOKE_TOTAL_CYCLES` ?>
-#define P40_CTRL_GET_CHOKE_TOTAL_SINCE_EVID _IOR('c', 37, uint64_t)//+`P40_CTRL_GET_CHOKE_TOTAL_SINCE_EVID` ?>
-#define P40_CTRL_GET_CHOKE_LAST_CYCLES _IOR('c', 38, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_CYCLES` ?>
-#define P40_CTRL_GET_CHOKE_LAST_FROM_EVID _IOR('c', 39, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_FROM_EVID` ?>
-#define P40_CTRL_GET_CHOKE_LAST_TO_EVID _IOR('c', 40, uint64_t)//+`P40_CTRL_GET_CHOKE_LAST_TO_EVID` ?>
-
-// this should advance both the main and meta read pointers
-// after parsing the metadata information
-// we might allow manually advancing the pointer,
-// but only in MSI_META and MSI_MAIN modes, never in MSI_DAQ
-#define P40_CTRL_GET_HOST_MAIN_MSI_NSECS _IOR('h', 2, uint64_t)//+`P40_CTRL_GET_HOST_MAIN_MSI_NSECS` ?>
-#define P40_CTRL_GET_HOST_META_MSI_NSECS _IOR('h', 3, uint64_t)//+`P40_CTRL_GET_HOST_META_MSI_NSECS` ?>
-
-#define P40_STREAM_GET_ENABLE _IOR('s', 1, uint64_t)//+`P40_STREAM_GET_ENABLE` ?>
-#define P40_STREAM_SET_ENABLE _IOW('s', 2, uint64_t)//+`P40_STREAM_SET_ENABLE` ?>
-#define P40_STREAM_GET_READY _IOR('s', 3, uint64_t)//+`P40_STREAM_GET_READY` ?>
-#define P40_STREAM_GET_FLUSH _IOR('s', 4, uint64_t)//+`P40_STREAM_GET_FLUSH` ?>
-#define P40_STREAM_SET_FLUSH _IOW('s', 5, uint64_t)//+`P40_STREAM_SET_FLUSH` ?>
-#define P40_STREAM_GET_FPGA_BUF_BYTES _IOR('s', 6, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_BYTES` ?>
-#define P40_STREAM_GET_FPGA_BUF_DESCS _IOR('s', 7, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS` ?>
-
-#define P40_STREAM_GET_FPGA_BUF_DESC_BYTES _IOR('s', 8, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESC_BYTES` ?>
-
-#define P40_STREAM_GET_FPGA_BUF_DESCS_FILL _IOR('s', 9, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS_FILL` ?>
-
-#define P40_STREAM_GET_FPGA_BUF_DESC_FILL_BYTES _IOR('s', 10, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESC_FILL_BYTES` ?>
-
-#define P40_STREAM_GET_FPGA_BUF_DESCS_BUSY _IOR('s', 11, uint64_t)//+`P40_STREAM_GET_FPGA_BUF_DESCS_BUSY` ?>
-
-#define P40_STREAM_GET_HOST_BUF_WRITE_OFF _IOR('s', 12, uint64_t)//+`P40_STREAM_GET_HOST_BUF_WRITE_OFF` ?>
-#define P40_STREAM_GET_HOST_BUF_READ_OFF _IOR('s', 13, uint64_t)//+`P40_STREAM_GET_HOST_BUF_READ_OFF` ?>
-
-#define P40_STREAM_GET_HOST_BUF_BYTES _IOR('m', 1, uint64_t)//+`P40_STREAM_GET_HOST_BUF_BYTES` ?>
-#define P40_STREAM_GET_HOST_BUF_BYTES_USED _IOR('m', 2, uint64_t)//+`P40_STREAM_GET_HOST_BUF_BYTES_USED` ?>
-#define P40_STREAM_GET_HOST_MSI_COUNT _IOR('m', 3, uint64_t)//+`P40_STREAM_GET_HOST_MSI_COUNT` ?>
-#define P40_STREAM_FREE_HOST_BUF_BYTES _IOWR('m', 4, uint64_t)//+`P40_STREAM_FREE_HOST_BUF_BYTES` ?>
-
-#define P40_ECS_GET_BAR_SIZE _IO('e', 1) //+`P40_ECS_GET_BAR_SIZE` ?>
-//TODO: why not _IOR?
-
-#endif//__PCIE40_IOCTL_H
diff --git a/Driver/pcie40_reload/.gitignore b/Driver/pcie40_reload/.gitignore
deleted file mode 100644
index ed2b39c..0000000
--- a/Driver/pcie40_reload/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-pcie40_reload_suid
-pcie40_reload_suid.out/
diff --git a/Driver/pcie40_reload/Makefile b/Driver/pcie40_reload/Makefile
deleted file mode 100644
index 29b8a33..0000000
--- a/Driver/pcie40_reload/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-HERE :=$(strip $(realpath $(dir $(lastword $(MAKEFILE_LIST)))))
-TOP :=$(realpath $(HERE)/..)
-
-include $(TOP)/common/flags.mk
-
-SCRIPTS :=pcie40_reload.sh
-SCRIPTS_INSTALL =$(DAQ40_PREFIX)/pcie40_reload
-
-PCIE40_RELOAD_SUID :=pcie40_reload
-PCIE40_RELOAD_SUID_OBJS =main.o
-PCIE40_RELOAD_SUID_CFLAGS =$(CFLAGS)
-PCIE40_RELOAD_SUID_INSTALL =$(SCRIPTS_INSTALL)
-
-PCIE40_RELOAD :=pcie40_reload
-PCIE40_RELOAD_LINK =$(SCRIPTS_INSTALL)/pcie40_reload_suid
-PCIE40_RELOAD_INSTALL =$(PREFIX)/bin
-
-PCIE40_RELOAD_MAN_DCRT =$(HERE)/man.dcrt
-PCIE40_RELOAD_MAN_INSTALL =$(PREFIX)/share/man
-
-include $(TOP)/common/rules.mk
-ifeq ($(ENABLE_PCIE40), true)
-$(eval $(call COPY_template,SCRIPTS,755))
-$(eval $(call LINK_template,PCIE40_RELOAD))
-$(eval $(call ODIR_template,PCIE40_RELOAD_SUID))
-$(eval $(call MAN_template,PCIE40_RELOAD,1))
-endif
-$(eval $(call DEFAULT_template))
diff --git a/Driver/pcie40_reload/main.c b/Driver/pcie40_reload/main.c
deleted file mode 100644
index c678193..0000000
--- a/Driver/pcie40_reload/main.c
+++ /dev/null
@@ -1,25 +0,0 @@
-#define _GNU_SOURCE
-#include <stdlib.h>
-#include <unistd.h>
-#include <stdio.h>
-#include <signal.h>
-#include <string.h>
-#include <limits.h>
-#include <libgen.h>
-
-int main(int argc, char *argv[])
-{
- char here_path[PATH_MAX];
- char script_path[PATH_MAX];
-
- if (readlink("/proc/self/exe", here_path, PATH_MAX) == -1) {
- perror("readlink");
- return -1;
- }
- // if (setresuid(0,0,0)) {
- // perror("setresuid");
- // return -1;
- //}
- snprintf(script_path, sizeof(script_path), "%s/pcie40_reload.sh", dirname(here_path));
- return execvp(script_path, argv);
-}
diff --git a/Lib/src/ecs/ecs.c b/Lib/src/ecs/ecs.c
deleted file mode 100644
index 0ec6d54..0000000
--- a/Lib/src/ecs/ecs.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/****************************************************************************************//**
-* \file ecs.c
-*
-* \brief This file contains the user library to access PCI driver.
-*
-* \author JM : 02/11/2013
-* \version 1.0
-* \date 08/11/2013
-
-* \copyright (c) Copyright CERN for the benefit of the LHCb Collaboration.
-* Distributed under the terms of the GNU General Public Licence V3.
-* ana.py script is free and open source software.
-
- CHANGELOG
- JM : 02/11/2013 Initial version
- JM/PYD : 04/11/2013 PYD code integration
- PYD : adapt for Paolo driver with its library and add multiple board choice
-*/
-/**************************************************************************************************
-The *Bar*() type of functions concentrate the conditional code which depends of the driver type.
-
-The ecs_*Lli() or ecs_*User() type of functions are driver blind and used to match user registers
-or lli registers.
-
-ecs_openUser() ecs_openLli()
-ecs_iordUser() ecs_iordLli()
-ecs_iowrUser() ecs_iowrLli()
-ecs_iordBlocUser() ecs_iordBlocLli()
-ecs_iowrBlocUser() ecs_iowrBlocLli()
-ecs_closeUser() ecs_closeLli()
-************************************************************************************************/
-#include <stdio.h>
-#include <unistd.h>
-#include <string.h>
-#include <stdlib.h>
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-
-#include <linux/ioctl.h>
-#include <sys/ioctl.h>
-
-#include <ecs.h>
-#include <systemConfig.h>
-
-// rpm includes
-// PYD 20/03/2018 force the use of rpm for all borads types
-#include <pcie40/ecs.h>
-
-/**
- * \var ecs_userFile
- * \brief ecs_open function return a file description which is stored on userFile for bar 0.
-*/
-static int ecs_userFile[MAX_DEV];
-
-/**
- * \var ecs_lliFile
- * \brief ecs_open function return a file description which is stored on lliFile for bar 2.
-*/
-static int ecs_lliFile[MAX_DEV];
-/**
- * \var ecs_bar2_mm
- * \brief ecs_open function for bar 2 mmaps registers area from a start address.
-*/
-static unsigned *ecs_bar1_mm[MAX_DEV]; // bar1 start add of mmap
-static unsigned *ecs_bar2_mm[MAX_DEV]; // bar2 start add of mmap
-
-/******************************************************//**
- * \fn int ecs_close(int dev, int bar)
- * \brief Function to close bar file
- *
- * \param dev: the selected board number
- * \param bar: the bar number
- *//******************************************************/
-void ecs_close(int dev, int bar){
- if (bar==2){
- p40_ecs_close(ecs_lliFile[dev],ecs_bar2_mm[dev]);
- }
- else if (bar==0){
- p40_ecs_close(ecs_lliFile[dev],ecs_bar1_mm[dev]);
- }
-}
-
-/******************************************************//**
- * \fn int ecs_open(int dev, int bar)
- * \brief Function to open bar file
- *
- * \param dev: the selected board number
- * \param bar: number of bar
- * \return -1 error / file descriptor
- *//******************************************************/
-int ecs_open(int dev,int bar){
- if (bar==2){
- ecs_lliFile[dev] = p40_ecs_open(dev,bar,&(ecs_bar2_mm[dev]));
- return ecs_lliFile[dev];
- }
- else if (bar==0){
- ecs_userFile[dev] = p40_ecs_open(dev,bar,&(ecs_bar1_mm[dev]));
- return ecs_userFile[dev];
- }
-return -1;
-}
-
-int ecs_write(int dev, int bar, unsigned add, int val){
- if (add%4 != 0)
- return(-1);
-
- if (bar==2){
- p40_ecs_w32(ecs_bar2_mm[dev],add,val);
- }
- else if (bar==0){
- p40_ecs_w32(ecs_bar1_mm[dev],add,val);
- }
- return(0);
-}
-
-unsigned ecs_read(int dev, int bar, unsigned add){
- uint32_t val;
- if (add%4 != 0)
- return(-1);
- if (bar==2){
- val = p40_ecs_r32(ecs_bar2_mm[dev],add);
- }
- else if (bar==0){
- val = p40_ecs_r32(ecs_bar1_mm[dev],add);
- }
- return val;
-}
-
-int ecs_iowrBar(int dev, int bar, unsigned add, unsigned *val){
- if (add%4 != 0)
- return(-1);
- if (bar==2){
- if (ecs_lliFile[dev] == 0) ecs_open(dev,bar);
- }
- else if (bar==0){
- if (ecs_userFile[dev] == 0) ecs_open(dev,bar);
- }
- ecs_write(dev,bar,add,*val);
- return(0);
-}
-
-int ecs_iordBar(int dev, int bar, unsigned add, unsigned *val){
- if (add%4 != 0)
- return(-1);
- if (bar==2){
- if (ecs_lliFile[dev] == 0) ecs_open(dev,bar);
- }
- else if (bar==0){
- if (ecs_userFile[dev] == 0) ecs_open(dev,bar);
- }
- *val = ecs_read(dev,bar,add);
- return(0);
-}
-int ecs_writeBloc(int dev, int bar, unsigned add, int size, unsigned *val){
- int i;
- unsigned wd;
- if (add%sizeof(unsigned) != 0)
- return(-1);
- for (i=0; i<size; i = i + 1){
- wd = val[i];
- ecs_write(dev,bar, add+i*sizeof(unsigned), wd);
- }
- return 0;
-}
-
-int ecs_readBloc(int dev, int bar, unsigned add, int size, unsigned *val){
- int i;
- if (add%4 != 0)
- return(-1);
- for (i=0; i<size; i = i + 1){
- val[i] = ecs_read(dev,bar,add+i*sizeof(unsigned));
- }
- return 0;
-}
-int ecs_iowrBarBloc(int dev, int bar, unsigned add, int size, unsigned *val){
- ecs_writeBloc(dev,bar,add,size,val);
-return 0;
-}
-
-int ecs_iordBarBloc(int dev, int bar, unsigned add, int size, unsigned *val){
- ecs_readBloc(dev,bar,add,size,val);
-return 0;
-}
-
-/***********************************************************************//**
- * \fn int ecs_printSetup()
- * \brief Function to print BAR configurations for checking
- *
- *//***********************************************************************/
-void ecs_printSetup(){
- printf("-------------------------------------------------\n");
- printf("driver type = MMAP (PCIe40 daq) version\n");
- printf("-------------------------------------------------\n");
- printf("BAR user = BAR%d\n",BAR_USER);
- printf("BAR i2c = BAR%d\n",BAR_I2C);
-
- printf("BASE i2c bus %d TEMPERATURES = 0x%08x\n", I2C_BUS_TEMPERATURES, I2C_BUS_BASE_TEMPERATURES);
- printf("BASE i2c bus %d CLEANER1 = 0x%08x\n", I2C_BUS_PLL_CLEANER1, I2C_BUS_BASE_PLL_CLEANER1);
- printf("BASE i2c bus %d CLEANER2 = 0x%08x\n", I2C_BUS_PLL_CLEANER2, I2C_BUS_BASE_PLL_CLEANER2);
- printf("BASE i2c bus %d PLL_TFC = 0x%08x\n", I2C_BUS_PLL_TFC, I2C_BUS_BASE_PLL_TFC);
- printf("BASE i2c bus %d SFP1 = 0x%08x\n", I2C_BUS_SFP1, I2C_BUS_BASE_SFP1);
- printf("BASE i2c bus %d SFP2 = 0x%08x\n", I2C_BUS_SFP2, I2C_BUS_BASE_SFP2);
- printf("BASE i2c bus %d MINIPODS = 0x%08x\n", I2C_BUS_MINIPODS, I2C_BUS_BASE_MINIPODS);
- printf("BASE i2c bus %d TEMP_MEZZANINE = 0x%08x\n", I2C_BUS_TEMP_MEZZANINE, I2C_BUS_BASE_TEMP_MEZZANINE);
- printf("BASE i2c bus %d CURRENT1 = 0x%08x\n", I2C_BUS_CURRENT1, I2C_BUS_BASE_CURRENT1);
- printf("BASE i2c bus %d CURRENT2 = 0x%08x\n", I2C_BUS_CURRENT2, I2C_BUS_BASE_CURRENT2);
-}
-
-// Usefull for python wrappers when memory is allocated by the lli C libs
-// it should be freed after python module has used it.
-void ecs_free( int *data) {
- free(data);
-}
-/***********************************************************************//**
- * \fn int ecs_openUser(int dev)
- * \brief Function to init the ecs pcie bus accesses for user space
- * Thus function has to be done before any access.
- *
- * Here we have a detailed description of the function
- *
- * \param : dev the board number
- * \return 0 success, -1 error
- *//***********************************************************************/
-int ecs_openUser(int dev){
- return ecs_open(dev,0);
-}
-
-/***********************************************************************//**
- * \fn int ecs_closeUser(int dev)
- * \brief Function to disconnect from the ecs user space.
- * A new ecs_open() should be done before any new read or write
- *
- * \param : dev the board number
- *//***********************************************************************/
-void ecs_closeUser(int dev){
- ecs_close(dev,0);
-}
-
-/***********************************************************************//**
- * \fn int ecs_openLli(int dev)
- * \brief Function to init the ecs pcie bus accesses for LLI devices
- * Thus function has to be done before any access.
- *
- * \param : dev the board number
- * \return 0 success, -1 error
- *//***********************************************************************/
-int ecs_openLli(int dev){
- return ecs_open(dev,2);
-}
-
-/***********************************************************************//**
- * \fn int ecs_closeLli(int dev)
- * \brief Function to disconnect from the LLI devices io.
- * A new ecs_openLli() should be done before any new read or write
- *
- * \param : dev the board number
- *//***********************************************************************/
-void ecs_closeLli(int dev){
- ecs_close(dev,2);
-}
-
-/***********************************************************************//**
- * \fn int ecs_iordLli(int dev, unsigned add, unsigned *val)
- * \brief Function to read a word at offset add in the lli registers space.
- *
- * \param : dev the board number
- * \param add the offset of the word to read in the lli register space
- * \param val a pointer to receive the read value in case of success
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iordLli(int dev, unsigned add, unsigned *val){
- return ecs_iordBar(dev, 2, add, val);
-}
-
-/***********************************************************************//**
- * \fn int ecs_iowrLli(int dev, unsigned add, unsigned *val)
- * \brief Function to write a word at offset add in the Lli registers space.
- *
- * \param : dev the board number
- * \param add the offset of the word to write in the Lli registers space
- * \param val a pointer to the value to write
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iowrLli(int dev, unsigned add, unsigned *val){
- return ecs_iowrBar(dev, 2, add, val);
-}
-
-/***********************************************************************//**
- * \fn int ecs_iordBlocLli(unsigned add, int size, unsigned *val)
- * \brief Function to read size words at offset add in the lli registers space.
- *
- * \param : dev the board number
- * \param add : the offset of the word to read in the lli register space
- * \param size : number of bytes to read
- * \param val : a pointer to receive the read value in case of success
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iordBlocLli(int dev, unsigned add, int size, unsigned *val){
- return ecs_iordBarBloc(dev, 2, add, size, val);
-}
-
-/***********************************************************************//**
- * \fn int ecs_iowrBlocLli(unsigned add, int size, unsigned *val)
- * \brief Function to write size words at offset add in the Lli registers space.
- *
- * \param : dev the board number
- * \param add : the offset of the word to write in the Lli registers space
- * \param size : number of bytes to write
- * \param val : a pointer to the value to write
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iowrBlocLli(int dev, unsigned add, int size, unsigned *val){
- return ecs_iowrBarBloc(dev, 2, add, size, val);
-}
-
-/***********************************************************************//**
- * \fn int ecs_iordI2c(int dev, unsigned add, unsigned *val)
- * \brief Function to read a word at offset add in the I2C core registers space.
- *
- * \param : dev the board number
- * \param add the offset of the word to read in the I2C core register space
- * \param val a pointer to receive the read value in case of success
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iordI2c(int dev, unsigned add, unsigned *val){
- return ecs_iordLli(dev, add, val);
-}
-int ecs_iordI2c_slow(int dev, unsigned add, unsigned *val){
- int dat = ecs_iordLli(dev, add, val);
- usleep(0);
- return dat;
-}
-/***********************************************************************//**
- * \fn int ecs_iowrI2c(unsigned add, unsigned *val)
- * \brief Function to write a word at offset add in the I2C core registers space.
- *
- * \param : dev the board number
- * \param add the offset of the word to write in the I2C core registers space
- * \param val a pointer to the value to write
- * \return 0 success,-1 error
- *//***********************************************************************/
-int ecs_iowrI2c(int dev, unsigned add, unsigned *val){
- return ecs_iowrLli(dev, add, val);
-}
-int ecs_iowrI2c_slow(int dev, unsigned add, unsigned *val){
- int dat = ecs_iowrLli(dev, add, val);
- usleep(0);
- return dat;
-}
diff --git a/Lib/src/minipods/i2cDriver.c b/Lib/src/minipods/i2cDriver.c
deleted file mode 100644
index f75267d..0000000
--- a/Lib/src/minipods/i2cDriver.c
+++ /dev/null
@@ -1,656 +0,0 @@
-/****************************************************************************************//**
-* \file i2cDriver.c
-*
-* \brief This unit is a simple driver library for I2C bus based on the Open-Core I2C-master.
-*
-* \author PYD : 12/6/2013
-* \version 0.1
-* \date 12/6/2013
-
-* PYD : 12/6/2013 initial version
-* PYD : 01/10/2018 remove code for ES12 and ES3 versions
-*//******************************************************************************************/
-#include <stdio.h>
-#include <error.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-
-#define offsetReg(r) (r*4)
-
-//========================= SYSTEM CONFIGURATION =================================
-#include <systemConfig.h>
-#include <ecs.h>
-//================================================================================
-// USER ORIENTED PROCEDURES FOR EXTERNAL USE
-#include <i2cDriver.h>
-//===============================================================================
-//#define I2C_FREQ 0xc7 ;#(199dec) value for 100MHz clock to match 100kHz SCL
-//#define I2C_FREQ 0x31 ;#(49dec) value for 100MHz clock to match 400kHz SCL
-//#define I2C_FREQ 0x18 ;#(24dec) value for 100MHz clock to match 800kHz SCL
-
-// addresses of I2C registers (start at 0xa40 in qsys)
-#define I2C_PRELOREG 0x0
-#define I2C_PREHIREG 0x1
-#define I2C_CTRLREG 0x2
-#define I2C_TSMTREG 0x3
-#define I2C_RCVREG 0x3
-#define I2C_CMDREG 0x4
-#define I2C_STATREG 0x4
-
-// Control register
-#define I2C_ENA 0x80
-#define I2C_DIS 0x00
-// Command register bits
-#define I2C_STA 0x80
-#define I2C_STO 0x40
-#define I2C_RD 0x20
-#define I2C_WR 0x10
-#define I2C_NACK 0x08
-#define I2C_IACK 0x01
-// Status register bits
-#define I2C_TIP 0x02
-#define I2C_BUSY 0x40
-
-/***********************************************************************//**
- * \fn int unsigned I2C_MakeAvagoAdd(compNb)
- * \brief Function to build a device address
- *
- * For TX(pair) the address is 0101hjkx (hjk is hard add) (x is 1=R 0=W)
- *
- * For RX(odd) the address is 0110hjkx (hjk is hard add) (x is 1=R 0=W)
- *
- * NOTE the x is added in Read/Write function
- *
- * \return the I2c address
- *//***********************************************************************/
-/*
-static unsigned i2c_MakeAvagoAdd(int compNb) {
- unsigned i2cAdd;
-// partern 0 + 0101/TX or 0110/RX + fixAdd on 3digits
- if (compNb%2)
- i2cAdd = 5<<3;
- else
- i2cAdd = 6<<3;
- i2cAdd = i2cAdd + compNb;
-
- return(i2cAdd);
-}
-*/
-
-unsigned lastSetInCLK[MAX_DEV];
-unsigned LastSetSCLfreq[MAX_DEV];
-
-static int getBusBase(int bus){
- switch(bus){
- case I2C_BUS_TEMPERATURES:
- return(I2C_BUS_BASE_TEMPERATURES);
- break;
- case I2C_BUS_PLL_CLEANER1:
- return(I2C_BUS_BASE_PLL_CLEANER1);
- break;
- case I2C_BUS_PLL_CLEANER2:
- return(I2C_BUS_BASE_PLL_CLEANER2);
- break;
- case I2C_BUS_PLL_TFC:
- return(I2C_BUS_BASE_PLL_TFC);
- break;
- case I2C_BUS_SFP1:
- return(I2C_BUS_BASE_SFP1);
- break;
- case I2C_BUS_SFP2:
- return(I2C_BUS_BASE_SFP2);
- break;
- case I2C_BUS_MINIPODS:
- return(I2C_BUS_BASE_MINIPODS);
- break;
- case I2C_BUS_TEMP_MEZZANINE:
- return(I2C_BUS_BASE_TEMP_MEZZANINE);
- break;
- case I2C_BUS_CURRENT1:
- return(I2C_BUS_BASE_CURRENT1);
- break;
- case I2C_BUS_CURRENT2:
- return(I2C_BUS_BASE_CURRENT2);
- break;
- case I2C_BUS_FANOUT:
- return(I2C_BUS_BASE_FANOUT);
- break;
- case I2C_BUS_FPGA_EEPROM:
- return(I2C_BUS_BASE_FPGA_EEPROM);
- default:
- printf("ERROR: unknown i2c bus number %d in file %s line %d\n",bus,__FILE__,__LINE__);
- return(99);
- }
-}
- /***********************************************************************//**
- * \fn void i2c_enable(int dev, int bus)
- * \brief Function to activate the i2c-opencore IP.
- * \param dev: the board number
- * \param bus: the target i2c bus number
- *//***********************************************************************/
-static void i2c_enable(int dev, int bus) {
- unsigned cval = I2C_ENA;
-
- ecs_iowrI2c_slow( dev, getBusBase(bus)+ (I2C_CTRLREG*4), &cval);
-}
-/***********************************************************************//**
- * \fn void i2c_disable(int dev,int bus)
- * \param dev: the board number
- * \brief Function to deactivate the i2c-opencore IP.
- * \param bus: the target i2c bus number
- *//***********************************************************************/
-static void i2c_disable(int dev,int bus) {
- unsigned cval = I2C_DIS;
-
- ecs_iowrI2c_slow( dev, getBusBase(bus)+ (I2C_CTRLREG*4), &cval);
-}
-/***********************************************************************//**
- * \fn void i2c_stop(int dev,int bus)
- * \param dev: the board number
- * \brief Function to generate the stop condition on the i2c bus.
- * \param bus: the target i2c bus number
- *//***********************************************************************/
-static void i2c_stop(int dev, int bus) {
- unsigned cval = I2C_STO;
-
- ecs_iowrI2c_slow( dev, getBusBase(bus)+ (I2C_CMDREG*4), &cval);
-}
-
-/****************************************************************************//**
- * \fn void i2c_setSpeed(int dev, int bus, int value)
- * \brief Function to program the prescale the SCL clock line. Should be called
- * before the I2C use.
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param value: the value to write in the prescale register
- *//**************************************************************************/
-static void i2c_setSpeed(int dev, int bus, int value ) {
- unsigned cval = value>>8;
- int base = getBusBase(bus);
-
- ecs_iowrI2c_slow(dev, base + (I2C_PREHIREG*4), &cval);
- cval =value & 0xFF;
- ecs_iowrI2c_slow(dev, base + (I2C_PRELOREG*4), &cval);
-}
-/****************************************************************************//**
- * \fn int i2c_init(int dev, int bus, unsigned inCLK, unsigned SCLfreq)
- * \brief Function to open access to i2c opencore and set speed
- * \ if it is specified
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param inCLK: the input system clock ferquency in Hz
- * \param SCLfreq: the target SCL clock frequency in Hz
- * \return 0 success,-1 error
- *//**************************************************************************/
-int i2c_init(int dev, int bus, unsigned inCLK, unsigned SCLfreq) {
- long int prescale;
-
-// printf("Simulation init with clock %d fequency %d \n",inCLK, SCLfreq); return(0);
-
- if (ecs_openLli(dev)<0){
- printf("ERROR: Can't init I2C\n");
- return(-1);
- }
- i2c_stop(dev, bus);
- i2c_disable(dev, bus);
- i2c_enable(dev, bus);
- // set prescale register
- if (inCLK!=0 && SCLfreq !=0){
- prescale = (inCLK/(5*SCLfreq))-1;
-// printf("PYD i2c i2c_init() bus %d applied speed is %ld\n", bus, prescale);
- i2c_setSpeed(dev, bus, prescale);
- lastSetInCLK[dev] = inCLK;
- LastSetSCLfreq[dev] = SCLfreq;
- }
- return(0);
-}
-
-/****************************************************************************//**
- * \fn int i2c_getInit(int dev, int bus, unsigned &inCLK, unsigned &SCLfreq)
- * \brief Read the last values in the prescale of the SCL clock line.
- *
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param inCLK: the system clock ferquency in Hz
- * \param SCLfreq: the target SCL clock frequency in Hz
- *//**************************************************************************/
-void i2c_getInit(int dev, int bus, unsigned *inCLK, unsigned *SCLfreq) {
- *inCLK = lastSetInCLK[dev];
- *SCLfreq = LastSetSCLfreq[dev];
-}
-/***********************************************************************************//**
- * \fn int _waitTIP()
- * \brief function to wait for the status register TIP bit value 0 "transfer complete"
- *
- * \param dev: the borad number
- * \param bus: the target i2c bus number
- * \return 0 success,-1 error
- *//********************************************************************************/
-static int i2c_waitTIP(int dev, int bus) {
- unsigned val, step = 0;
- int base = getBusBase(bus);
- while(1){
- usleep(10); //MJ POUR TEMPO_FERNAND LE 12 SEPT 2017
-// printf("step %d\n", step);
- step = step + 1;
- if(ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &val)==0){
-// printf("PYD status 0x%x\n", val);
- if ((val & I2C_TIP) == 0){ //transfer complete
- return(0);
- } else { // transfer in progress
- if (step > 500){
- printf("ERROR: timeout in i2c_waitTIP()\n");
- return(-1);
- } else {
- usleep(10);
-// printf("PYD wait %d\n", step);
-// for (i=0; i<loop; i++) dum++;
- }
- }
- } else { // read error
- printf("i2c_waitTIP firmware level read error KO\n");
- return(-1);
- }
- }//while
-}
-
-/***********************************************************************//**
- * \fn int i2c_readMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, unsigned *val)
- * \brief Function to read one single register
- *
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param slaveAdd: the address of the device to write in the I2C space
- * \param regIndex: the number of the register in the component
- * \param val : a pointer to receive the read value
- * \return 0 success,-1 error
- *//***********************************************************************/
-int i2c_readMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, unsigned *val) {
- unsigned cval;
- int base = getBusBase(bus);
-
- // generate start command
- // write $slaveAdd (slaveAdd+WR bit) in transmitReg
- //
- // printf("PYD bus=%d i2c_readMem() at base 0x%x subadd 0x%x register %d\n", bus, base, slaveAdd, regIndex);
-// printf("Simulation\n"); *val=0x55; return(0);
-
- cval = slaveAdd<<1;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set STA bit and WR bit in commandReg
- cval = I2C_STA | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus=%d i2c_readMem() first transaction slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $regIndex in transmitReg
- //
- cval = regIndex;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set WR bit in commandReg
- cval = I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR:bus %d i2c_readMem() second transaction slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $slaveAdd (slaveAdd+RD bit) in transmitReg
- //
- cval = slaveAdd<<1 | 1;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set STA bit and WR bit in commandReg
- cval = I2C_STA | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus %d i2c_readMem() third transaction slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // set RD bit, set ACK bit =1(NACK) set STO bit in commandReg
- //
- cval = I2C_RD | I2C_NACK | I2C_STO;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait for TIP flag in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- return( ecs_iordI2c_slow(dev, base + (I2C_RCVREG*4), val) );
-}
-/***********************************************************************//**
- * \fn int i2c_writeMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, unsigned *val)
- * \brief Function to write a value in a register
- *
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param slaveAdd: the address of the device to write in the I2C space
- * \param regIndex: the number of the register in the component
- * \param val : a pointer to the value to write
- * \return 0 success,-1 error
- *//***********************************************************************/
-int i2c_writeMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, unsigned *val){
- unsigned cval;
- int base = getBusBase(bus);
-
- // generate start command
-// printf("bus %d i2c_writeMem() at add 0x%x register %d val %x\n", bus, slaveAdd, regIndex, *val);
-// printf("Simulation\n"); return(0);
- // write $slaveAdd (slaveAdd+WR bit) in transmitReg
- cval = slaveAdd<<1;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set STA bit and WR bit in commandReg
- cval = I2C_STA | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus %d slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $regIndex in transmitReg
- //
- cval = regIndex;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set WR bit in commandReg
- cval = I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus %d slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $slaveAdd (slaveAdd+RD bit) in transmitReg
- //
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), val);
- // set STA bit and WR bit in commandReg
- cval = I2C_STO | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
-return(0);
-}
-/***********************************************************************//**
- * \fn int i2c_multReadMemInit(int dev, int bus, unsigned slaveAdd, unsigned regIndex)
- * \brief Function to initialize a multiread sequence from slave at
- * i2c address slaveAdd starting at device internal register regIndex
- *
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param slaveAdd: the address of the device to read from in the I2C space
- * \param regIndex: the number of the first register in the sequence to read
- * \return 0 success,-1 error
- *//***********************************************************************/
-static int i2c_multReadMemInit(int dev, int bus, unsigned slaveAdd, unsigned regIndex) {
- unsigned cval;
- int base = getBusBase(bus);
-
- // generate start command
- // write $slaveAdd (slaveAdd+WR bit) in transmitReg
- //
-// printf("PYD start i2c_multReadMemInit\n");
- cval = slaveAdd<<1;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set STA bit and WR bit in commandReg
- cval = I2C_STA | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
-// printf("PYD wait for TIP flag in statusReg\n");
- // wait for TIP flag in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
-// printf("PYD read statusReg to verify RxACK=0\n");
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus %d slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $regIndex in transmitReg
- //
-// printf("PYD write $regIndex in transmitReg\n");
- cval = regIndex;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set WR bit in commandReg
- cval = I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- // read statusReg to verify RxACK=0
- ecs_iordI2c_slow(dev, base + (I2C_STATREG*4), &cval);
- if ((cval & I2C_NACK) == I2C_NACK){
- printf("ERROR: bus %d slave address not acknowledge in I2C_Write\n",bus);
- return(-1);
- }
- //
- // write $slaveAdd (slaveAdd+RD bit) in transmitReg
- //
-// printf("PYD write $slaveAdd (slaveAdd+RD bit) in transmitReg\n");
- cval = slaveAdd<<1 | 1;
- ecs_iowrI2c_slow(dev, base + (I2C_TSMTREG*4), &cval);
- // set STA bit and WR bit in commandReg
- cval = I2C_STA | I2C_WR;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait fir TIP flaf in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
-// printf("PYD end i2c_multReadMemInit\n");
-return(0);
-}
-/******************************************************************************//**
- * \fn int i2c_multReadMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, int nb)
- * \brief Function to read/print a sequence of nb conscecutive registers from slave at
- * i2c address slaveAdd starting at device internal register regIndex
- * Used with nb=1 is a function to read one register value
- *
- * This function allocate the array to store the read data in. The user
- * should free it after use.
- *
- * \param dev: the board number
- * \param bus: the target i2c bus number
- * \param slaveAdd: the address of the device to read from in the I2C space
- * \param regIndex: the number of the first register in the sequence to read
- * \param nb : the number of conscecutives registers to read
- * \param data : a pointer to receive the data array reference
- * \return 0 success,-1 error
- *//******************************************************************************/
-int i2c_multReadMem(int dev, int bus, unsigned slaveAdd, unsigned regIndex, int nb, unsigned **data) {
- unsigned cval;
- int i;
- unsigned *bloc;
-
- int base = getBusBase(bus);
-
- if (i2c_multReadMemInit(dev, bus, slaveAdd, regIndex) != 0)
- return(-1);
- bloc = malloc(nb*sizeof(unsigned));
- if (bloc==0){
- perror("Can't malloc in i2c_multReadMem()\n");
- return(-1);
- }
-/* printf("Reading bytes at slave add 0x%x (%d) starting at internal address 0x%x (%d)\n",
- slaveAdd, slaveAdd, regIndex, regIndex);
-*/
- // Read and display values
- cval = I2C_RD;
-// printf("PYD read loop\n");
- for (i=0; i<(nb-1); i++){
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait for TIP flag in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- ecs_iordI2c_slow(dev, base + (I2C_RCVREG*4), &bloc[i]);
-// printf("PYD 0x%x ");
- }
-// printf("PYD\n");
-
- // last byte to transfer
- cval = I2C_RD | I2C_NACK | I2C_STO;
- ecs_iowrI2c_slow(dev, base + (I2C_CMDREG*4), &cval);
- // wait for TIP flag in statusReg
- if ( i2c_waitTIP(dev, bus) != 0)
- return(-1);
- ecs_iordI2c_slow(dev, base + (I2C_RCVREG*4), &bloc[nb-1]);
- *data = bloc;
- return(0);
-}
-
-#ifdef MAIN_DRIVER
-int main(){
- unsigned val, i2cAdd;
- unsigned cval[3];
- int i, loop;
- unsigned val1[] = { 0x4, 0x5, 0xc0 };
- unsigned val2[] = { 0xa, 0xb, 0x00 };
- unsigned i2cAddTab[] = {0x28, 0x31, 0x2A, 0x33, 0x2C, 0x35};
- unsigned *data;
- int base;
- int dev = 0;
-
- if (ecs_openLli(dev) != 0){
- perror("Can't access i2c ocore\n");
- exit(0);
- }
- printf("TEST on PCIe access to ocore regsiters\n");
- printf("======================================\n");
- base = I2C_BASE_0;
-
- // raw test for pcie access to opencore registers
- ecs_iordI2c(dev, base + (I2C_PRELOREG*4), &cval[0]);
- ecs_iordI2c(dev, base + (I2C_PREHIREG*4), &cval[1]);
- ecs_iordI2c(dev, base + (I2C_CTRLREG*4), &cval[2]);
- printf("Before ...\n");
- for (i=0; i<3; i++)
- printf("Ox%x ", cval[i]);
- printf("\n");
-
- ecs_iowrI2c(dev, base + (I2C_PRELOREG*4), &val1[0]);
- ecs_iowrI2c(dev, base + (I2C_PREHIREG*4), &val1[1]);
- ecs_iowrI2c(dev, base + (I2C_CTRLREG*4), &val1[2]);
- printf("After first loop ... should be equal\n");
- ecs_iordI2c(dev, base + (I2C_PRELOREG*4), &cval[0]);
- ecs_iordI2c(dev, base + (I2C_PREHIREG*4), &cval[1]);
- ecs_iordI2c(dev, base + (I2C_CTRLREG*4), &cval[2]);
- for (i=0; i<3; i++)
- printf(" Ox%x =?= 0x%x |", cval[i], val1[i]);
- printf("\n");
-
- exit(0);
-
- ecs_iowrI2c(dev, base + (I2C_PRELOREG*4), &val2[0]);
- ecs_iowrI2c(dev, base + (I2C_PREHIREG*4), &val2[1]);
- ecs_iowrI2c(dev, base + (I2C_CTRLREG*4), &val2[2]);
- printf("After second loop ... should be equal\n");
- ecs_iordI2c(dev, base + (I2C_PRELOREG*4), &cval[0]);
- ecs_iordI2c(dev, base + (I2C_PREHIREG*4), &cval[1]);
- ecs_iordI2c(dev, base + (I2C_CTRLREG*4), &cval[2]);
- for (i=0; i<3; i++)
- printf("Ox%x =?= 0x%x |", cval[i], val2[i]);
- printf("\n");
-
- printf("\nTEST on I2C access to avago registers\n");
- printf("=====================================\n");
- // init and set address for TX 0
-// i2c_init(dev, 100000000, 100000); // for TCL/TK because jtag master set this clock
- i2c_init(dev, 125000000, 100000); // fast clock with PCI
-// i2c_init(dev, 62500000, 100000); // slow clock with PCI
- // set i2c address of avago number 0 (a TX)
- printf("Select avago number 0 (a TX) as target\n");
- i2cAdd = 5<<3; // comp 0 TX
-
- printf("Read register 0 should be 0x00 ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 0, &val);
- printf("(0x%x)\n", val);
-
-
- printf("Write NULL in page select register\n");
- val = 0; // select page 0
- i2c_writeMem(dev, i2cAdd, 127, &val);
- printf("Read read page select register should be NULL ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 127, &val);
- printf("(0x%x)\n", val);
-
- printf("Write 1 in page select register\n");
- val = 1; // select page 0
- i2c_writeMem(dev, i2cAdd, 127, &val);
- printf("Read read page select register should be 1 ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 127, &val);
- printf("(0x%x)\n", val);
-
- printf("Write NULL in page select register\n");
- val = 0; // select page 0
- i2c_writeMem(dev, i2cAdd, 127, &val);
- printf("Read read page select register should be NULL ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 127, &val);
- printf("(0x%x)\n", val);
-
- printf("Write 0xff in register 94 squelch\n");
- val = 0xff; // select page 0
- i2c_writeMem(dev, i2cAdd, 94, &val);
- printf("Read squelch ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 94, &val);
- printf("(0x%x)\n", val);
-
- printf("Write 0xff in register 95 squelch\n");
- val = 0xff; // select page 0
- i2c_writeMem(dev, i2cAdd, 95, &val);
- printf("Read squelch ---> read ");
- val = 0xaa;
- i2c_readMem(dev, i2cAdd, 95, &val);
- printf("(0x%x)\n", val);
-
- printf("Read Vendor Name\n");
- loop = 16;
- // test to read vendor name at reg 152 to 167 (16bytes)
- // in module at address 0
- for (i=0; i<loop; i++){
- val = 1;
- i2c_readMem(dev, i2cAdd, 152+i, &val);
-// printf("0x%x %c ", val, (char)val);
- printf("%c", (char)val);
- }
- printf("\n");
-
- i2c_multReadMem(dev, i2cAdd, 152, 16, &data);
- for (i=0; i<loop; i++)
- printf("%c", (char)data[i]);
- printf("\n");
-
-return(0);
-}
-#endif
-
-
--
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