b2slc.py

import argparse
from ctypes import *

lli = CDLL("libpcie40.so")

parser = argparse.ArgumentParser( description = 'Read/Write registers via slow control' )
parser.add_argument( '-a' , '--address' , type=lambda x: int(x,0) , required = True )
group = parser.add_mutually_exclusive_group(required = True)
group.add_argument('-r','--read',action='store_true')
group.add_argument('-w','--write', type = int )
parser.add_argument( '-t' , '--type' , choices=['8b','32b'], default='32b', help='Access type (8 bits or 32 bits), 32 bits by default')

args = parser.parse_args()
result = 0 
lli.ecs_open( 0 , 2 )

if ( args.read ):
    if args.type == '32b':
        result = lli.pcie40_readfee32( 0 , args.address )
    else:
        result = lli.pcie40_readfee8( 0 , args.address )
    print 'Read value 0x{:X} (address = 0x{:X})'.format(result,args.address)
else:
    if args.type == '32b':
        result = lli.pcie40_writefee32( 0 , args.address , args.write )
    else:
        result = lli.pcie40_writefee8( 0 , args.address , args.write )
    print 'Wrote value 0x{:X} (address = 0x{:X})'.format(args.write,args.address)

lli.ecs_close( 0 , 2 )