Add slow control scripts

Pcie40Applications/main_pcie40_b2slc.c

@@ -5,8 +5,7 @@
 int main(int argc, char *argv[]) { 
   ecs_open( 0 , 2 ) ;
 
-  int data ; 
-  int result = pcie40_readfee32( 0 , 0x12 , &data ) ;
+  int result = pcie40_readfee32( 0 , 0x12 ) ;
   
   ecs_close( 0 , 2 ) ;
 

Pcie40Libraries/pcie40_b2slc.c

@@ -117,7 +117,7 @@ int pcie40_writefee8( int dev , int adr , int val ) {
 //==============================================================================
 // Read 32b
 //==============================================================================
-int pcie40_readfee32( int dev , int adr , int *valp ) {
+int pcie40_readfee32( int dev , int adr ) {
   // PCIe40
   if ( ( adr <0 ) || ( adr > 0xFFFF ) ) return -1 ;
   // Reset the FIFO

Pcie40Libraries/pcie40_b2slc.h

@@ -19,7 +19,7 @@ int pcie40_readfee8(int fd, int adr);
 
 int pcie40_writefee8(int fd, int adr, int val);
 
-int pcie40_readfee32(int fd, int adr, int *valp);
+int pcie40_readfee32(int fd, int adr);
 
 int pcie40_writefee32(int fd, int adr, int val);
 

Scripts/b2slc.py

+import argparse
+from ctypes import *
+
+lli = CDLL("libpcie40.so")
+
+parser = argparse.ArgumentParser( description = 'Read/Write registers via slow control' )
+parser.add_argument( '-a' , '--address' , type=lambda x: int(x,0) , required = True )
+group = parser.add_mutually_exclusive_group(required = True)
+group.add_argument('-r','--read',action='store_true')
+group.add_argument('-w','--write', type = int )
+parser.add_argument( '-t' , '--type' , choices=['8b','32b'], default='32b', help='Access type (8 bits or 32 bits), 32 bits by default')
+
+args = parser.parse_args()
+result = 0 
+lli.ecs_open( 0 , 2 )
+
+if ( args.read ):
+    if args.type == '32b':
+        result = lli.pcie40_readfee32( 0 , args.address )
+    else:
+        result = lli.pcie40_readfee8( 0 , args.address )
+    print 'Read value 0x{:X} (address = 0x{:X})'.format(result,args.address)
+else:
+    if args.type == '32b':
+        result = lli.pcie40_writefee32( 0 , args.address , args.write )
+    else:
+        result = lli.pcie40_writefee8( 0 , args.address , args.write )
+    print 'Wrote value 0x{:X} (address = 0x{:X})'.format(args.write,args.address)
+
+lli.ecs_close( 0 , 2 )
+