main_pcie40_readFPGAversion.cpp

/****************************************************************************************//**
* \file				readFPGAMemoire.c
*
*  lecture de la memore du FPGA 
*  la taille est de x octets
* l'adresse de depart de lecture vaut 0
*//********************************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <getopt.h>
#include <iostream>
#include "pcie40_b2config.h"
#include "pcie40_ecs.h"


#define SIZE_MEMO_FPGA 1024   /* taille  max de la memoire interne FPG */

int main(int argc, char *argv[]){
	int board = 0;
        int i;
	unsigned val;
	int reg = 0;
        char contenuMemoireFPGA[SIZE_MEMO_FPGA + 2];

	ecs_openLli(board);
	for(i=0; i < SIZE_MEMO_FPGA; i++)
        {
	   if (ecs_iordLli(board, reg, &val)!=0)
             {
		 printf("LLI bar2 Read fails at 0x%08x\n", reg);
		 exit(0);
             }

           contenuMemoireFPGA[i] = val;
	   reg += 4;
           
	}
        contenuMemoireFPGA[SIZE_MEMO_FPGA+1] = '\0';
 	printf("contenu memoire FPGA   %s\n",contenuMemoireFPGA);		
	ecs_closeLli(board);
	ecs_open( 0 , 2 ) ;
	std::cout << pcie40_fpgaVersion( 0 ) << std::endl ;
	ecs_close( 0 , 2 ) ;
	return 0;
}