Set core voltage of libero project in tcl script
The core voltage couldn't be configured through the new_project command in corel-tsfpga/corel_tsfpga/tsfpga/libero/tcl.py following this: https://onlinedocs.microchip.com/pr/GUID-3D4C6B83-916E-4A35-8894-A0E1E63ED7CF-en-US-4/index.html?GUID-EB38F8B2-A5A6-43B8-8E0C-7197F01E1E24
Edited by Arooj Asif