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Created with Raphaël 2.2.05Aug3129Jul282721201913520Jun1617May228Apr2614Mar422Feb13Jan26Aug13Jul1223Jun7Apr15Mar16Feb9Dec318Nov22Oct31Aug2625181131Jul302418Jun329May2827824Apr3131Mar30282726252423201918137Feb30Jan2827814Oct27Sep252422May1629Apr22Mar137420Feb1814526Nov191288Oct4130Aug818Jul7May25Apr231216Mar1319Feb30Mar210Feb12Dec924Nov313Oct20Sep16146219Aug181727Jul262184130Jun231May27Add units to some variablesMake sure the FPGA timeout is set on startAdd command to reset the TEC deviceUpdate variable mapping and fix namesAlign some parameters with the panelFix typos in propertiesAllow arbitrary names of tec module[project-template] add coding style checkerconfig: Remove comment in generated outputAdd Module control variables to mapAdd generator and first version of mako templateEnable use of more than one TEC moduleproject-template: update clang-format configurationMerge https://github.com/ChimeraTK/project-templateproject-template: update clang-format (ReflowComments)Install module header and generate config fileEnable code coverage reportRequire TEC version 2.0Merge https://github.com/ChimeraTK/project-templateRename module libraryChange errorStatus into a boolean flagRemove debug outputRemove useless enableDebug call in testMake enableDebug a booleanFix compiler warningsAuto-generate group description namesRemove autotune variablesAdd check for read-only variables in dummyAdd CRC errors to dummy and teststec: Reset communication after FPGA timed outRevert "Fix AllParameters test after CSA API change"Merge pull request #15 from zenker/masterIgnore eclipse python project file.Add test for heartbeat functionalityAdd lower limit for FPGA timeoutImplement heartbeat featureFix AllParameters test after CSA API changeUse ctk::Boolean for bit command registersMerge branch 'jgeorg/fix-test-fails' into 'master'Use 32bit unsigned for TEC data transfer
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