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1.1.0
Release 1.1.0 - IBUS adapter, 2D ext bus
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1.0.1
Release 1.0.1 * AXI4-Lite to DPM interface fix * Python style changes * documentation updates regarding the template engine
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0.2.1
Release 0.2.1 * fixes a VHDL component declaration * fixes an address decoding bug where the generated core wouldn't respond when instantiated at an offset in a greater address space
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0.1.0
Desyrdl 0.1.0 - initial version ready for user tests