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Created date
Dma debug
!10
· created
Jun 14, 2024
by
Cagil Guemues
Merged
updated
Jun 14, 2024
ZCU208 Switch
!9
· created
Jun 11, 2024
by
Cagil Guemues
Merged
updated
Jun 11, 2024
Load PL with fpgautil at runtime, not at FSBL time
!8
· created
May 27, 2024
by
Patrick Huesmann
Merged
2
updated
May 27, 2024
feat: packetizer with Yocto
!7
· created
Apr 09, 2024
by
Cagil Guemues
Merged
updated
Apr 09, 2024
Misc improvements
!6
· created
Feb 20, 2024
by
Patrick Huesmann
daq_packetizer
Merged
updated
Feb 20, 2024
add: libudmaio, pyudmaio, init-udmabuf
!5
· created
Nov 30, 2023
by
Cagil Guemues
Merged
updated
Nov 30, 2023
feat: DMA Engine with AXI4-Stream Packetizer
!4
· created
Nov 29, 2023
by
Cagil Guemues
Merged
updated
Nov 29, 2023
Change cfg for re-introduction of fwk-utils and techlab-utils layers
!3
· created
Nov 15, 2023
by
Cagil Guemues
yocto_build
Merged
Approved
updated
Nov 17, 2023
Build Yocto Release 2022.2 with FWK
!2
· created
Nov 13, 2023
by
Cagil Guemues
Merged
updated
Nov 22, 2023
PL-DDR4 integration
!1
· created
Nov 08, 2023
by
Cagil Guemues
Merged
updated
Nov 08, 2023
