Desyrdl integration

Changelog:

• Drop IBUS and replace it with DesyRDL
• Rename several registers and their sizes. (Pack 'ENABLE' registers into a single 32 bit register to save resources)
• DAQ now has the capability to have up to 32 regions (without CW mode enabled. see fishy part below)
• Improve documentation

A few things are still fishy:

• The timestamp memory region does not scale with the C_DAQ_REGIONS parameter. It is still fixed to 3.

Latest commit got tested against KU example project. Register read/write works. However, DDR access is not tested (yet).