Improve documentation (#12204)

Changelog:

• Vastly improve the BSP firmware documentation
• Added PLL Configuration file and SI-Labs project for the SI5341 PLL
• Remove MIG_INIT_DONE register for US
• Add C2C_LINK_ERROR register for US
• change con folder to cstr to be compatible with Windows
• Cleanup map file generation for both FPGAs (now Xilinx IPs show up on the map file - IIC/GPIO/INTC etc)