fix(slv): rework loop ranges

There seems to be a VHDL language issue that GHDL trips over, while other simulators don't. A loop range with implicit conversion of the range limits to integers seems to be disallowed in VHDL-93 and VHDL-2002 (just a warning in VHDL-93c, apparently). One workaround would have been to use 'for I in integer range ...' instead. Find VHDL issue number 2073 (IR2073.txt) for reference.

This change was suggested in this form (using the range attribute) here: https://stackoverflow.com/a/26131641 It also resolves a potential case where the length of the argument to f_slv_to_XXXb_slv_vector() is not a multiple of that number XXX.