feat(bus): axi4l over spi and II over spi (!24) · Merge requests · FPGA Firmware / Libraries / desy_vhdl

Lukasz Butkowski requested to merge axi_ov_spi into main Apr 04, 2023

Implemented axi4l over spi manager and II over spi subordinate. Compatible with SPI 4 wire interface. Verified both within one test bench.

Porting desy_lib_svn components:

Extending conversion functions for desy_rdl compatibility

Edited Apr 04, 2023 by Lukasz Butkowski

feat(bus): axi4l over spi and II over spi