feat(tool): GHDL tool support added

need to spec variables
 ::fwfwk::src::Top variable with top entity
 ::fwfwk::src::SimTop variable with the list of tops to simulate/test
 ::fwfwk::src::SimTime spec default simulation run time

Refs: #9214

Makefile

@@ -244,6 +244,21 @@ rust_hdl: config
 vhdl_tool: config
 	$(TCLSH) ./fwk/src/main.tcl init addr create -c ${cfgFile} -t vhdl_tool
 
+# ----------------------------------------------------------------------------
+# ghdl
+ghdl : config
+	$(TCLSH) ./fwk/src/main.tcl init addr create -c ${cfgFile} -t ghdl
+	@echo "== CMAKE =="
+	@cd prj/${ProjectName}_${ProjectConf}/ && cmake ./
+
+ghdl_sim : config
+	@echo -e "\n== GHDL SIM =="
+	@env CTEST_OUTPUT_ON_FAILURE=1 $(MAKE) -C prj/${ProjectName}_${ProjectConf} -s elab test
+
+ghdl_build : config
+	@echo -e "\n== GHDL SYNTH =="
+	$(MAKE) -C prj/${ProjectName}_${ProjectConf} -s synth
+
 # ----------------------------------------------------------------------------
 # vitis
 vitis:

src/fwfwk_ghdl.tcl

+## -------------------------------------------------------------------------- #
+#           ____  _____________  __                                           #
+#          / __ \/ ____/ ___/\ \/ /                 _   _   _                 #
+#         / / / / __/  \__ \  \  /                 / \ / \ / \                #
+#        / /_/ / /___ ___/ /  / /               = ( M | S | K )=              #
+#       /_____/_____//____/  /_/                   \_/ \_/ \_/                #
+#                                                                             #
+# --------------------------------------------------------------------------- #
+# @copyright Copyright 2021 DESY
+# SPDX-License-Identifier: Apache-2.0
+# --------------------------------------------------------------------------- #
+# @date 2021-03-17
+# @author Lukasz Butkowski  <lukasz.butkowski@desy.de>
+# --------------------------------------------------------------------------- #
+# @brief
+# Part of DESY FPGA Firmware Framework (fwk)
+# Contains procedures for rust_hdl tool
+# --------------------------------------------------------------------------- #
+
+
+# do not execute tool dependent stages (setPrjProperties setProperties)
+variable SetPrjProperties 0
+
+array set SourcesArray {}
+variable SourcesArray
+variable LibList {}
+
+# ==============================================================================
+proc cleanProject {} {
+  # if { [file exists ${::fwfwk::ProjectPath}/vhdl_ls.toml] } {
+  #   file delete -force ${::fwfwk::ProjectPath}/vhdl_ls.toml
+  # }
+}
+
+# ==============================================================================
+proc createProject {} {
+}
+
+# ==============================================================================
+proc closeProject {} {}
+
+# ==============================================================================
+proc saveProject {} {
+
+  variable SourcesArray
+
+  addToolLibraries
+
+  set depLibs {}
+
+  set CMakeListFile [open ${::fwfwk::PrjBuildPath}/CMakeLists.txt w]
+
+  puts $CMakeListFile "cmake_minimum_required(VERSION 3.3)"
+  # Set the project name
+  puts $CMakeListFile "project (${::fwfwk::PrjBuildName} NONE)"
+  puts $CMakeListFile "enable_testing()"
+
+  foreach { lib sourcess } [ array get SourcesArray ] {
+    set varName "VHDL_SRC_[string toupper $lib]"
+    foreach src $sourcess {
+      puts $CMakeListFile "list (APPEND \"$varName\" \"$src\")"
+      puts $CMakeListFile "message(\"-- Adding VHDL Source: $src\")"
+    }
+    puts $CMakeListFile "add_custom_target(library_$lib ALL)"
+    puts $CMakeListFile "add_custom_command(TARGET library_$lib COMMAND ghdl -i -fsynopsys --work=${lib} --workdir=${::fwfwk::PrjBuildPath} \$\{$varName\})"
+    lappend depLibs "library_$lib"
+  }
+
+  foreach test $::fwfwk::src::SimTop {
+    puts $CMakeListFile "add_custom_target($test ALL COMMAND ghdl -m -fsynopsys --workdir=${::fwfwk::PrjBuildPath} $test DEPENDS $depLibs)"
+    puts $CMakeListFile "add_test(NAME $test COMMAND ghdl -r -fsynopsys --workdir=${::fwfwk::PrjBuildPath} $test --stop-time=$::fwfwk::src::SimTime  )"
+  }
+
+  puts $CMakeListFile "add_custom_target(elab DEPENDS $::fwfwk::src::SimTop)"
+
+  puts $CMakeListFile "add_custom_target(${::fwfwk::src::Top}_synth COMMAND ghdl -m -fsynopsys --workdir=${::fwfwk::PrjBuildPath} $::fwfwk::src::Top DEPENDS $depLibs)"
+  puts $CMakeListFile "add_custom_target(synth COMMAND ghdl --synth -fsynopsys --workdir=${::fwfwk::PrjBuildPath} $::fwfwk::src::Top DEPENDS ${::fwfwk::src::Top}_synth $depLibs)"
+
+  close $CMakeListFile
+  puts "-- created CMakeList.txt file in project build $::fwfwk::PrjBuildPath"
+
+
+}
+
+# ==============================================================================
+# add tool libraries based on availability in the environment paths
+proc addToolLibraries {} {
+  variable SourcesArray
+  set path ''
+
+  # Xilinx ISE
+  if { [info exists ::env(XILINX)] } {
+    set path "$::env(XILINX)/vhdl/src"
+    if { [file exists $path]} {
+      lappend SourcesArray(unisim) $path/unisims/unisim_VCOMP.vhd
+      lappend SourcesArray(unisim) $path/unisims/unisim_VPKG.vhd
+      lappend SourcesArray(unimacro) $path/unimacro/unimacro_VCOMP.vhd
+    }
+  }
+
+  # Xilinx Vivado
+  if { [info exists ::env(XILINX_VIVADO)] } {
+    set path "$::env(XILINX_VIVADO)/data/vhdl/src"
+    if { [file exists $path]} {
+      lappend SourcesArray(unisim) $path/unisims/unisim_VCOMP.vhd
+      lappend SourcesArray(unisim) $path/unisims/unisim_VPKG.vhd
+      lappend SourcesArray(unimacro) $path/unimacro/unimacro_VCOMP.vhd
+    }
+  }
+
+  # if { [file exists $path]} {
+  #   puts "Found $path"
+  #   foreach library [glob -directory $path -tails -types d *] {
+  #     #puts $library
+  #     set files [concat [glob -directory ${path}/${library} -nocomplain -types f *.vhd]]
+  #     foreach libFile $files { 
+  #       lappend SourcesArray($library) $libFile
+  #     }
+  #   }
+  # }
+}
+
+# ==============================================================================
+proc addSources {args srcList} {
+  variable SourcesArray
+
+  # default library work
+  set library work
+
+  # parse the library argument
+  set args [::fwfwk::utils::parseArgValue $args "-lib" library]
+
+  foreach src $srcList {
+    # Currently GHDL supports VHDL only
+    set ext [file extension $src]
+    if { $ext == ".vhd" } {
+      lappend SourcesArray($library) $src
+    }
+  }
+
+}