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Application Module for DRTM-DWC10 Rear Transition Module

This simple project shows how to use fwk projects with creating baremetal application using the Vitis Tool.

Decoder module for the timing information from timers.

A simplified version of the UNIO FMC board support package.

An example module for tutorial purposes. This module is using .rdl files to describe its register space. It also instantiates another DESY Module (TIMING) and integrates its address space into itself.

Example project for DRTM-AD84 rtm. By default with FMC1Z7IO BSP.

Wing-LDA, all FPGAs and MARS module

Application Module for DRTM-AD84 Rear Transition Module

In this tutorial, fwk is used to create a project that carries a module that interacts with DesyRDL and address spaces.

Windows distributive of Dioptas software

FPGAs of the wing-LDA in separate directory