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FPGA Firmware / Yocto / meta-desy-util
BSD 3-Clause "New" or "Revised" LicenseUpdated -
Decoder module for the timing information from timers.
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Application Module for DRTM-DWC10 Rear Transition Module
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BSP for the DAMC-FMC1Z7IO board
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BSP for DAMC-FMC2ZUP board
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Generic Timing Module. Creates triggers, strobes for the application.
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Verification Projects for components under desy_vhdl library
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Example project for DRTM-AD84 rtm. By default with FMC1Z7IO BSP.
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