Add protections

Pcie40Libraries/pcie40_b2slc.cpp

@@ -50,6 +50,14 @@ int pcie40_resetWriteFifo( int dev , int ch ) {
   if ( ret != 0 ) return -1 ;
   ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
   if ( ret != 0 ) return -1 ;
+
+  // Check that FIFO is really reset
+  wle = pcie40_writeFifoFillLevel( dev , ch ) ; 
+  if ( 0 != wle ) {
+    printf( "Write FIFO not empty\n" ) ; 
+    return -1 ; 
+  }
+
   return ret ;
 }
 
@@ -75,22 +83,57 @@ int pcie40_resetReadFifo( int dev , int ch ) {
   if ( ret != 0 ) return -1 ;
   ret = ecs_write( dev , SLC_BAR , SLC_RFIFO_RESET_ADD , 0 ) ;
   if ( ret != 0 ) return -1 ;
+  // check that FIFO is empty 
+  rle = pcie40_readFifoFillLevel( dev , ch ) ; 
+  if ( 0 != rle ) { 
+    printf( "Read FIFO not empty\n" ) ; 
+    return -1 ; 
+  }
   return ret ;
 }
 
 int pcie40_writeToFifo( int dev , int ch , std::vector< int > & data ) {
   std::vector< int >::iterator it ;
   unsigned ret = 0 ;
-  for ( it = data.begin() ; it != data.end() ; ++it ) {
-    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20  , 
-      (int) ( (*it) & 0xFFFFFFFF ) ) ;
+  unsigned fl = 0 ; 
+  unsigned tries = 0 ; 
+  while ( fl != data.size() ) {
+    for ( it = data.begin() ; it != data.end() ; ++it ) {
+      ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20  , 
+		       (int) ( (*it) & 0xFFFFFFFF ) ) ;
+      if ( ret != 0 ) return -1 ;
+    }
+    fl = pcie40_writeFifoFillLevel( dev , ch ) ; 
+    if ( fl == data.size() ) return ret ; 
+    // Reset Write FIFO 
+    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
+    if ( ret != 0 ) return -1 ;
+    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 
+		     1 << ( SLC_WFIFO_RESET_BIT + ch ) ) ;
     if ( ret != 0 ) return -1 ;
+    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
+    if ( ret != 0 ) return -1 ;
+    
+    tries++ ; 
+    if ( tries == 10 ) { 
+      printf( "Cannot write FIFO\n" ) ; 
+      return -1 ;
+    }
   }
   return ret ;
 }
 
-int pcie40_startEmit( int dev , int ch ) {
+int pcie40_startEmit( int dev , int ch , int expected ) {
   unsigned ret = 0 ;
+  if ( expected != -1 ) { 
+    // check that FIFO is written
+    ret = pcie40_writeFifoFillLevel( dev , ch ) ;
+    if ( expected != ret ) { 
+      printf( "Write FIFO not written correctly\n" ) ;
+      return -1 ; 
+    }
+  }
+
   ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
   if ( ret != 0 ) return -1 ;
   ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 
@@ -104,10 +147,10 @@ int pcie40_startEmit( int dev , int ch ) {
 int pcie40_waitRead( int dev , int ch , int length ) {
   unsigned ret = 0 ;
   int i ;
-  for ( i=0 ; i<10 ; i++ ) {
+  for ( i=0 ; i<100 ; i++ ) {
     ret = pcie40_readFifoFillLevel( dev , ch ) ; 
     if ( ret == length ) break;
-    usleep( 10 ) ; //10 ms
+    usleep( 10 ) ; //10 us
   }
 
   if (i == 10) {
@@ -120,10 +163,13 @@ int pcie40_waitRead( int dev , int ch , int length ) {
 int pcie40_readData( int dev , int ch , std::vector< int > & result , int length ) {
   unsigned ret = 0 ;
   int i = 0 ; 
+
   for ( i = 0 ; i < length ; ++i ) {
     ret = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
     result.push_back( ret ) ;
   }
+  ret = pcie40_readFifoFillLevel( dev , ch ) ;
+  if ( ret != 0 ) { printf( "Not all FIFO read\n" ) ; } 
   return 0 ;
 }
 /* ---------------------------------------------------------------------- *\
@@ -154,7 +200,7 @@ int pcie40_readfee8( int dev , int ch , int adr) {
   if ( ret != 0 ) return ret ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ;
+  ret = pcie40_startEmit( dev , ch , 5 ) ;
   if ( ret != 0 ) return -1 ;
 
   // Wait for the result to come back (40 words in the fifo)
@@ -195,7 +241,7 @@ int pcie40_writefee8( int dev , int ch , int adr , int val ) {
   if ( ret != 0 ) return ret ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ;
+  ret = pcie40_startEmit( dev , ch , 5 ) ;
   if ( ret != 0 ) return -1 ;
 
   return 0 ;
@@ -227,7 +273,7 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
   if ( ret != 0 ) return ret ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ;
+  ret = pcie40_startEmit( dev , ch , 4 ) ;
   if ( ret != 0 ) return -1 ;
 
   // Wait for the result to come back
@@ -326,7 +372,7 @@ int pcie40_writefee32( int dev , int ch , int adr , int val ) {
   if ( ret != 0 ) return ret ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ;
+  ret = pcie40_startEmit( dev , ch , 8 ) ;
   if ( ret != 0 ) return -1 ;
 
   return ret;
@@ -389,7 +435,7 @@ int pcie40_writestream_internal( int dev , int ch , char * filename , int do_sle
         fclose( fp ) ; 
         return -1 ;
       }    
-      ret = pcie40_startEmit( dev , ch ) ;
+      ret = pcie40_startEmit( dev , ch , -1 ) ;
       if ( ret != 0 ) { 
         fclose( fp ) ; 
         return -1 ;
@@ -419,7 +465,7 @@ int pcie40_writestream_internal( int dev , int ch , char * filename , int do_sle
   if ( ret != 0 ) return -1 ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ; 
+  ret = pcie40_startEmit( dev , ch , -1 ) ; 
   if ( ret != 0 ) return -1 ;
 
   return ret ;
@@ -451,7 +497,7 @@ int pcie40_writebytestream( int dev, int ch, int len, const char *bytes  )
 
       ret = pcie40_writeToFifo( dev , ch , data ) ;
       if ( ret != 0 ) return -1 ;
-      ret = pcie40_startEmit( dev , ch ) ;
+      ret = pcie40_startEmit( dev , ch , -1 ) ;
       if ( ret != 0 ) return -1 ;
 
       count = 0 ; 
@@ -471,7 +517,7 @@ int pcie40_writebytestream( int dev, int ch, int len, const char *bytes  )
   if ( ret != 0 ) return -1 ;
 
   // start emit
-  ret = pcie40_startEmit( dev , ch ) ; 
+  ret = pcie40_startEmit( dev , ch , -1 ) ; 
   if ( ret != 0 ) return -1 ;
 
   return ret ;