Debug slow control

Pcie40Libraries/pcie40_b2slc.c

@@ -139,7 +139,6 @@ unsigned long pcie40_readfee32( int dev , int fd , int adr ) {
   if ( ret != 0 ) return -1 ;
   ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + fd * 0x40 , 
 		   (int) ( data_word_2 & 0xFFFFFFFF ) ) ;
-  if ( ret != 0 ) return -1 ;
   ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + fd * 0x40 , 
 		   (int) ( data_word_3 & 0xFFFFFFFF ) ) ;
   if ( ret != 0 ) return -1 ;
@@ -148,10 +147,10 @@ unsigned long pcie40_readfee32( int dev , int fd , int adr ) {
   if ( ret != 0 ) return -1 ;
 
   // start emit
-  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 
   		   1 << ( SLC_WFIFO_EMIT_BIT + fd ) ) ;
   if ( ret != 0 ) return -1 ;
-  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
   if ( ret != 0 ) return -1 ;
 
   // Wait for the result to come back

Pcie40Libraries/pcie40_b2slc.h

@@ -11,8 +11,8 @@
 #define SLC_WFIFO_START_ADD 0x00050260
 #define SLC_WFIFO_EMIT_BIT 0
 #define SLC_WFIFO_ADD 0x00060000
-#define SLC_RFIFO_STATUS 0x00060100
-#define SLC_RFIFO_ADD 0x00060120
+#define SLC_RFIFO_STATUS 0x00060120
+#define SLC_RFIFO_ADD 0x00060100
 
 // Functions to read/write registers and stream files to Front End