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Commit c21e1067 authored by Patrick Robbe's avatar Patrick Robbe
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Merge pull request #20 in BIDU/software from monitoring to master 

* commit '4a2591c1':
  remove the FEE register access part
  change protection file name same as pll_status
  add protection to PLL access
parents 36ce052c 4a2591c1
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1 merge request!20add protection to PLL access
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Pcie40Applications/main_pcie40_statlink.cpp
+ 9
− 101
View file @ c21e1067
......@@ -5,9 +5,10 @@
Qi-Dong Zhou, KEK
2020.04.28 0.01 first version based on staths.c
2020.12.19 0.01 rename statlink to pcie40_statlink
2020.12.23 0.02 add protection for pll status access
\*--------------------------------------------------------------------------------*/
#define VERSION 01
#define VERSION 02
#define MOD_DATE 20200428
#include "pcie40_b2slc.h"
......@@ -20,7 +21,7 @@
#include <iostream>
#include <vector>
#include <bitset>
#include <sys/file.h>
#define MAX_NUM_CH 48
#define MAX_SLOT 3
......@@ -101,6 +102,7 @@ void argument(int argc, char **argv){
int
statpice40(pcie40reg_t pcie40reg)
{
FILE *fp = fopen("/tmp/pcie40_pll_lockfile.lck","w");
pcie40reg_t *pcie = &pcie40reg;
memset(pcie, 0, sizeof(*pcie));
int pcie40_sta = pcie40_status(dev_slot);
......@@ -112,6 +114,7 @@ statpice40(pcie40reg_t pcie40reg)
pcie40_run_number(dev_slot),
D(pcie40_sta, 28, 17),
pcie40_trg_type(dev_slot));
flock( fileno(fp), LOCK_EX );
printf("PLLs:%s | rxlink: %s | txlink: %s | txlink: %s | rxdisp: %s | rxdata: %s\n",
(pcie40_pllLockStatus(dev_slot, 1)&&pcie40_pllLockStatus(dev_slot, 2)&&pcie40_pllLockStatus(dev_slot, 3))?"LOCKED":"NOT LOCKED",
B(pcie40_sta, 0)?"READY":"NOT READY",
......@@ -146,75 +149,14 @@ statpice40(pcie40reg_t pcie40reg)
pcie40_pllInputCounter(dev_slot, 3)?"OK ":"LOS",
pcie40_pllFrequencyCounter(dev_slot, 3)?"OK ":"OOF");
printf("__________________________________\n");
}
return 0;
}
/* ---------------------------------------------------------------------- *\
* getfee
\* ---------------------------------------------------------------------- */
int
getfee( pcie40reg_t *pcie40p)
{
int hwtype;
int serial;
int fwtype;
int fwver;
hwtype = pcie40_readfee8(dev_slot, ch, PCIE40REG_FEEHWTYPE);
serial = pcie40_readfee8(dev_slot, ch, PCIE40REG_FEESERIAL);
fwtype = pcie40_readfee8(dev_slot, ch, PCIE40REG_FEEFWTYPE);
fwver = pcie40_readfee8(dev_slot, ch, PCIE40REG_FEEFWVER);
pcie40p->feeser = (serial | (hwtype << 8)) & 0xfff;
pcie40p->feever = (fwver | (fwtype << 8)) & 0xfff;
pcie40p->feehw = (hwtype >> 4) & 0x0f;
pcie40p->feefw = (fwtype >> 4) & 0x0f;
pcie40p->feecrce = pcie40_readfee8(dev_slot, ch, PCIE40REG_CRCERR);
}
flock( fileno(fp), LOCK_UN );
fclose(fp);
return 0;
}
/* ---------------------------------------------------------------------- *\
* readregs
\* ---------------------------------------------------------------------- */
int
readregs(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
{
int i;
int notfound = 1;
for (i=0; i<48; i++) {
pcie40reg_t *pcie = &pcie40reg[i];
memset(pcie, 0, sizeof(*pcie));
if (!link_mask[i]) continue;
if ( !pcie40_b2l_status(dev_slot, i) ) {
//printf("b2link-%02d is down\n", i);
continue;
}
pcie->xbusy = pcie40_readfee32(dev_slot, ch, PCIE40REG_CCLK);
pcie->conf = pcie40_readfee32(dev_slot, ch, PCIE40REG_CONF);
pcie->pcie40ver = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VER); /* 81 */
pcie->rxdata = pcie40_readfee32(dev_slot, ch, PCIE40REGL_RXDATA); /* 84 */
pcie->eventsz = pcie40_readfee32(dev_slot, ch, PCIE40REGL_EVENTSZ); /* 85 */
pcie->nevent = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NEVENT); /* 86 */
pcie->nkbyte = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NKBYTE); /* 87 */
pcie->nword = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NWORD); /* 88 */
pcie->feeser = 0xffff;
pcie->feever = 0xffff;
if ( pcie40_b2l_status(dev_slot, i) ) {
getfee(pcie);
}
}
return notfound;
}
/* ---------------------------------------------------------------------- *\
* statlink
......@@ -239,15 +181,6 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
sprintf(prompt, "(%02d) ", i);
if ( pcie40_b2l_status(dev_slot, i) ) {
if (pcie->feeser & 0x8000) {
printf("fee info is not available\n");
} else {
printf("%s serial %d version %d\n",
feename(pcie->feehw, pcie->feefw), pcie->feeser, pcie->feever);
}
}
printf("%s", prompt);
printf("b2l=%s (gbt=%s rx=%s tx=%s rxsta=%s txsta=%s mask=%s)\n",
pcie40_b2l_status(dev_slot, i)?"UP":"DOWN",
......@@ -258,30 +191,6 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
pcie40_b2l_txready(dev_slot, i)?"READY":"NOT READY",
pcie40_b2l_mask(dev_slot, i)?"UNMASK":"MASK");
printf("%s", prompt);
printf("rxdata=%04x rxlinkdown=%d rxcrcerr=%d feecrcerr=%d\n",
D(pcie->rxdata,15,0), D(pcie->rxdata,31,24), D(pcie->rxdata,23,16),
pcie->feecrce);
printf("%s", prompt);
total = (pcie->nkbyte * 256.0 + (pcie->nword & 0xff)) * 4.0;
printf("event=%d total=%1.0fkB", pcie->nevent, total / 1000);
if (pcie->nevent) {
double avg = total / pcie->nevent;
printf(" (avg=%1.0fB", avg);
if (D(pcie->eventsz,31,16) == 0xffff) {
printf(" last=oflow");
} else {
printf(" last=%dB", D(pcie->eventsz,31,16)*4);
}
if (D(pcie->eventsz,15,0) == 0xffff) {
printf(" max=oflow)");
} else {
printf(" max=%dB)", D(pcie->eventsz,15,0)*4);
}
}
printf("\n");
printf("%s", prompt);
if ( pcie40_b2l_usebadidle(dev_slot, i) == 0 && pcie40_b2l_usebaddata(dev_slot, i) == 0) {
printf("no b2link error correction");
......@@ -325,7 +234,6 @@ int main(int argc, char** argv){
printf("statlink version %d (%d) / ", VERSION, MOD_DATE);
statpice40(pcie40);
readregs(link_mask, pcie40reg);
statlink(link_mask, pcie40reg);
// close pcie40 device driver for current process
......
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