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Commit b09dd055 authored by Patrick Robbe's avatar Patrick Robbe
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Clean obsolete files

parent 10072796
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Pcie40Driver/Makefile
+ 1
− 5
View file @ b09dd055
......@@ -21,7 +21,7 @@ default:
@echo $(TARGET) > module.target
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
default: pcie40_dma_regmap.h pcie40_ioctl.h pcie40_driver_common.h pcie40_driver_common.c ecs.h altera_dma.h
default: pcie40_ioctl.h pcie40_driver_common.h pcie40_driver_common.c ecs.h altera_dma.h
default: main.c ecs.c altera_dma.c
......@@ -37,8 +37,4 @@ install: pcie40.ko
pcie40.ko:
$(MAKE)
ifneq ("$(wildcard pcie40_dma_regmap.cfg)","")
pcie40_dma_regmap.h: pcie40_dma_regmap.cfg
regmap_cfg_to_h.tcl P40_ $< > $@ 2> /dev/null
endif
endif
Pcie40Driver/pcie40_dma_regmap.h deleted 100644 → 0
+ 0
− 86
View file @ 10072796
// This output was generated by the following command:
// ../common/regmap_cfg_to_h.tcl P40_ ../common/pcie40_dma_regmap.cfg
// Do not edit this file manually, your changes will be overwritten by the generator.
#ifndef P40_REGMAP_H
#define P40_REGMAP_H
static const int P40_DMA_REGMAP_VERSION = 0x20170424;
static const int P40_DMA_CTRL_OFF_INBUF_SIZE = 0x0A0;
static const int P40_DMA_CTRL_OFF_META_EVID_HI = 0x034;
static const int P40_DMA_CTRL_OFF_VERSION = 0x008;
static const int P40_DMA_CTRL_OFF_MAIN_EVID_LO = 0x024;
static const int P40_DMA_CTRL_OFF_MAIN_MSI_CYCLES = 0x08C;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_HI = 0x0E0;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_CYCLES = 0x0D8;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_LO = 0x0D0;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_CYCLES = 0x0CC;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_HI = 0x0B4;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_LO = 0x0E4;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_HI = 0x0C8;
static const int P40_DMA_CTRL_OFF_TRUNC_THRES = 0x0A8;
static const int P40_DMA_CTRL_OFF_RWTEST = 0x000;
static const int P40_DMA_CTRL_OFF_PCIE_GEN = 0x080;
static const int P40_DMA_CTRL_OFF_INBUF_FILL = 0x0A4;
static const int P40_DMA_CTRL_OFF_CHIP_ID_LO = 0x044;
static const int P40_DMA_CTRL_OFF_LINK_ID = 0x00C;
static const int P40_DMA_CTRL_OFF_ERROR = 0x014;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_LO = 0x0BC;
static const int P40_DMA_CTRL_OFF_ODIN_EVID_LO = 0x03C;
static const int P40_DMA_CTRL_OFF_META_PACKING = 0x02C;
static const int P40_DMA_CTRL_OFF_RESET = 0x010;
static const int P40_DMA_CTRL_OFF_MAIN_EVID_HI = 0x028;
static const int P40_DMA_CTRL_BASE_DAQ_MAIN_STREAM = 0x100;
static const int P40_DMA_CTRL_OFF_META_MSI_BYTES = 0x090;
static const int P40_DMA_CTRL_OFF_MSI_MODE = 0x084;
static const int P40_DMA_CTRL_OFF_CHOKE_TOTAL_SINCE_EVID_HI = 0x0D4;
static const int P40_DMA_CTRL_OFF_MAIN_GEN_FIXED = 0x01C;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_TO_EVID_HI = 0x0E8;
static const int P40_DMA_CTRL_OFF_CHIP_ID_HI = 0x048;
static const int P40_DMA_CTRL_OFF_META_EVID_LO = 0x030;
static const int P40_DMA_CTRL_OFF_MAIN_GEN_CTL = 0x018;
static const int P40_DMA_CTRL_OFF_META_MSI_CYCLES = 0x094;
static const int P40_DMA_CTRL_OFF_CHOKE_LAST_FROM_EVID_LO = 0x0DC;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_FROM_EVID_HI = 0x0C0;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_CYCLES = 0x0B8;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_SINCE_EVID_LO = 0x0B0;
static const int P40_DMA_CTRL_OFF_TRUNC_TOTAL_CYCLES = 0x0AC;
static const int P40_DMA_CTRL_OFF_ODIN_EVID_HI = 0x040;
static const int P40_DMA_CTRL_OFF_TRUNC_LAST_TO_EVID_LO = 0x0C4;
static const int P40_DMA_CTRL_OFF_MAIN_RAW_MODE = 0x020;
static const int P40_DMA_CTRL_OFF_MAIN_MSI_BYTES = 0x088;
static const int P40_DMA_CTRL_OFF_META_MSI_BLOCKS = 0x098;
static const int P40_DMA_CTRL_OFF_REGMAP = 0x004;
static const int P40_DMA_CTRL_OFF_ODIN_GEN_CTL = 0x038;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_LO = 0x24;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_BYTES = 0x0C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_HI = 0x1C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_BUSY_HI = 0x28;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_WRITE_OFF = 0x2C;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_BYTES = 0x14;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_BUF_READ_OFF = 0x30;
static const int P40_DMA_DAQ_STREAM_OFF_ENABLE = 0x00;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_PAGES = 0x38;
static const int P40_DMA_DAQ_STREAM_OFF_FLUSH = 0x08;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS = 0x10;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESCS_FILL_LO = 0x18;
static const int P40_DMA_DAQ_STREAM_OFF_HOST_MAP_ENTRIES = 0x34;
static const int P40_DMA_DAQ_STREAM_OFF_FPGA_BUF_DESC_FILL_BYTES = 0x20;
static const int P40_DMA_DAQ_STREAM_OFF_READY = 0x04;
static const int P40_DMA_CTRL_QSYS_BASE = 0x1000;
static const int P40_DMA_DAQ_MAIN_STREAM_QSYS_BASE = 0x1100;
static const int P40_DMA_DAQ_MAIN_MAP_QSYS_BASE = 0x10000;
static const int P40_DMA_DAQ_MAIN_BUF_QSYS_BASE = 0x100000;
static const int P40_DMA_DAQ_META_STREAM_QSYS_BASE = 0x0400;
static const int P40_DMA_DAQ_META_MAP_QSYS_BASE = 0x20000;
static const int P40_DMA_DAQ_META_BUF_QSYS_BASE = 0x200000;
#endif//P40_REGMAP_H
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