Adapt to 6 link version

Pcie40Applications/main_pcie40_ecs.c

@@ -110,7 +110,7 @@ int main(int argc, char *argv[])
     p40_ecs_w32(regs, flag_addroff, flag_writeval);
   } else if (flag_read) {
     uint32_t reg = p40_ecs_r32(regs, flag_addroff);
-    printf("0x%08x", reg);
+    printf("0x%08x\n", reg);
   }
   p40_ecs_close(ecs, regs, flag_barnum);
 

Pcie40Libraries/pcie40_b2slc.c

 // File for Belle2 slow control access with PCIe40 
 #include "pcie40_b2slc.h"
 #include <unistd.h>
+#include <stdio.h>
 #include "pcie40_ecs.h"
 
 /* ---------------------------------------------------------------------- *\
@@ -163,7 +164,7 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
   // Wait for the result to come back
   int i ;
   for ( i=0 ; i<10 ; i++ ) {
-    usleep( 10 ) ; //10 ms
+    usleep( 100 ) ; //10 ms
     // TO DO ret = ecs_read( dev , SLC_BAR , SLC_RFIFO_STATUS + ch * 0x40 ) ;
     // TO DO if ( ret == 7 ) break;
   }
@@ -174,37 +175,58 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
   int t_ret1 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
   int t_ret2 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
   int t_ret3 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
-  int t_ret4 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
-
-  printf( "%X %X %X %X\n" , t_ret1 , t_ret2 , t_ret3 , t_ret4 ) ;
+  int t_ret4 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );  
+  int t_ret5 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
+  int t_ret6 = ecs_read( dev , SLC_BAR , SLC_RFIFO_ADD + ch * 0x20 );
 
-  if ( t_ret1 != 0xFFFFFFFF ) return -1 ; 
-  if ( ( t_ret4 & 0x0000FFFF ) != 0xEEEE ) return -1 ;
+  if ( ( t_ret1 & 0x0000FFFF ) != 0xFFFF ) {
+    printf( "Bad header\n" ) ;
+    return -1 ; 
+  }
+  if ( ( t_ret6 & 0x0000FFFF ) != 0xEEEE ) { 
+    printf( "Bad trailer\n" ) ; 
+    return -1 ;
+  }
 
-  int add1 = ( t_ret2 & 0xFF000000 ) >> 24 ;
-  int add2 = ( t_ret2 & 0xFF00 ) >> 8 ;
-  int add3 = ( t_ret3 & 0xFF000000 ) >> 24 ;
-  int add4 = ( t_ret3 & 0xFF00 ) >> 8 ;
+  int add1 = ( t_ret2 & 0xFF00 ) >> 8 ;
+  int add2 = ( t_ret3 & 0xFF00 ) >> 8 ;
+  int add3 = ( t_ret4 & 0xFF00 ) >> 8 ;
+  int add4 = ( t_ret5 & 0xFF00 ) >> 8 ;
   
-  if ( ( add1 & 0xF8 ) != 0x10 ) return -1 ;
-  if ( ( add2 & 0xF8 ) != 0x10 ) return -1 ;
-  if ( ( add3 & 0xF8 ) != 0x10 ) return -1 ;
-  if ( ( add4 & 0xF8 ) != 0x10 ) return -1 ;
+  if ( ( add1 & 0xF8 ) != 0x10 ) { 
+    printf( "Bad address1 %X\n" , add1 ) ; 
+    return -1 ;
+  }
+  if ( ( add2 & 0xF8 ) != 0x10 ) { 
+    printf( "Bad address2 %X\n" , add2 ) ; 
+    return -1 ;
+  }
+  if ( ( add3 & 0xF8 ) != 0x10 ) {
+    printf( "Bad address3 %X\n" , add3 ) ; 
+    return -1 ;
+  }
+  if ( ( add4 & 0xF8 ) != 0x10 ) {
+    printf( "Bad address4 %X\n" , add4 ) ; 
+    return -1 ;
+  }
 
   add1 += 0x58 ;
   add2 += 0x58 ;
   add3 += 0x58 ;
   add4 += 0x58 ;
-
-  // WHY ?   if ( ( add1 != 0x6C ) || ( add2 != 0x6D ) || ( add3 != 0x6A ) || ( add4 != 0x6B ) )
-  //  return -1 ;
-
-  int res1 = ( t_ret2 & 0xFF0000 ) >> 16 ;
-  int res2 = ( t_ret2 & 0xFF ) ;
-  int res3 = ( t_ret3 & 0xFF0000 ) >> 16 ;
-  int res4 = ( t_ret3 & 0xFF ) ;
-
-  return 0xFFFFFFFF & ( ( res2 << 24 ) | ( res1 << 16 ) | ( res4 << 8 ) | ( res3 ) ) ;
+  
+  if ( ( add2 != 0x6C ) || ( add1 != 0x6D ) || ( add4 != 0x6A ) || ( add3 != 0x6B ) )
+    {
+      printf( "Unexpected address %X %X %X %X\n" , add1 , add2 , add3 , add4 ) ;
+      return -1 ;
+    }
+
+  int res1 = ( t_ret2 & 0xFF ) ;
+  int res2 = ( t_ret3 & 0xFF ) ;
+  int res3 = ( t_ret4 & 0xFF ) ;
+  int res4 = ( t_ret5 & 0xFF ) ;
+
+  return 0xFFFFFFFF & ( ( res1 << 24 ) | ( res2 << 16 ) | ( res3 << 8 ) | ( res4 ) ) ;
 }
 
 //==============================================================================

Scripts/testSLC.py

@@ -8,6 +8,7 @@ slc_read.restype = c_ulong
 
 parser = argparse.ArgumentParser( description = 'Test slow control: read/write random values in register 0x17' )
 parser.add_argument('N',type=int,help='Number of events')
+parser.add_argument('--channel', '-c' , help = 'Channel number' , type = int , default = 0 )
 
 args = parser.parse_args()
 result = 0 
@@ -19,10 +20,10 @@ nerr = 0
 
 for i in xrange( args.N ):
     data = random.randint( 0 , 0xFFFFFFFF )
-    lli.pcie40_writefee32( 0 , 0 , 0x17 , data )
-    result = slc_read( 0 , 0 , 0x17 )
+    lli.pcie40_writefee32( 0 , args.channel , 0x17 , data )
+    result = slc_read( 0 , args.channel , 0x17 )
     if result != data:
-        print(data , result ) 
+        print("mismatch between write ({0:X}) and read ({1:X})".format( data , result ))  
         nerr = nerr + 1
 
 lli.ecs_close( 0 , 2 )