Merge pull request #14 in BIDU/software from monitoring to master

* commit '450c7e19':
  modify b2l status address
  add set mask function

Pcie40Libraries/pcie40_reg.cpp

@@ -87,6 +87,8 @@ int pcie40_rxdata_error(int dev){
 //----------------------------------------------
 // Belle2link dedicated
 //----------------------------------------------
+
+// Status of b2l specified by link_ok
 int pcie40_b2l_status(int dev, int ch){
   int ret = -1;
   if(ch >= 0 && ch <=23)
@@ -97,6 +99,17 @@ int pcie40_b2l_status(int dev, int ch){
   return ( ( ret & ( 1 << ( SLC_BASE_BIT + ch ) ) ) 
            >> ( SLC_BASE_BIT + ch ));
 }
+// Status of b2l include link_ok and state machine are ready
+int pcie40_b2l_tiestatus(int dev, int ch){
+  int ret = -1;
+  if(ch >= 0 && ch <=23)
+    ret = ecs_read(dev, SLC_BAR,  SLC_B2LINK_TIE_STATUS1);
+  else if (ch >= 24 && ch <= 47 )
+    ret = ecs_read(dev, SLC_BAR,  SLC_B2LINK_TIE_STATUS2);
+  
+  return ( ( ret & ( 1 << ( SLC_BASE_BIT + ch ) ) ) 
+           >> ( SLC_BASE_BIT + ch ));
+}
 
 int pcie40_b2l_mask(int dev, int ch){
   int ret = -1;
@@ -108,6 +121,19 @@ int pcie40_b2l_mask(int dev, int ch){
   return ( ( ret & ( 1 << ( SLC_BASE_BIT + ch ) ) ) 
            >> ( SLC_BASE_BIT + ch ));
 }
+// set mask for corresponding b2l: 0->mask, 1->unmask
+int pcie40_b2l_set_mask(int dev, int ch, int mask){
+  int ret = -1;
+  if(ch >= 0 && ch <=23){
+    ret = ecs_write(dev, SLC_BAR,  SLC_B2LINK_MASK1, mask);
+    if(ret != 0) return -1;
+  }else if (ch >= 24 && ch <= 47 ){
+    ret = ecs_write(dev, SLC_BAR,  SLC_B2LINK_MASK2, mask);
+    if(ret != 0) return -1;
+  }
+  return ret;
+         
+}
 
 int pcie40_b2l_txstatus(int dev, int ch){
   int ret = -1;

Pcie40Libraries/pcie40_reg.h

@@ -32,15 +32,17 @@ extern "C" {
 #define SLC_B2LINK_RX_STATUS2  0x00050180  // link in the ready state for txdata, channel 0-23, 1 bit pre channel
 #define SLC_B2LINK_TX_STATUS1  0x000501A0  // link in the ready state for txdata, channel 0-23, 1 bit pre channel
 #define SLC_B2LINK_TX_STATUS2  0x000501C0  // link in the ready state for txdata, channel 0-23, 1 bit pre channel
-#define SLC_B2LINK_VETOIDLE    0x00070010  // count vetoidle
-#define SLC_B2LINK_VETODATA    0x00070000  // count vetodata
-#define SLC_B2LINK_BUFDOWN0    0x00090000  // buffer recent two words of rxdata
-#define SLC_B2LINK_BUFDOWN1    0x00080000  // buffer recent two words of rxdata
-#define SLC_B2LINK_CNTDOWN     0x000A0010  // buffer recent third words of rxdata [15 downto 0] + three charish {21 downto 16} 
-#define SLC_B2LINK_MONSTATUS   0x000A0000  // buffer recent two words of rxdata
-
-#define SLC_B2LINK_STATUS1     0x000501E0  // link up/down channel 0-23, 1 bit pre channel
-#define SLC_B2LINK_STATUS2     0x00050200  // link up/down channel 24-47, 1 bit pre channel
+#define SLC_B2LINK_VETOIDLE    0x00070000  // count vetoidle
+#define SLC_B2LINK_VETODATA    0x00070010  // count vetodata
+#define SLC_B2LINK_BUFDOWN0    0x00080000  // buffer recent two words of rxdata
+#define SLC_B2LINK_BUFDOWN1    0x00090000  // buffer recent two words of rxdata
+#define SLC_B2LINK_CNTDOWN     0x000A0000  // buffer recent third words of rxdata [15 downto 0] + three charish {21 downto 16} 
+#define SLC_B2LINK_MONSTATUS   0x000A0010  // buffer recent two words of rxdata
+
+#define SLC_B2LINK_TIE_STATUS1 0x000501E0  // link up/down channel 0-23, 1 bit pre channel
+#define SLC_B2LINK_TIE_STATUS2 0x00050200  // link up/down channel 24-47, 1 bit pre channel
+#define SLC_B2LINK_STATUS1     0x000502E0  // link up/down channel 0-23, 1 bit pre channel
+#define SLC_B2LINK_STATUS2     0x00050300  // link up/down channel 24-47, 1 bit pre channel
 #define SLC_B2LINK_MASK1       0x00050520  // link up/down channel 0-23, 1 bit pre channel
 #define SLC_B2LINK_MASK2       0x00050540  // link up/down channel 24-47, 1 bit pre channel
 #define SLC_RFIFO_STATUS       0x00060010
@@ -52,11 +54,13 @@ extern "C" {
 
 
 int pcie40_b2l_status(int dev, int ch);
+int pcie40_b2l_tiestatus(int dev, int ch);
 int pcie40_b2l_txstatus(int dev, int ch);
 int pcie40_b2l_rxstatus(int dev, int ch);
 int pcie40_b2l_txready(int dev, int ch);
 int pcie40_b2l_rxready(int dev, int ch);
 int pcie40_b2l_mask(int dev, int ch);
+int pcie40_b2l_set_mask(int dev, int ch, int mask);
 int pcie40_b2l_cnt_vetoidle(int dev, int ch);
 int pcie40_b2l_cnt_vetodata(int dev, int ch);
 int pcie40_b2l_3rdrxdata(int dev, int ch);