Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
S
Software
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Dmytro Levit
Software
Commits
7aec5f59
Commit
7aec5f59
authored
4 years ago
by
qzhou
Browse files
Options
Downloads
Patches
Plain Diff
add simple function of reghs with pcie40_b2slc
parent
1739a903
No related branches found
Branches containing commit
No related tags found
Tags containing commit
1 merge request
!5
6links
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
Pcie40Applications/main_pcie40_b2slc.cpp
+96
-5
96 additions, 5 deletions
Pcie40Applications/main_pcie40_b2slc.cpp
with
96 additions
and
5 deletions
Pcie40Applications/main_pcie40_b2slc.cpp
+
96
−
5
View file @
7aec5f59
/*-------------------------------------------------------------------------------*\
pcie40_b2slc: From PCIe40 board to access register of FEE through belle2link
Auther: Qi-Dong Zhou, KEK
2020.03.06 0.01 first version
\*--------------------------------------------------------------------------------*/
#include
"pcie40_b2slc.h"
#include
<stdio.h>
#include
<stdlib.h>
#include
<string.h>
#include
<iostream>
extern
"C"
int
ecs_open
(
int
dev
,
int
bar
);
extern
"C"
void
ecs_close
(
int
dev
,
int
bar
);
//#define PCIE_DEV 0
#define MAX_NUM_CH 48
#define MAX_SLOT 3
#define SLC_BAR 2
int
dev_slot
=
-
1
;
int
ch
=
-
1
;
unsigned
int
addr
=
0
;
unsigned
int
data
=
0
;
bool
USE_FEE8
=
false
;
bool
USE_FEE32
=
false
;
bool
READ_ONLY
=
false
;
bool
WRITE
=
false
;
bool
STREAM
=
false
;
char
*
filename
;
void
argument
(
int
argc
,
char
**
argv
){
for
(
int
i
=
1
;
i
<
argc
;
i
++
){
std
::
string
ss
=
argv
[
i
];
if
(
ss
==
"--dev"
){
dev_slot
=
atoi
(
argv
[
++
i
]);
if
(
dev_slot
<
0
||
dev_slot
>=
MAX_SLOT
){
fprintf
(
stderr
,
"Invalid device slot %d, Valid slot [0, %d]
\n
"
,
dev_slot
,
MAX_SLOT
);
}
}
if
(
ss
==
"--ch"
){
ch
=
atoi
(
argv
[
++
i
]);
if
(
ch
<
0
||
ch
>=
MAX_NUM_CH
){
fprintf
(
stderr
,
"Invalid channel ID %d, Valid ID [0, %d]
\n
"
,
ch
,
MAX_NUM_CH
);
}
}
if
(
ss
==
"--fee8"
){
USE_FEE8
=
true
;
}
if
(
ss
==
"--fee32"
){
USE_FEE32
=
true
;
}
if
(
ss
==
"--r"
||
ss
==
"--read"
){
READ_ONLY
=
true
;
addr
=
strtoul
(
argv
[
++
i
],
0
,
16
);
}
if
(
ss
==
"--w"
||
ss
==
"--write"
){
WRITE
=
true
;
addr
=
strtoul
(
argv
[
++
i
],
0
,
16
);
data
=
strtoul
(
argv
[
++
i
],
0
,
16
);
//printf("add = %02x data = %08x\n", addr, data);
}
if
(
ss
==
"--stream"
){
STREAM
=
true
;
filename
=
argv
[
++
i
];
}
if
(
ss
==
"--h"
||
ss
==
"-help"
){
fprintf
(
stderr
,
"pcie40_b2slc
\n
"
"--dev xx #device slot number which installed PCIe40
\n
"
"--ch xx #link channel number
\n
"
"--r xx #read register with address xx
\n
"
"--w xx xx #write register with address xx parameter xx
\n
"
"--fee8 #use A7D8 for access register
\n
"
"--fee32 #use A16D32 for access register
\n
"
"--stream /path/filename #streaming a file by using stream file method
\n
"
);
return
;
}
}
}
int
main
(
int
argc
,
char
*
argv
[])
{
ecs_open
(
0
,
2
)
;
int
result
=
pcie40_readfee32
(
0
,
1
,
0x12
)
;
int
main
(
int
argc
,
char
**
argv
){
ecs_close
(
0
,
2
)
;
argument
(
argc
,
argv
);
printf
(
"Value = %X
\n
"
,
result
)
;
ecs_open
(
dev_slot
,
SLC_BAR
);
if
(
USE_FEE8
&&
READ_ONLY
)
pcie40_readfee8
(
dev_slot
,
ch
,
addr
);
else
if
(
USE_FEE8
&&
WRITE
)
pcie40_writefee8
(
dev_slot
,
ch
,
addr
,
data
);
else
if
(
USE_FEE32
&&
READ_ONLY
)
pcie40_readfee32
(
dev_slot
,
ch
,
addr
);
else
if
(
USE_FEE8
&&
WRITE
)
pcie40_writefee32
(
dev_slot
,
ch
,
addr
,
data
);
else
if
(
STREAM
)
pcie40_writestream
(
dev_slot
,
ch
,
filename
)
;
//std::cout << filename << std::endl;
ecs_close
(
dev_slot
,
SLC_BAR
)
;
return
0
;
}
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment