Skip to content
Snippets Groups Projects
Commit 7ad9081e authored by Patrick Robbe's avatar Patrick Robbe
Browse files

Remove debug statements

parent 92484380
Branches
Tags
No related merge requests found
......@@ -42,7 +42,6 @@ int pcie40_resetWriteFifo( int dev , int ch ) {
printf( "Timeout reset write\n" ) ;
// Do not return to perform the reset; return -1 ;
}
if ( ch < 24 ) {
ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD_0 , 0 ) ;
......@@ -64,7 +63,6 @@ int pcie40_resetWriteFifo( int dev , int ch ) {
// Check that FIFO is really reset
wle = pcie40_writeFifoFillLevel( dev , ch ) ;
wle = pcie40_writeFifoFillLevel( dev , ch ) ;
if ( 0 != wle ) {
printf( "Write FIFO not empty Level = %d\n" , wle ) ;
......@@ -172,7 +170,6 @@ int pcie40_startEmit( int dev , int ch , int expected ) {
if ( expected != -1 ) {
// check that FIFO is written
ret = pcie40_writeFifoFillLevel( dev , ch ) ;
ret = pcie40_writeFifoFillLevel( dev , ch ) ;
if ( expected != ret ) {
printf( "Write FIFO not written correctly. Number of words in FIFO: %d, number expected: %d\n" , ret , expected ) ;
return -1 ;
......@@ -364,10 +361,12 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
if ( ( add1 & 0xF8 ) != 0x10 ) {
printf( "Bad address1 %X\n" , add1 ) ;
printf( "Data received: %X, %X, %X, %X, %X, %X\n" , t_ret1 , t_ret2 , t_ret3 , t_ret4 , t_ret5 , t_ret6 ) ;
return -1 ;
}
if ( ( add2 & 0xF8 ) != 0x10 ) {
printf( "Bad address2 %X\n" , add2 ) ;
printf( "Bad address2 %X\n" , add2 ) ;
printf( "Data received: %X, %X, %X, %X, %X, %X\n" , t_ret1 , t_ret2 , t_ret3 , t_ret4 , t_ret5 , t_ret6 ) ;
return -1 ;
}
if ( ( add3 & 0xF8 ) != 0x10 ) {
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment