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Dmytro Levit
Software
Commits
799adcf0
Commit
799adcf0
authored
5 years ago
by
Patrick Robbe
Browse files
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Clean library for slow control
parent
855f8d13
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1 merge request
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6links
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1 changed file
Pcie40Libraries/pcie40_b2slc.c
+159
-207
159 additions, 207 deletions
Pcie40Libraries/pcie40_b2slc.c
with
159 additions
and
207 deletions
Pcie40Libraries/pcie40_b2slc.c
+
159
−
207
View file @
799adcf0
...
...
@@ -4,73 +4,107 @@
#include
<stdio.h>
#include
"pcie40_ecs.h"
/* ---------------------------------------------------------------------- *\
readfee8
returns -1 in case of error
\* ---------------------------------------------------------------------- */
int
pcie40_readfee8
(
int
dev
,
int
ch
,
int
adr
)
{
// PCIe40
if
(
(
adr
<=
0
)
||
(
adr
>
0x7F
)
)
return
-
1
;
// Reset the FIFO (Emit and reception)
///////////////////////////////////////////////////////////////////////////
// Internal functions for slow control,, do not use outside of this library
///////////////////////////////////////////////////////////////////////////
int
pcie40_resetWriteFifo
(
int
dev
,
int
ch
)
{
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
1
<<
SLC_WFIFO_RESET_BIT
)
;
1
<<
SLC_WFIFO_RESET_BIT
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
return
ret
;
}
// Fill the FIFO with the requested information: write MSB first
int
data_word_1
=
0xFFFE
;
int
data_word_2
=
0x0001
;
int
data_word_3
=
0x8000
|
(
adr
&
0x7F
)
;
int
data_word_4
=
0x000c
;
int
data_word_5
=
0xEEEE
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_2
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_3
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_4
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_5
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
int
pcie40_writeToFifo
(
int
dev
,
int
ch
,
std
::
vector
<
int
>
&
data
)
{
std
::
vector
<
int
>::
iterator
it
;
unsigned
ret
=
0
;
for
(
it
=
data
.
begin
()
;
it
!=
data
.
end
()
;
++
it
)
{
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
(
*
it
)
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
}
return
ret
;
}
// start emit
int
pcie40_startEmit
(
int
dev
,
int
ch
)
{
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
return
ret
;
}
// Wait for the result to come back (1 word in the fifo)
int
pcie40_waitRead
(
int
dev
,
int
ch
,
int
length
)
{
unsigned
ret
=
0
;
int
i
;
for
(
i
=
0
;
i
<
10
;
i
++
)
{
usleep
(
10
)
;
//10 ms
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_STATUS
+
ch
*
0x20
)
;
ret
=
(
ret
&
0xFF00
)
>>
8
;
if
(
ret
==
5
*
8
)
break
;
if
(
ret
==
length
)
break
;
}
if
(
i
==
10
)
{
printf
(
"Timeout
\n
"
)
;
return
-
1
;
printf
(
"Timeout
\n
"
)
;
return
-
1
;
}
return
ret
;
}
int
pcie40_readData
(
int
dev
,
int
ch
,
std
::
vector
<
int
>
&
result
,
int
length
)
{
unsigned
ret
=
0
;
int
i
=
0
;
for
(
i
=
0
;
i
<
length
;
++
i
)
{
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
fd
*
0x20
);
result
.
push_back
(
ret
)
;
}
return
0
;
}
/* ---------------------------------------------------------------------- *\
readfee8
returns -1 in case of error
\* ---------------------------------------------------------------------- */
int
pcie40_readfee8
(
int
dev
,
int
ch
,
int
adr
)
{
// PCIe40
if
(
(
adr
<=
0
)
||
(
adr
>
0x7F
)
)
return
-
1
;
// Reset the FIFO (Emit and reception)
unsigned
ret
=
0
;
ret
=
pcie40_resetReadFifo
(
dev
,
ch
)
;
if
(
ret
!=
0
)
return
ret
;
// Fill the FIFO with the requested information: write MSB first
std
::
vector
<
int
>
data
;
data
.
push_back
(
0xFFFE
,
0x0001
,
0x8000
|
(
adr
&
0x7F
)
,
0x000c
,
0xEEEE
)
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
return
ret
;
// start emit
ret
=
pcie40_startEmit
(
dev
,
ch
)
if
(
ret
!=
0
)
return
-
1
;
// Wait for the result to come back (40 words in the fifo)
ret
=
pcie40_waitRead
(
dev
,
fd
,
40
)
;
if
(
ret
!=
0
)
return
-
1
;
// Read the value
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
ret
2
=
ecs
_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
ret3
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
std
::
vector
<
int
>
result
;
ret
=
pcie40
_read
Data
(
dev
,
fd
,
result
,
5
)
;
int
ret
2
=
result
.
at
(
1
)
;
int
ret
3
=
result
.
at
(
2
)
;
// check address consistency
if
(
(
(
ret2
&
0x7F
)
)
!=
adr
)
return
-
1
;
...
...
@@ -85,42 +119,23 @@ int pcie40_writefee8( int dev , int ch , int adr , int val ) {
if
(
(
adr
<=
0
)
||
(
adr
>
0x7F
)
)
return
-
1
;
// Reset the FIFO
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
1
<<
SLC_WFIFO_RESET_BIT
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
pcie40_resetReadFifo
(
dev
,
ch
)
;
if
(
ret
!=
0
)
return
ret
;
// Fill the FIFO with the requested information: write MSB first
int
data_word_1
=
0xFFFF
;
int
data_word_2
=
0x0001
;
int
data_word_3
=
0x8000
|
(
adr
&
0x7F
)
;
int
data_word_4
=
0x0000
|
(
val
&
0xFF
)
;
int
data_word_5
=
0xEEEE
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_2
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_3
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_4
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_5
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
std
::
vector
<
int
>
data
;
data
.
push_back
(
0xFFFF
,
0x0001
,
0x8000
|
(
adr
&
0x7F
)
,
0x0000
|
(
val
&
0xFF
)
,
0xEEEE
)
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
return
ret
;
// start emit
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
ret
=
pcie40_startEmit
(
dev
,
ch
)
if
(
ret
!=
0
)
return
-
1
;
return
0
;
...
...
@@ -134,61 +149,38 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
if
(
(
adr
<
0
)
||
(
adr
>
0xFFFF
)
)
return
-
1
;
// Reset the FIFO
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
1
<<
SLC_WFIFO_RESET_BIT
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
pcie40_resetReadFifo
(
dev
,
ch
)
;
if
(
ret
!=
0
)
return
ret
;
// Fill the FIFO with the requested information: write MSB first
int
data_word_1
=
0xFFFB
;
int
data_word_2
=
0x7000
|
(
(
adr
&
0xFF00
)
>>
8
)
;
int
data_word_3
=
0x7000
|
(
adr
&
0xFF
)
;
int
data_word_5
=
0xEEEE
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_2
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_3
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_5
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
std
::
vector
<
int
>
data
;
data
.
push_back
(
0xFFFB
,
0x7000
|
(
(
adr
&
0xFF00
)
>>
8
)
,
0x7000
|
(
adr
&
0xFF
)
,
0xEEEE
)
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
return
ret
;
// start emit
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
ret
=
pcie40_startEmit
(
dev
,
ch
)
if
(
ret
!=
0
)
return
-
1
;
// Wait for the result to come back
int
i
;
for
(
i
=
0
;
i
<
10
;
i
++
)
{
usleep
(
10
)
;
ret
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_STATUS
+
ch
*
0x20
)
;
ret
=
(
ret
&
0xFF00
)
>>
8
;
if
(
ret
==
7
*
8
)
break
;
}
ret
=
pcie40_waitRead
(
dev
,
ch
,
4
)
;
if
(
ret
!=
0
)
return
-
1
;
if
(
i
==
10
)
{
printf
(
"Timeout
\n
"
)
;
return
-
1
;
}
// Read the value
int
t_ret1
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
t_ret2
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
t_ret3
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
t_ret4
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
t_ret5
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
int
t_ret6
=
ecs_read
(
dev
,
SLC_BAR
,
SLC_RFIFO_ADD
+
ch
*
0x20
);
std
::
result
<
int
>
result
;
ret
=
pcie40_readData
(
dev
,
ch
,
result
,
56
)
;
int
t_ret1
=
result
.
at
(
0
);
int
t_ret2
=
result
.
at
(
1
);
int
t_ret3
=
result
.
at
(
2
);
int
t_ret4
=
result
.
at
(
3
);
int
t_ret5
=
result
.
at
(
4
);
int
t_ret6
=
result
.
at
(
5
);
if
(
(
t_ret1
&
0x0000FFFF
)
!=
0xFFFF
)
{
printf
(
"Bad header
\n
"
)
;
...
...
@@ -248,11 +240,8 @@ int pcie40_writefee32( int dev , int ch , int adr , int val ) {
if
(
(
adr
<
0
)
||
(
adr
>
0xFFFF
)
)
return
-
1
;
// Reset the FIFO
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
1
<<
(
SLC_WFIFO_RESET_BIT
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
pcie40_resetReadFifo
(
dev
,
ch
)
;
if
(
ret
!=
0
)
return
ret
;
int
val1
=
(
val
&
0xFF
)
;
int
val2
=
(
val
&
0xFF00
)
>>
8
;
...
...
@@ -260,48 +249,22 @@ int pcie40_writefee32( int dev , int ch , int adr , int val ) {
int
val4
=
(
val
&
0xFF000000
)
>>
24
;
// Fill the FIFO with the requested information: write MSB first
int
data_word_1
=
0xFFFC
;
int
data_word_2
=
0x7000
|
(
(
adr
&
0xFF00
)
>>
8
)
;
int
data_word_3
=
0x7000
|
(
adr
&
0xFF
)
;
int
data_word_4
=
0x7000
|
val4
;
int
data_word_5
=
0x7000
|
val3
;
int
data_word_6
=
0x7000
|
val2
;
int
data_word_7
=
0x7000
|
val1
;
int
data_word_8
=
0xEEEE
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_2
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_3
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_4
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_5
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_6
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_7
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_8
&
0xFFFFFFFF
)
)
;
if
(
ret
!=
0
)
return
-
1
;
std
::
vector
<
int
>
data
;
data
.
push_back
(
0xFFFC
,
0x7000
|
(
(
adr
&
0xFF00
)
>>
8
)
,
0x7000
|
(
adr
&
0xFF
)
,
0x7000
|
val4
,
0x7000
|
val3
,
0x7000
|
val2
,
0x7000
|
val1
,
0xEEEE
)
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
return
ret
;
// start emit
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
ret
=
pcie40_startEmit
(
dev
,
ch
)
if
(
ret
!=
0
)
return
-
1
;
return
ret
;
...
...
@@ -318,18 +281,13 @@ int pcie40_writestream( int dev , int ch , char * filename ) {
}
// Reset the FIFO
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
1
<<
(
SLC_WFIFO_RESET_BIT
)
)
;
if
(
ret
!=
0
)
{
fclose
(
fp
)
;
return
-
1
;
}
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
0
)
;
ret
=
pcie40_resetReadFifo
(
dev
,
ch
)
;
if
(
ret
!=
0
)
{
fclose
(
fp
)
;
return
-
1
;
}
// Fill the FIFO with the requested information: write MSB first
// This is a stream write -> FFFD
int
data_word_1
=
0xFFFD
;
...
...
@@ -344,49 +302,39 @@ int pcie40_writestream( int dev , int ch , char * filename ) {
// Read the file
int
c
=
0
;
int
count
=
0
;
std
::
vector
<
int
>
data
;
while
((
c
=
getc
(
fp
))
!=
EOF
)
{
count
++
;
if
(
count
==
7
)
{
printf
(
"Insert 0
\n
"
)
;
data_word_1
=
0x0000
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_1
&
0xFFFFFFFF
)
)
;
}
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
(
(
0x70
<<
8
)
|
(
c
&
0xFF
)
)
&
0xFFFFFFFF
)
)
;
printf
(
"DATA = %x
\n
"
,
c
)
;
if
(
ret
!=
0
)
{
fclose
(
fp
)
;
return
-
1
;
if
(
count
==
0
)
data
.
push_back
(
0xFFFD
)
;
count
++
;
data
.
push_back
(
(
int
)
(
(
(
0x70
<<
8
)
|
(
c
&
0xFF
)
)
&
0xFFFFFFFF
)
)
;
if
(
14
==
count
)
{
data
.
push_back
(
0xEEEE
)
;
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
{
fclose
(
fp
)
;
return
-
1
;
}
ret
=
pcie40_startEmit
(
dev
,
ch
)
;
if
(
ret
!=
0
)
{
fclose
(
fp
)
;
return
-
1
;
}
count
=
0
;
data
.
clear
()
;
}
}
fclose
(
fp
)
;
// End of the file -> 0xEEEE
int
data_word_3
=
0xEEEE
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_ADD
+
ch
*
0x20
,
(
int
)
(
data_word_3
&
0xFFFFFFFF
)
)
;
data
.
push_back
(
0xEEEE
)
;
ret
=
pcie40_writeToFifo
(
dev
,
ch
,
data
)
;
if
(
ret
!=
0
)
return
-
1
;
// start emit
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
1
<<
(
SLC_WFIFO_EMIT_BIT
+
ch
)
)
;
if
(
ret
!=
0
)
return
-
1
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_START_ADD
,
0
)
;
ret
=
pcie40_startEmit
(
dev
,
ch
)
;
if
(
ret
!=
0
)
return
-
1
;
return
ret
;
...
...
@@ -394,6 +342,10 @@ int pcie40_writestream( int dev , int ch , char * filename ) {
int
pcie40_writebytestream
(
int
dev
,
int
ch
,
int
len
,
const
char
*
bytes
)
{
printf
(
"Desactivated for the moment
\n
"
)
;
return
-
1
;
// Reset the FIFO
unsigned
ret
=
0
;
ret
=
ecs_write
(
dev
,
SLC_BAR
,
SLC_WFIFO_RESET_ADD
,
...
...
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