Merge pull request #3 in BIDU/software from...

Merge pull request #3 in BIDU/software from feature/BIIDAQ-73-implement-write-stream-slow-control-functionality to 6links

* commit 'af127eb2':
  stream write change FFFC to FFFD
  Add bytestream function
  First version of the writestream slow control function

Pcie40Libraries/pcie40_b2slc.c

@@ -308,5 +308,112 @@ int pcie40_writefee32( int dev , int ch , int adr , int val ) {
 }
 
 int pcie40_writestream( int dev , int ch , char * filename ) {
-  return 0 ;
+  // PCIe40
+  // Check if the file exists
+  const char * mode = "r" ; 
+  FILE * fp = fopen( filename , mode ) ;
+  if ( 0 == fp ) {
+    printf( "The file does not exist\n" ) ;
+    return -1 ; 
+  }
+  // Reset the FIFO
+  unsigned ret = 0 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 
+		   1 << ( SLC_WFIFO_RESET_BIT ) ) ;
+  if ( ret != 0 ) { 
+    fclose( fp ) ; 
+    return -1 ;
+  }
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
+  if ( ret != 0 ) { 
+    fclose( fp ) ; 
+    return -1 ;
+  }
+
+  // Fill the FIFO with the requested information: write MSB first
+  // This is a stream write -> FFFD 
+  int data_word_1 = 0xFFFD ;
+
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		   (int) ( data_word_1 & 0xFFFFFFFF ) ) ;
+  if ( ret != 0 ) { 
+    fclose( fp ) ; 
+    return -1 ;
+  }
+
+  // Read the file
+  int c = 0 ;
+  while ((c = getc(fp)) != EOF) {
+    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		     (int) ( ( ( 0x70 << 8 ) | ( c & 0xFF ) ) & 
+			     0xFFFFFFFF ) ) ;
+    if ( ret != 0 ) { 
+      fclose( fp ) ; 
+      return -1 ;
+    }
+  }
+  fclose( fp ) ;
+
+  // End of the file -> 0xEEEE 
+  int data_word_3 = 0xEEEE ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		   (int) ( data_word_3 & 0xFFFFFFFF ) ) ;
+  if ( ret != 0 ) return -1 ;
+
+  // start emit
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
+  if ( ret != 0 ) return -1 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 
+  		   1 << ( SLC_WFIFO_EMIT_BIT + ch ) ) ;
+  if ( ret != 0 ) return -1 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
+  if ( ret != 0 ) return -1 ;
+
+  return ret ;
+}
+
+int pcie40_writebytestream( int dev, int ch, int len, const char *bytes  )
+{
+  // Reset the FIFO
+  unsigned ret = 0 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 
+		   1 << ( SLC_WFIFO_RESET_BIT ) ) ;
+  if ( ret != 0 )  return -1 ;
+  
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_RESET_ADD , 0 ) ;
+  if ( ret != 0 ) return -1 ;
+
+  // Fill the FIFO with the requested information: write MSB first
+  // This is a stream write -> FFFD 
+  int data_word_1 = 0xFFFD ;
+
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		   (int) ( data_word_1 & 0xFFFFFFFF ) ) ;
+  if ( ret != 0 ) return -1 ;
+
+  // Read the file
+  int i ; 
+  for ( i = 0 ; i < len ; ++i ) {
+    ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		     (int) ( ( ( 0x70 << 8 ) | ( bytes[i] & 0xFF ) ) & 
+			     0xFFFFFFFF ) ) ;
+    if ( ret != 0 ) return -1 ;
+  }
+
+  // End of the stream -> 0xEEEE 
+  int data_word_3 = 0xEEEE ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_ADD + ch * 0x20 , 
+		   (int) ( data_word_3 & 0xFFFFFFFF ) ) ;
+  if ( ret != 0 ) return -1 ;
+
+  // start emit
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
+  if ( ret != 0 ) return -1 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 
+  		   1 << ( SLC_WFIFO_EMIT_BIT + ch ) ) ;
+  if ( ret != 0 ) return -1 ;
+  ret = ecs_write( dev , SLC_BAR , SLC_WFIFO_START_ADD , 0 ) ;
+  if ( ret != 0 ) return -1 ;
+
+  return ret ;
 }

Pcie40Libraries/pcie40_b2slc.h

@@ -26,5 +26,7 @@ int pcie40_writefee32(int dev, int ch, int adr, int val);
 
 int pcie40_writestream(int dev, int ch, char *filename);
 
+int pcie40_writebytestream(int dev, int ch, int len, const char *bytes);
+
 #endif // PCIE40_B2SLC_H