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Dmytro Levit
Software
Commits
61cd49ae
Commit
61cd49ae
authored
4 years ago
by
qzhou
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add read function of pcie40 register
parent
e2e44f9f
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1 changed file
Pcie40Applications/regconfig.cpp
+14
-1
14 additions, 1 deletion
Pcie40Applications/regconfig.cpp
with
14 additions
and
1 deletion
Pcie40Applications/regconfig.cpp
+
14
−
1
View file @
61cd49ae
...
...
@@ -20,6 +20,8 @@
extern
"C"
int
ecs_open
(
int
dev
,
int
bar
);
extern
"C"
void
ecs_close
(
int
dev
,
int
bar
);
extern
"C"
unsigned
ecs_read
(
int
dev
,
int
bar
,
unsigned
add
)
;
//#define PCIE_DEV 0
#define MAX_NUM_CH 48
#define MAX_SLOT 3
...
...
@@ -34,6 +36,7 @@ char *filename;
char
*
operation
;
//Flag for switch slc access method
bool
PCIE40_REG
=
false
;
bool
USE_FEE8
=
false
;
bool
USE_FEE32
=
false
;
bool
READ_ONLY
=
false
;
...
...
@@ -112,6 +115,9 @@ void argument(int argc, char **argv){
fprintf
(
stderr
,
"Invalid device slot %d, Valid slot [0, %d]
\n
"
,
dev_slot
,
MAX_SLOT
);
}
}
if
(
ss
==
"--pcie40"
){
PCIE40_REG
=
true
;
}
if
(
ss
==
"--ch"
){
ch
=
atoi
(
argv
[
++
i
]);
if
(
ch
<
0
||
ch
>=
MAX_NUM_CH
){
...
...
@@ -155,8 +161,10 @@ void argument(int argc, char **argv){
if
(
ss
==
"-h"
||
ss
==
"-help"
){
fprintf
(
stderr
,
"%s version %d.%02d date %d
\n
"
,
ARGV0
,
VERSION
/
100
,
VERSION
%
100
,
MOD_DATE
);
fprintf
(
stderr
,
"usage: %s --ch 0 --fee32 -w 0x12 0x0
\n
"
fprintf
(
stderr
,
"usage: %s --pcie40 -r 0x00050010
\n
"
,
ARGV0
);
fprintf
(
stderr
,
" %s --ch 0 --fee32 -w 0x12 0x0
\n
"
" --dev xx #device slot number which installed PCIe40
\n
"
" --pcie40 #access the register of pcie40
\n
"
" --ch xx #link channel number
\n
"
" --fee8 or --fee32 #use A7D8 or A16D32 for access register
\n
"
" -r xx or -w xx xx #read or write register with address xx[hex] or data xx[hex]
\n\n
"
...
...
@@ -340,6 +348,11 @@ int main(int argc, char** argv){
pcie40reg_t
pcie40
;
int
result
=
-
1
;
if
(
PCIE40_REG
&&
READ_ONLY
){
result
=
ecs_read
(
dev_slot
,
SLC_BAR
,
addr
);
printf
(
"reg%08x = %08x
\n
"
,
addr
,
result
);
}
if
(
pcie40_b2l_status
(
dev_slot
,
ch
)
&&
pcie40_b2l_rxready
(
dev_slot
,
ch
)
&&
pcie40_b2l_txready
(
dev_slot
,
ch
)){
if
(
USE_FEE8
&&
READ_ONLY
){
result
=
pcie40_readfee8
(
dev_slot
,
ch
,
addr
);
...
...
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