fixed the print out for pll info

Pcie40Applications/statlink.cpp

@@ -29,7 +29,6 @@ extern "C" void  ecs_close(int dev, int bar);
 #define SIZE_MEMO_FPGA 1024 // maximum size of memory in FPGA
 
 bool INFO = false;
-bool USAGE = false;
 
 #ifndef D
 #define D(a,b,c) (((a)>>(c))&((1<<((b)+1-(c)))-1))
@@ -58,6 +57,7 @@ void argument(int argc, char **argv){
       dev_slot = atoi(argv[++i]);
       if( dev_slot<0 || dev_slot >= MAX_SLOT){
 	fprintf(stderr, "Invalid device slot %d, Valid slot [0, %d]\n", dev_slot, MAX_SLOT);
+	exit(1);
       }
     }
     if(ss=="--info"){
@@ -68,6 +68,7 @@ void argument(int argc, char **argv){
 	ch = atoi(argv[j]);
 	if( ch<0 || ch >= MAX_NUM_CH){
 	  fprintf(stderr, "Invalid channel ID %d, Valid ID [0, %d]\n", ch, MAX_NUM_CH);
+	  exit(1);
 	}
 	en_link.reset();
 	en_link.set(ch, true);
@@ -77,14 +78,13 @@ void argument(int argc, char **argv){
       }
     }
     if(ss=="-h" || ss=="-help"){
-      USAGE = true;
       fprintf(stderr, "%s version %d.%02d date %d\n"
             , ARGV0, VERSION/100, VERSION%100, MOD_DATE);
       fprintf(stderr,  "usage: %s --ch 0 \n"
                        "       --dev   xx              #device slot number which installed PCIe40\n" 
 	               "       --ch    xx  xx ...      #link channel number\n" 
                        , ARGV0); 
-      return;
+      exit(1);
     }
   }
 }
@@ -115,26 +115,33 @@ statpice40(pcie40reg_t pcie40reg)
 	 B(pcie40_sta, 3)?"ERROR":"OK",
 	 B(pcie40_sta, 4)?"ERROR":"OK");
   if(INFO){
-    printf("Input frequency = %f\nPLL[0-23] : %s | %s | %s | %s | %s\nPLL[24-47]: %s | %s | %s | %s | %s\nPLL[FTSW] : %s | %s | %s | %s | %s\n",
-	   (double)pcie40_inputPLLFrequency(dev_slot)/1000000,
-	   pcie40_pllInputStatus(dev_slot, 1)?"OK":"BAD",
-	   pcie40_pllFrequencyStatus(dev_slot, 1)?"OK":"BAD",
-	   pcie40_pllLockCounter(dev_slot, 1)?"OK":"LOL",
-	   pcie40_pllInputCounter(dev_slot, 1)?"OK":"LOS",
-	   pcie40_pllFrequencyCounter(dev_slot, 1)?"OK":"OOF",
-	   pcie40_pllLockStatus(dev_slot, 2)?"LOCKED":"LOL",
-	   pcie40_pllInputStatus(dev_slot, 2)?"OK":"BAD",
-	   pcie40_pllFrequencyStatus(dev_slot, 2)?"OK":"BAD",
-	   pcie40_pllLockCounter(dev_slot, 2)?"OK":"LOL",
-	   pcie40_pllInputCounter(dev_slot, 2)?"OK":"LOS",
-	   pcie40_pllFrequencyCounter(dev_slot, 2)?"OK":"OOF",
-	   pcie40_pllLockStatus(dev_slot, 3)?"LOCKED":"LOL",
-	   pcie40_pllInputStatus(dev_slot, 3)?"OK":"BAD",
-	   pcie40_pllFrequencyStatus(dev_slot, 3)?"OK":"BAD",
-	   pcie40_pllLockCounter(dev_slot, 3)?"OK":"LOL",
-	   pcie40_pllInputCounter(dev_slot, 3)?"OK":"LOS",
-	   pcie40_pllFrequencyCounter(dev_slot, 3)?"OK":"OOF");
-  }
+    printf("__________________________________\n");
+    printf("Input frequency = %f [MHz]\n",(double)pcie40_inputPLLFrequency(dev_slot)/1000000);
+    printf("--------\n");
+    printf("PLL No.   :   Lock sta | Input sta | Fre. sta | Lock cnt | Input. cnt | Fre. cnt\n");
+    printf("PLL[0-23] : %*s | %s | %s | %s | %s | %s\n", 10,
+	   pcie40_pllLockStatus(dev_slot, 1)?"LOCKED":"NOT LOCKED",
+	   pcie40_pllInputStatus(dev_slot, 1)?"OK ":"BAD",
+	   pcie40_pllFrequencyStatus(dev_slot, 1)?"OK ":"BAD",
+	   pcie40_pllLockCounter(dev_slot, 1)?"OK ":"LOL",
+	   pcie40_pllInputCounter(dev_slot, 1)?"OK ":"LOS",
+	   pcie40_pllFrequencyCounter(dev_slot, 1)?"OK ":"OOF");
+    printf("PLL[24-47]: %*s | %s | %s | %s | %s | %s\n", 10,
+	   pcie40_pllLockStatus(dev_slot, 2)?"LOCKED":"NOT LOCKED",
+	   pcie40_pllInputStatus(dev_slot, 2)?"OK ":"BAD",
+	   pcie40_pllFrequencyStatus(dev_slot, 2)?"OK ":"BAD",
+	   pcie40_pllLockCounter(dev_slot, 2)?"OK ":"LOL",
+	   pcie40_pllInputCounter(dev_slot, 2)?"OK ":"LOS",
+	   pcie40_pllFrequencyCounter(dev_slot, 2)?"OK ":"OOF");
+    printf("PLL[FTSW] : %*s | %s | %s | %s | %s | %s\n", 10,
+	   pcie40_pllLockStatus(dev_slot, 3)?"LOCKED":"NOT LOCKED",
+	   pcie40_pllInputStatus(dev_slot, 3)?"OK ":"BAD",
+	   pcie40_pllFrequencyStatus(dev_slot, 3)?"OK ":"BAD",
+	   pcie40_pllLockCounter(dev_slot, 3)?"OK ":"LOL",
+	   pcie40_pllInputCounter(dev_slot, 3)?"OK ":"LOS",
+	   pcie40_pllFrequencyCounter(dev_slot, 3)?"OK ":"OOF");
+    printf("__________________________________\n");
+  }  
   return 0;
 }
 
@@ -182,7 +189,7 @@ readregs(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
     if (!link_mask[i]) continue;
     
     if ( !pcie40_b2l_status(dev_slot, i) ) {
-      printf("b2link-%02d is down\n", i);
+      //printf("b2link-%02d is down\n", i);
       continue;
     }
     pcie->xbusy   = pcie40_readfee32(dev_slot, ch, PCIE40REG_CCLK);
@@ -306,19 +313,17 @@ int main(int argc, char** argv){
   pcie40reg_t pcie40;
   pcie40reg_t pcie40reg[48];
   
-  if(!USAGE){
-    // open pcie40 device driver for current process
-    ecs_open( dev_slot , SLC_BAR );
-    
-    printf("statlink version %d (%d) / ", VERSION, MOD_DATE);
-    statpice40(pcie40);
-    
-    readregs(link_mask, pcie40reg);
-    statlink(link_mask, pcie40reg);
-    
-    // close pcie40 device driver for current process
-    ecs_close( dev_slot , SLC_BAR) ;
-  }
+  // open pcie40 device driver for current process
+  ecs_open( dev_slot , SLC_BAR );
+  
+  printf("statlink version %d (%d) / ", VERSION, MOD_DATE);
+  statpice40(pcie40);
+  
+  readregs(link_mask, pcie40reg);
+  statlink(link_mask, pcie40reg);
+  
+  // close pcie40 device driver for current process
+  ecs_close( dev_slot , SLC_BAR) ;
   
   return 0 ;
 }