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feature/faststart
c6f2a138
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Combines all commands for starting acq into single packet to improve latency
·
May 16, 2016
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feature/SmallLambda
e58976af
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Merge branch 'feature/SmallLambda' of...
·
Jan 17, 2017
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feature/bitdepth
b121d577
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Minor changes to improve compatibility with high speed burst mode of 1-chip system.
·
Mar 09, 2017
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test/timingadjust
e582f9e5
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Modified TriggerMode command so that it sets clock timing in each chip
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Apr 24, 2017
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feature/digitaltest
8c0342c7
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Changed code so that TriggerMode writes timings ONLY if equalise bit is set. (This is a hack for
·
May 19, 2017
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feature/newsinglechip
b98234d5
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Merge branch 'master' into feature/newsinglechip2p5g
·
Jul 10, 2017
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feature/newsinglechip2p5g
008036bf
·
Added hexa mode with handshake and omission of chips 4-9
·
Oct 30, 2017
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feature/rollover
092fb77c
·
Removed cout test messages and successfully retested.
·
Nov 01, 2017
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feature/newdigitaltest
c457887b
·
Fixed minor bug with merging. Switched off image distortion correction to...
·
Nov 14, 2017
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feature/loadtimings
71e38d95
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Removed debug text, bug fixing
·
Dec 17, 2018
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feature/merged750k60k
0690d76f
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Increasing maximum number of decoding threads possible
·
Mar 27, 2019
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feature/dpmerge
d0a3f0e3
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Incorporating timing adjust (and later 60k) into current master. These...
·
Apr 22, 2019
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feature/debian9
96d7136c
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Merge branch 'feature/merged750k60k' into feature/debian9. This adds FPGA...
·
Apr 30, 2019
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feature/250k
637309a7
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Improved timeouts and removed some debug output to improve performance
·
Jun 06, 2019
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feature/compstrategy
d94fdb53
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Added compression strategy option
·
Jun 18, 2019
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feature/singledigitaltest
660884e5
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Hard-coded with single chip load pattern, read full 12-chip image (to improve speed and robustness)
·
Nov 11, 2019
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feature/deb9digitaltest
db78afa4
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This version loads all 12 chips with the test pattern, rather than just 1
·
Mar 06, 2020
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master
default
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6eac7278
·
Update .gitlab-ci.yml
·
Jan 13, 2022
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