New minor release 00.17.00 ========================== New features: - Added isOpenend() function to Device. See ticket #2455 in Redmine. - Allow 0 significant bits. The map files generated by the DESY firmware may have registers with 0 significant bits, when features are disabled in this particular firmware build. The registers are still present and shall be accessible by raw transfer, but the cooked value will now always read 0 (resp. any cooked value written will result in a raw value of 0). - Allow partial access to 2D registers, similar as it is already possible for 1D registers. Currently, only an offset and a limit on the number of elements for each channel can be specified. Implementing a restriction also for the channels (channel offset and number of channels) should be possible as well but will need a change of the internal interface. Bug fixes / improvements: - Delete default= operators of the DummyRegisterAccessors which may be confusing. See bug #2467 in Redmine. - Fixed merging of transfers of adjecent register in a TransferGroup