From 77c6595e28a8d166e8a2003aa538e01db239e354 Mon Sep 17 00:00:00 2001
From: Patrick Nonn <nicodemous@gmxpro.net>
Date: Tue, 18 Jan 2022 16:13:31 +0100
Subject: [PATCH] Adaption to llrfctrl-server ver. 7.8
---
CMakeLists.txt | 4 +-
llrfctrl6-epics/settings/000-makeBoard.py | 45 +-
llrfctrl6-epics/settings/FACILITY.KEK.py | 6 +-
llrfctrl6-epics/settings/zzz-derivedValues.py | 1 +
.../asSaves/{dummy.txt => .cmake} | 0
.../iocBoot/iocChimeraTKApp/initHardware.py | 6 +-
.../iocBoot/iocChimeraTKApp/initSIS.py | 247 +-
.../iocBoot/iocChimeraTKApp/initTCK7.py | 300 +-
...scav_sis8300ku_cmtb_1.1.4-0-g04139ff9.mapp | 537 +++
...av_sis8300ku_regae_1.0.0-10-g0842dba5.mapp | 535 ---
.../iocBoot/iocChimeraTKApp/llrfctrl.dmap | 15 +-
.../iocChimeraTKApp/llrfctrl_adc.xlmap | 719 ++--
.../iocChimeraTKApp/llrfctrl_controller.xlmap | 3296 ++++++++---------
.../sincav_sis8300ku_regae_r4401.mapp | 601 ---
14 files changed, 2584 insertions(+), 3728 deletions(-)
rename llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/asSaves/{dummy.txt => .cmake} (100%)
create mode 100644 llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_cmtb_1.1.4-0-g04139ff9.mapp
delete mode 100644 llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_regae_1.0.0-10-g0842dba5.mapp
delete mode 100644 llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/sincav_sis8300ku_regae_r4401.mapp
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 32c1eeb..6a3f3ee 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -3,8 +3,8 @@ cmake_minimum_required(VERSION 3.12)
# Note: Always keep MAJOR_VERSION and MINOR_VERSION identical to the server version. Count only the patch separately.
set(${PROJECT_NAME}_MAJOR_VERSION 07)
-set(${PROJECT_NAME}_MINOR_VERSION 07)
-set(${PROJECT_NAME}_PATCH_VERSION 01)
+set(${PROJECT_NAME}_MINOR_VERSION 08)
+set(${PROJECT_NAME}_PATCH_VERSION 00)
include(cmake/set_version_numbers.cmake)
include(cmake/config_generator_project.cmake)
diff --git a/llrfctrl6-epics/settings/000-makeBoard.py b/llrfctrl6-epics/settings/000-makeBoard.py
index b0d0eb6..c1f6766 100644
--- a/llrfctrl6-epics/settings/000-makeBoard.py
+++ b/llrfctrl6-epics/settings/000-makeBoard.py
@@ -22,21 +22,6 @@ class stationBase :
IDX_REFL_CM = {}
global isDummy
isDummy={}
-
- # INTERFACE_REV_CONTROLLER and INTERFACE_REV_ADC are usually set to the FIRMWARE_REV_CONTROLLER resp
- # FIRMWARE_REV_ADC, but it is allowed to override these variables in case a firmware has a new revision number but
- # is branched off an old interface version.
- global FIRMWARE_REV_CONTROLLER
- global FIRMWARE_REV_ADC
- global INTERFACE_REV_CONTROLLER
- global INTERFACE_REV_ADC
- if not 'INTERFACE_REV_CONTROLLER' in globals() :
- INTERFACE_REV_CONTROLLER = FIRMWARE_REV_CONTROLLER
- if not 'INTERFACE_REV_ADC' in globals() :
- if 'FIRMWARE_REV_ADC' in globals() :
- INTERFACE_REV_ADC = FIRMWARE_REV_ADC
- else :
- INTERFACE_REV_ADC = 9999
def useULOG(self) :
global HAS_ULOG
@@ -140,9 +125,8 @@ class boardDWC10(boardSISBase) :
if 'FIRMWARAE_PROJECT_ADC' in globals() :
ADCBOARD[self.index]["FIRMWARE_PROJECT"] = FIRMWARAE_PROJECT_ADC
else :
- ADCBOARD[self.index]["FIRMWARE_PROJECT"] = "llrf_ctrl_sis8300l"
- ADCBOARD[self.index]["FIRMWARE_TYPE"] = "acc1"
- ADCBOARD[self.index]["FIRMWARE_REV"] = FIRMWARE_REV_ADC
+ ADCBOARD[self.index]["FIRMWARE_PROJECT"] = "llrf_mcav_fd_sis8300l"
+ ADCBOARD[self.index]["FIRMWARE_VER"] = FIRMWARE_VER_ADC
globals()["SIS_"+signal+"_CM"][cryomodule] = slot
globals()["IDX_"+signal+"_CM"][cryomodule] = self.index
@@ -178,7 +162,7 @@ class boardDWC10(boardSISBase) :
########################################################################################################################
class boardSincav(boardSISBase) :
- def __init__(self,slot, firmwareType, channelNames, firmwareProject="sincav_sis8300l", skipController=False) :
+ def __init__(self,slot, firmwareType, channelNames, firmwareProject="llrf_scav_sis8300l", skipController=False) :
boardSISBase.__init__(self,slot)
# We used InstanceType.mulcavStandAlone as a placeholder to indicate the system was not configured master or slave.
@@ -193,9 +177,9 @@ class boardSincav(boardSISBase) :
ADCBOARD[self.index]["CH"] = channelNames
ADCBOARD[self.index]["XLMAP_TYPE"] = "adc8ch"
ADCBOARD[self.index]["FIRMWARE_TYPE"] = firmwareType
- ADCBOARD[self.index]["FIRMWARE_PROJECT"] = firmwareProject
- global FIRMWARE_REV_CONTROLLER
- ADCBOARD[self.index]["FIRMWARE_REV"] = FIRMWARE_REV_CONTROLLER
+ ADCBOARD[self.index]["FIRMWARE_PROJECT"] = firmwareProject + "_" + firmwareType
+ global FIRMWARE_VER_CONTROLLER
+ ADCBOARD[self.index]["FIRMWARE_VER"] = FIRMWARE_VER_CONTROLLER
global NR_OF_MODULES
NR_OF_MODULES = 1
@@ -207,7 +191,7 @@ class boardSincav(boardSISBase) :
global FIRMWARE_PROJECT_CONTROLLER
global CTRLBOARD_SLOT
FIRMWARE_TYPE_CONTROLLER = firmwareType
- FIRMWARE_PROJECT_CONTROLLER = firmwareProject
+ FIRMWARE_PROJECT_CONTROLLER = firmwareProject + "_" + firmwareType
CTRLBOARD_SLOT = ADCBOARD[self.index]["SLOT"]
def withBeamBasedFeedback(self) :
@@ -218,14 +202,14 @@ class boardSincav(boardSISBase) :
########################################################################################################################
class boardDWC8VM1(boardSincav) :
- def __init__(self,slot, firmwareType, channelNames, firmwareProject="sincav_sis8300l", skipController=False) :
+ def __init__(self,slot, firmwareType, channelNames, firmwareProject="llrf_scav_sis8300l", skipController=False) :
boardSincav.__init__(self,slot, firmwareType, channelNames, firmwareProject, skipController)
ADCBOARD[self.index]["RTM_TYPE"] = "DWC8VM1"
########################################################################################################################
class boardDS8VM1(boardSincav) :
- def __init__(self,slot, firmwareType, channelNames, pllConfig, firmwareProject="sincav_sis8300l", skipController=False) :
+ def __init__(self,slot, firmwareType, channelNames, pllConfig, firmwareProject="llrf_scav_sis8300l", skipController=False) :
boardSincav.__init__(self,slot, firmwareType, channelNames, firmwareProject, skipController)
ADCBOARD[self.index]["RTM_TYPE"] = "DS8VM1"
global DS8VM1_PLL_config
@@ -234,15 +218,14 @@ class boardDS8VM1(boardSincav) :
########################################################################################################################
class boardDWC10sincav(boardSincav) :
- def __init__(self,slot, firmwareType, channelNames, firmwareProject="llrf_ctrl_sis8300l") :
+ def __init__(self,slot, firmwareType, channelNames, firmwareProject="llrf_mcav_fd_sis8300l") :
boardSincav.__init__(self,slot, firmwareType, channelNames, firmwareProject, True)
ADCBOARD[self.index]["AMPL_PHASE_DAQ"] = "DAQ0"
ADCBOARD[self.index]["RAW_DAQ"] = "DAQ1"
ADCBOARD[self.index]["RTM_TYPE"] = "DWC10"
ADCBOARD[self.index]["XLMAP_TYPE"] = "adc"
- ADCBOARD[self.index]["FIRMWARE_PROJECT"] = "llrf_ctrl_sis8300l"
- ADCBOARD[self.index]["FIRMWARE_TYPE"] = "acc1"
- ADCBOARD[self.index]["FIRMWARE_REV"] = FIRMWARE_REV_ADC
+ ADCBOARD[self.index]["FIRMWARE_PROJECT"] = firmwareProject
+ ADCBOARD[self.index]["FIRMWARE_VER"] = FIRMWARE_VER_ADC
########################################################################################################################
@@ -250,10 +233,8 @@ class boardTCK7 :
def __init__(self, slot) :
global CTRLBOARD_SLOT
CTRLBOARD_SLOT = slot
- global FIRMWARE_TYPE_CONTROLLER
global FIRMWARE_PROJECT_CONTROLLER
- FIRMWARE_TYPE_CONTROLLER = "acc1"
- FIRMWARE_PROJECT_CONTROLLER = "llrf_ctrl_tck7b"
+ FIRMWARE_PROJECT_CONTROLLER = "llrf_mcav_ctrl_tck7"
def withBeam(self, toroidLinkSource) :
if INSTANCE_TYPE != InstanceType.mulcavSlave:
diff --git a/llrfctrl6-epics/settings/FACILITY.KEK.py b/llrfctrl6-epics/settings/FACILITY.KEK.py
index f4a9cc2..a7a19fc 100644
--- a/llrfctrl6-epics/settings/FACILITY.KEK.py
+++ b/llrfctrl6-epics/settings/FACILITY.KEK.py
@@ -1,7 +1,7 @@
if ACCELERATOR == "KEK" :
- FIRMWARE_REV_ADC=4401
- FIRMWARE_REV_CONTROLLER=FIRMWARE_REV_ADC
+ FIRMWARE_VER="1.1.4-0-g04139ff9"
+ FIRMWARE_VER_CONTROLLER=FIRMWARE_VER
singleCavityStation().useLOGM()
@@ -45,6 +45,6 @@ if ACCELERATOR == "KEK" :
if STATION == "VCT1" :
slot=4
- boardDWC8VM1(slot=slot, firmwareType="regae", firmwareProject="sincav_sis8300ku", channelNames=channelNames)
+ boardDWC8VM1(slot=slot, firmwareType="cmtb", firmwareProject="llrf_scav_sis8300ku", channelNames=channelNames)
diff --git a/llrfctrl6-epics/settings/zzz-derivedValues.py b/llrfctrl6-epics/settings/zzz-derivedValues.py
index 9c4c93a..5a8a018 100644
--- a/llrfctrl6-epics/settings/zzz-derivedValues.py
+++ b/llrfctrl6-epics/settings/zzz-derivedValues.py
@@ -12,3 +12,4 @@ else :
# reducing the sampling rate might leave too few samples to optimise the ADC range.
pulseLengthRaw = pulseLength
samplingTimeRawAdc = 1/clockFrequency
+
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/asSaves/dummy.txt b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/asSaves/.cmake
similarity index 100%
rename from llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/asSaves/dummy.txt
rename to llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/asSaves/.cmake
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initHardware.py b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initHardware.py
index 4172074..d313765 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initHardware.py
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initHardware.py
@@ -27,15 +27,15 @@ if deviceName in isDummy :
print("Performing initialisation of device "+deviceName+"...")
mtca4u.set_dmap_location("llrfctrl.dmap")
-device = mtca4u.Device(deviceName)
if deviceName != "CtrlBoard" :
- initSIS.init(device, deviceName)
+ initSIS.init(deviceName)
else :
% if INSTANCE_TYPE == InstanceType.sincav :
# No separate controller board initialisation necessary in single cavity setup (same board as AdcBoard0)
+ print("(done as part of AdcBoard0 initialisation)")
sys.exit(0)
% else :
- initTCK7.init(device, deviceName)
+ initTCK7.init()
% endif
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initSIS.py b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initSIS.py
index 20ddafe..eea3af2 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initSIS.py
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initSIS.py
@@ -24,15 +24,12 @@ pulseLength = ${pulseLength}
${"########################################################################################################################"}
-def init(device, deviceName) :
+def init(deviceName) :
+ device = mtca4u.Device(deviceName)
# Readout the FW type to distinguish single and multi cavity setups (actually isMultiCavity is a misnomer, it just
# means DWC10 even in single cavity setups -> FIXME correct this name!)
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
- FW_type = device.read("APP.0", "WORD_FIRMWARE")
-% else :
- FW_type = device.read("APP.0", "WORD_ID")
-% endif
+ FW_type = device.read("BSP", "WORD_PRJ_ID")
isMultiCavity = False
if FW_type == 0x30002 :
isMultiCavity = True
@@ -44,49 +41,24 @@ def init(device, deviceName) :
print("*****************************************************")
sys.exit(1)
- # determine mapfile revision and verify firmware and map file match
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
- mapFileRevisionMask = int("0000FFFF", 16)
- mapFileRevisionA = int(device.read("APP.0", "WORD_REVISION")) & mapFileRevisionMask
- mapFileRevisionB = int(device.read("BOARD.0", "WORD_REVISION")) & mapFileRevisionMask
- mapFileRevision = max(mapFileRevisionA, mapFileRevisionB)
- firmwareRevisionMask = int("FFFF0000", 16)
- firmwareRevisionA = int(device.read("APP.0", "WORD_REVISION")) & firmwareRevisionMask
- firmwareRevisionB = int(device.read("BOARD.0", "WORD_REVISION")) & firmwareRevisionMask
- firmwareRevision = max(firmwareRevisionA, firmwareRevisionB)
-
- mapFileRevisionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
- if mapFileRevisionExpected != str(mapFileRevision) :
- print("\n*****************************************************")
- print(" Error: Firmware and map file do not match.")
- print(" Firmware has map file revision " + str(mapFileRevision))
- print(" Map file has revision " + str(mapFileRevisionExpected))
- print("*****************************************************")
- sys.exit(1)
-
- firmwareVersion = str(firmwareRevision)+" (map:"+str(mapFileRevision)+")"
-
-% else :
- mapFileRevision = 9999
- version = int(device.read("BOARD.0", "WORD_PRJ_VERSION"))
+ # determine mapfile version and verify firmware and map file match
+ version = int(device.read("BSP", "WORD_PRJ_VERSION"))
commit = version & 0xff
patch = (version & 0xff00) >> 8
minor = (version & 0xff0000) >> 16
major = (version & 0xff000000) >> 24
firmwareVersion = "%02d.%02d.%02d-%02d" % (major,minor,patch,commit)
- mapFileRevisionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
- (majorExpected, minorExpected, patchExpected) = mapFileRevisionExpected.split("-")[0].split(".")
+ mapFileVersionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
+ (majorExpected, minorExpected, patchExpected) = mapFileVersionExpected.split("-")[0].split(".")
if majorExpected != str(major) or minorExpected != str(minor) :
print("\n*****************************************************")
print(" Error: Firmware and map file do not match.")
- print(" Firmware has version "+firmwareVersion)
- print(" Mapfile hase version " + mapFileRevisionExpected)
+ print(" Firmware has version " + firmwareVersion)
+ print(" Map file has version " + mapFileVersionExpected)
print("*****************************************************")
sys.exit(1)
-% endif
-
print("Firmware version detected: "+firmwareVersion)
@@ -97,10 +69,7 @@ def init(device, deviceName) :
RTM_type = "DWC10"
else :
# Single cavity firmware, read RTM type ID from firmware
- if mapFileRevision > 3665 : # revision of change might be smaller...
- RTM_ID = device.read("APP.0", "VAR_C_RTM_TYPE")
- else :
- RTM_ID = device.read("APP.0", "VAR_CON_RTM_TYPE")
+ RTM_ID = device.read("APP", "VAR_C_RTM_TYPE")
# Interpret the RTM ID
if RTM_ID[0] == 0x5000d851:
@@ -119,10 +88,10 @@ def init(device, deviceName) :
sys.exit(1)
# read initialisation status bit
- status = device.read("BOARD.0", "WORD_BOOT_STATUS")
+ status = device.read("BSP", "WORD_BOOT_STATUS")
# check whether attenuator status is asserted (if yes, force a board reset to reset the state machine)
- att_status = device.read(RTM_type+".0", "WORD_ATT_STATUS")
+ att_status = device.read(RTM_type, "WORD_ATT_STATUS")
# perform full initialisation?
if status != 1 or att_status == 1:
@@ -132,43 +101,21 @@ def init(device, deviceName) :
else :
print("Board is configured but WORD_ATT_STATUS = 1. Performing full initialisation for board " + deviceName)
- # Set names that differ for map file revisions before and from 3017
- # The fw revision for this switch was 3076 before, but for the HZB firmware at least 3017 already has the new names.
- # This applies to all switchs with that revision.
- # Dictionary for revisions >= 3017
- revDependedNames = {
- "DAQ_MODULE": "DAQ.0",
- "DAQ_WORD_SAMPLES": "WORD_SAMPLES",
- "DAQ_WORD_ENABLE": "WORD_ENABLE",
- "RTM_WORD_RF_PERMIT": "WORD_RF_PERMIT"
- }
-
- # Redefine names for older revisions
- # Note: Multi-cavity firmware is currently on a branch, so revision numbers are higher
- if mapFileRevision < 3017 or ( isMultiCavity and mapFileRevision < 4149 ):
- revDependedNames["DAQ_MODULE"] = "APP.0"
- revDependedNames["DAQ_WORD_SAMPLES"] = "WORD_DAQ_SAMPLES"
- revDependedNames["DAQ_WORD_ENABLE"] = "WORD_DAQ_ENABLE"
- revDependedNames["RTM_WORD_RF_PERMIT"] = "WORD_INTERLOCK"
-
# Get the board out of reset state (This is needed for initializing the I2C bus to RTM)
- device.write("BOARD.0", "WORD_RESET_N", 0)
+ device.write("BSP", "WORD_RESET_N", 0)
time.sleep(0.01)
- device.write("BOARD.0", "WORD_RESET_N", 1)
+ device.write("BSP", "WORD_RESET_N", 1)
time.sleep(0.01)
# set DAQ length, enable DAQ, and set strobe divider
- if (not isMultiCavity) or (isMultiCavity and mapFileRevision >= 4149) :
- if isMultiCavity:
- device.write(revDependedNames["DAQ_MODULE"], revDependedNames["DAQ_WORD_SAMPLES"],
- [pulseLength, pulseLength*4])
- else :
- device.write(revDependedNames["DAQ_MODULE"], revDependedNames["DAQ_WORD_SAMPLES"],
- [pulseLength, pulseLength])
- device.write(revDependedNames["DAQ_MODULE"], revDependedNames["DAQ_WORD_ENABLE"], 3) # first and second DAQ
+ if isMultiCavity:
+ device.write("DAQ", "WORD_SAMPLES", [pulseLength, pulseLength*4])
+ else :
+ device.write("DAQ", "WORD_SAMPLES", [pulseLength, pulseLength])
+ device.write("DAQ", "WORD_ENABLE", 3) # first and second DAQ
- if isMultiCavity and mapFileRevision >= 4149 :
- device.write("DAQ.0","WORD_STROBE_DIV", [8,3,0])
+ if isMultiCavity :
+ device.write("DAQ","WORD_STROBE_DIV", [8,3,0])
# RTM Specific Configuration
if RTM_type == "DWC8VM1":
@@ -176,18 +123,17 @@ def init(device, deviceName) :
# allow drive in RF switch (Care for polarity)
# When CON_RTM_INTERLOCK_NEGATE = 0 => WORD_INTERLOCK = 1 means drive is permitted
- device.write("DWC8VM1.0", revDependedNames["RTM_WORD_RF_PERMIT"], 1)
+ device.write("DWC8VM1", "WORD_RF_PERMIT", 1)
# program common mode DAC for VM
- #device.write("DWC8VM1.0", "WORD_DACAB", 850)
- #device.write("DWC8VM1.0", "WORD_DACAB", 1300)
- device.write("DWC8VM1.0", "WORD_DACAB", 570)
+ # Note: This value was discussed in #9126
+ device.write("DWC8VM1", "WORD_DACAB", 850)
# ADC Clock Phase Adjustment (RTM Dependent Value!)
# There is a mux in front of dual ADCs that provide additional phase change
# This is used when DMA region channel assignment is not correct.
# Default value for WORD_ADC_REVERT_CLK on DWC8VM1 is 0x18
- device.write("BOARD.0", "WORD_ADC_REVERT_CLK", 0x18)
+ device.write("BSP", "WORD_ADC_REVERT_CLK", 0x18)
time.sleep(0.01)
elif RTM_type == "DWC10":
@@ -198,9 +144,9 @@ def init(device, deviceName) :
# This is used when DMA region channel assignment is not correct.
# The value depends in case of a controller_slave on tjhe clock source.
if hasULOG :
- device.write("BOARD.0", "WORD_ADC_REVERT_CLK", 0x00)
+ device.write("BSP", "WORD_ADC_REVERT_CLK", 0x00)
else :
- device.write("BOARD.0", "WORD_ADC_REVERT_CLK", 0x18)
+ device.write("BSP", "WORD_ADC_REVERT_CLK", 0x18)
time.sleep(0.01)
elif RTM_type == "DS8VM1":
@@ -240,18 +186,18 @@ def init(device, deviceName) :
time.sleep(0.1) # Wait for 0.1 second
# program common mode DAC for VM (some f*cking magic number)
- device.write("DS8VM1.0", "WORD_DAC_A", 13600) # Common Mode for VM for Q
- device.write("DS8VM1.0", "WORD_DAC_B", 13600) # Common Mode for VM for I
+ device.write("DS8VM1", "WORD_DAC_A", 13600) # Common Mode for VM for Q
+ device.write("DS8VM1", "WORD_DAC_B", 13600) # Common Mode for VM for I
# allow drive in RF switch (Care for polarity)
# When CON_RTM_INTERLOCK_NEGATE = 0 => WORD_INTERLOCK = 1 means drive is permitted
- device.write("DS8VM1.0", revDependedNames["RTM_WORD_RF_PERMIT"], 1)
+ device.write("DS8VM1","WORD_RF_PERMIT", 1)
# ADC Clock Phase Adjustment (RTM Dependent Value!)
# There is a mux in front of dual ADCs that provide additional phase change
# This is used when DMA region channel assignment is not correct.
# Default value for WORD_ADC_REVERT_CLK on DS8VM1 is 0x00
- device.write("BOARD.0", "WORD_ADC_REVERT_CLK", 0)
+ device.write("BSP", "WORD_ADC_REVERT_CLK", 0)
time.sleep(0.01)
print('DS8VM1 Configuration is done. Continuing the AMC configuration... ')
@@ -263,7 +209,7 @@ def init(device, deviceName) :
sys.exit(1)
# Setting internal clock for application part of firmware
- device.write("BOARD.0", "WORD_CLK_SEL", 0)
+ device.write("BSP", "WORD_CLK_SEL", 0)
time.sleep(0.01)
# DS8VM1: wait for PLL to lock (first bit of "DS8VM1.0.WORD_IO_STATUS")
@@ -274,7 +220,7 @@ def init(device, deviceName) :
time.sleep(0.1)
if i % 10 == 0 :
print('.', end='', flush=True)
- IO_STATUS = device.read("DS8VM1.0", "WORD_IO_STATUS")
+ IO_STATUS = device.read("DS8VM1", "WORD_IO_STATUS")
if int(IO_STATUS[0]) & 0b1 == 1:
print("\nDS8VM1 PLL is locked to the reference signal!")
pllLocked = True
@@ -283,68 +229,68 @@ def init(device, deviceName) :
print("\nWARNING! DS8VM1 PLL is NOT locked to the reference signal!")
# Reseting the PLL of the Struck
- device.write("BOARD.0", "WORD_CLK_RST", 1)
+ device.write("BSP", "WORD_CLK_RST", 1)
time.sleep(0.01)
- device.write("BOARD.0", "WORD_CLK_RST", 0)
+ device.write("BSP", "WORD_CLK_RST", 0)
time.sleep(0.01)
# Programming the Muxes of the Struck
# We are configuring the muxes so that AD9510 PLL gets Quartz signal as CLK1
# This is not so crucial since we will use CLK2 of the PLL anyway.
muxData = [0, 0, 3, 3, 0, 0]
- device.write("BOARD.0", "WORD_CLK_MUX", muxData)
+ device.write("BSP", "WORD_CLK_MUX", muxData)
time.sleep(0.01)
# Selecting which CLK input will be used to distribute
# 0 -> PLL uses clock coming from RTM(CLK2) 1 -> PLL uses clock coming from Muxes(CLK1)
- device.write("BOARD.0", "AREA_SPI_DIV", 0, 0x45)
+ device.write("BSP", "AREA_SPI_DIV", 0, 0x45)
time.sleep(0.01)
# PLL Power Down Mode is set to: Synchronous Power Down, PreScaler Mode -> Divider Value set to 1
- device.write("BOARD.0", "AREA_SPI_DIV", 0x43, 0x0A)
+ device.write("BSP", "AREA_SPI_DIV", 0x43, 0x0A)
time.sleep(0.01)
# All Outputs levels (LVPECL) are set to 660mV
- device.write("BOARD.0", "AREA_SPI_DIV", 0x0C, 0x3C)
+ device.write("BSP", "AREA_SPI_DIV", 0x0C, 0x3C)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x0C, 0x3D)
+ device.write("BSP", "AREA_SPI_DIV", 0x0C, 0x3D)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x0C, 0x3E)
+ device.write("BSP", "AREA_SPI_DIV", 0x0C, 0x3E)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x0C, 0x3F)
+ device.write("BSP", "AREA_SPI_DIV", 0x0C, 0x3F)
time.sleep(0.01)
# Output Current Level = 3.5mA Termination 100ohms Output Type = LVDS
- device.write("BOARD.0", "AREA_SPI_DIV", 2, 0x40)
+ device.write("BSP", "AREA_SPI_DIV", 2, 0x40)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 2, 0x41)
+ device.write("BSP", "AREA_SPI_DIV", 2, 0x41)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 2, 0x42)
+ device.write("BSP", "AREA_SPI_DIV", 2, 0x42)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 2, 0x43)
+ device.write("BSP", "AREA_SPI_DIV", 2, 0x43)
time.sleep(0.01)
# Bypass and power down divider logic; route clock directly to output
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x49)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x49)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x4B)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x4B)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x4D)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x4D)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x4F)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x4F)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x51)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x51)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x53)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x53)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x55)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x55)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_DIV", 0x80, 0x57)
+ device.write("BSP", "AREA_SPI_DIV", 0x80, 0x57)
time.sleep(0.01)
# Writing a 1 to this bit updates all registers and transfers all serial control port register buffer contents to
# the control registers on the next rising SCLK edge
- device.write("BOARD.0", "AREA_SPI_DIV", 1, 0x5A)
+ device.write("BSP", "AREA_SPI_DIV", 1, 0x5A)
time.sleep(0.01)
# Check clock frequency (with timeout-like wait)
@@ -354,7 +300,7 @@ def init(device, deviceName) :
time.sleep(0.1)
if i % 10 == 0 :
print('.', end='', flush=True)
- clockFrequency = device.read("BOARD.0", "WORD_CLK_FREQ", 1, 1)
+ clockFrequency = device.read("BSP", "WORD_CLK_FREQ", 1, 1)
if(abs(clockFrequency[0] - application_clock_freq) < 500000) :
print("\nCorrect clock frequency detected: "+str(clockFrequency[0]/1000000)+" MHz")
clockOk=True
@@ -369,87 +315,70 @@ def init(device, deviceName) :
print("Continuing the configuration...")
# Selecting external clock for application part of the firmware
- device.write("BOARD.0", "WORD_CLK_SEL", 1)
+ device.write("BSP", "WORD_CLK_SEL", 1)
time.sleep(0.01)
# reset the board
- device.write("BOARD.0", "WORD_RESET_N", 0)
+ device.write("BSP", "WORD_RESET_N", 0)
time.sleep(0.01)
- device.write("BOARD.0", "WORD_RESET_N", 1)
+ device.write("BSP", "WORD_RESET_N", 1)
time.sleep(0.01)
# program ADCs via SPI
- device.write("BOARD.0", "AREA_SPI_ADC", 0x3C, 0x00)
+ device.write("BSP", "AREA_SPI_ADC", 0x3C, 0x00)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_ADC", 0x41, 0x14)
+ device.write("BSP", "AREA_SPI_ADC", 0x41, 0x14)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_ADC", 0x00, 0x0D)
+ device.write("BSP", "AREA_SPI_ADC", 0x00, 0x0D)
time.sleep(0.01)
- device.write("BOARD.0", "AREA_SPI_ADC", 0x01, 0xFF)
+ device.write("BSP", "AREA_SPI_ADC", 0x01, 0xFF)
time.sleep(0.01)
# reset ADCs after programming clocks
- device.write("BOARD.0", "WORD_ADC_ENA", 0)
+ device.write("BSP", "WORD_ADC_ENA", 0)
time.sleep(0.01)
- device.write("BOARD.0", "WORD_ADC_ENA", 1)
+ device.write("BSP", "WORD_ADC_ENA", 1)
time.sleep(0.01)
# reset the board
- device.write("BOARD.0", "WORD_RESET_N", 0)
+ device.write("BSP", "WORD_RESET_N", 0)
time.sleep(0.01)
- device.write("BOARD.0", "WORD_RESET_N", 1)
+ device.write("BSP", "WORD_RESET_N", 1)
time.sleep(0.01)
# initialise timing registers
- if mapFileRevision < 3017 or ( isMultiCavity and mapFileRevision < 4149 ):
- # Configure trigger lines from x2timer as follows (lines=bits counting from 1):
- # 1: Data clock
- # 2: Data
- # 3: LLRF main trigger
- # 4: DCM (and piezo) pre-trigger
- # All four lines have to be switched to external for proper operation.
- device.write("APP.0", "WORD_TIMING_INT_ENA", int('11110000', 2))
-
- # Choosing the main LLRF and DAQ trigger
- # Choosing third trigger (18R) line as main trigger. Must match the X2timer configuration
- device.write("APP.0", "WORD_TIMING_TRG_SEL", 2) # Choosing third trigger line as main trigger.
- else:
- # Newer FW revisions have a dedicated TIMING.0 module
- # Ch 0-1 are triggers, all have 18R port of the back plane as source
- # Note: channels 2-5 are used for the DCM and configured by the DCM server.
- for channel in range(0, 2):
- if mapFileRevision < 3599 :
- device.write("TIMING.0", "WORD_SOURCE_SEL", 3, channel)
- else :
- device.write("TIMING.0", "WORD_SOURCE_SEL", 4, channel)
- device.write("TIMING.0", "WORD_SYNC_SEL", 0, channel)
- device.write("TIMING.0", "WORD_DIVIDER_VALUE", 0, channel)
- device.write("TIMING.0", "WORD_DELAY_ENABLE", 0, channel)
-
- # Enable all channels
- # Note: channels 2-5 are used for the DCM. They still need to be enabled here to avoid overwriting each other.
- # This could be solved in future with a read-modify-write protected by a file lock.
- device.write("TIMING.0", "WORD_ENABLE", int('11111111', 2))
-
- # Set ch6 for CTABLE strobing (divider value is written by the server)
- device.write("TIMING.0", "WORD_SOURCE_SEL", 0, 6)
+ # Ch 0-1 are triggers, all have 18R port of the back plane as source
+ # Note: channels 2-5 are used for the DCM and configured by the DCM server.
+ for channel in range(0, 2):
+ device.write("TIMING", "WORD_SOURCE_SEL", 4, channel)
+ device.write("TIMING", "WORD_SYNC_SEL", 0, channel)
+ device.write("TIMING", "WORD_DIVIDER_VALUE", 0, channel)
+ device.write("TIMING", "WORD_DELAY_ENABLE", 0, channel)
+
+ # Enable all channels
+ # Note: channels 2-5 are used for the DCM. They still need to be enabled here to avoid overwriting each other.
+ # This could be solved in future with a read-modify-write protected by a file lock.
+ device.write("TIMING", "WORD_ENABLE", int('11111111', 2))
+
+ # Set ch6 for CTABLE strobing (divider value is written by the server)
+ device.write("TIMING", "WORD_SOURCE_SEL", 0, 6)
# Enabling DAC of the Struck Board
- device.write("BOARD.0", "WORD_DAC_ENA", 1)
+ device.write("BSP", "WORD_DAC_ENA", 1)
time.sleep(0.01)
- # Route cavity limiters active indication to MLVDS backplane, so the MPS gets informed
- if mapFileRevision >= 3321 and isMultiCavity:
- device.write("APP.0","WORD_MLVDS_CAV_LIMIT_OE", 0x80)
+ if isMultiCavity :
+ # Route cavity limiters active indication to MLVDS backplane, so the MPS gets informed
+ device.write("APP","WORD_MLVDS_CAV_LIMIT_OE", 0x80)
# write BOOT_STATUS flag to speed up initialisation on next server start
- device.write("BOARD.0", "WORD_BOOT_STATUS", 1)
+ device.write("BSP", "WORD_BOOT_STATUS", 1)
else :
print("Board seems to be configured. Checking the clock frequency...")
- clockFrequency = device.read("BOARD.0", "WORD_CLK_FREQ", 1, 1)
+ clockFrequency = device.read("BSP", "WORD_CLK_FREQ", 1, 1)
if(abs(clockFrequency[0] - application_clock_freq) > 500000) :
print("*****************************************************")
print(" Wrong clock frequency detected: "+str(clockFrequency[0]/1000000)+" MHz")
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initTCK7.py b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initTCK7.py
index a4b4771..5072888 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initTCK7.py
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/initTCK7.py
@@ -25,8 +25,6 @@ enableCryoModules = ${ENABLE_CRYOMODULE_1} + 2*${ENABLE_CRYOMODULE_2}
LLLToroLinkSrc = ${LLL_TORO_LINK_SRC}
-mapFileRevision = ${FIRMWARE_REV_CONTROLLER}
-
${"########################################################################################################################"}
def writeAndDelay(device, modName, regName, val, offset = 0) :
@@ -44,12 +42,12 @@ def error(message) :
${"########################################################################################################################"}
def check_clock(device, devName, moduleName) :
- print("Waiting for " + moduleName +" clock readout from " + devName)
+ print("Waiting for clock readout from " + devName)
# Loop with timeout of 10 seconds to find the correct clock
clockFound = False
for i in range(1,10) :
- reg = device.read(moduleName+".0","WORD_CLK_FREQ")
+ reg = device.read(moduleName+"","WORD_CLK_FREQ")
diff = abs(reg[1] - application_clock_freq)
if diff < 500000 :
# The correct frequency has been found: terminate the loop
@@ -59,31 +57,30 @@ def check_clock(device, devName, moduleName) :
time.sleep(1.0)
# Print clock frequency
- print(devName + " - VM clock frequency: " + "%d" % (reg[1]) + " Hz")
+ print(devName + " - clock frequency: " + "%d" % (reg[1]) + " Hz")
# Check if the clock was found or if we ran into the timeout
if not clockFound :
- writeAndDelay(device, "UVM.0","WORD_BOOT_STATUS", 0)
- writeAndDelay(device, "BOARD.0","WORD_BOOT_STATUS", 0)
- error("Incorrect "+moduleName+" clock frequency detected for device " + devName)
+ writeAndDelay(device, "BSP","WORD_BOOT_STATUS", 0)
+ error("Incorrect clock frequency detected for device " + devName)
${"########################################################################################################################"}
def vm_set_dac_gain(device, devName) :
# set DACs gain (to be sure every time)
- writeAndDelay(device, "UVM.0","WORD_DAC_RESET", 0x00)
- writeAndDelay(device, "UVM.0","AREA_DAC1_SPI", 0x03, 0x0C ) # DAC1I gain MSB
- writeAndDelay(device, "UVM.0","AREA_DAC1_SPI", 0xFF, 0x0B ) # DAC1I gain LSB
- writeAndDelay(device, "UVM.0","AREA_DAC1_SPI", 0x03, 0x10 ) # DAC1Q gain MSB
- writeAndDelay(device, "UVM.0","AREA_DAC1_SPI", 0xFF, 0x0F ) # DAC1Q gain LSB
- writeAndDelay(device, "UVM.0","AREA_DAC2_SPI", 0x03, 0x0C ) # DAC2I gain MSB
- writeAndDelay(device, "UVM.0","AREA_DAC2_SPI", 0xFF, 0x0B ) # DAC2I gain LSB
- writeAndDelay(device, "UVM.0","AREA_DAC2_SPI", 0x03, 0x10 ) # DAC2Q gain MSB
- writeAndDelay(device, "UVM.0","AREA_DAC2_SPI", 0xFF, 0x0f ) # DAC2Q gain LSB
+ writeAndDelay(device, "BSP","WORD_DAC_RESET", 0x00)
+ writeAndDelay(device, "BSP","AREA_DAC1_SPI", 0x03, 0x0C ) # DAC1I gain MSB
+ writeAndDelay(device, "BSP","AREA_DAC1_SPI", 0xFF, 0x0B ) # DAC1I gain LSB
+ writeAndDelay(device, "BSP","AREA_DAC1_SPI", 0x03, 0x10 ) # DAC1Q gain MSB
+ writeAndDelay(device, "BSP","AREA_DAC1_SPI", 0xFF, 0x0F ) # DAC1Q gain LSB
+ writeAndDelay(device, "BSP","AREA_DAC2_SPI", 0x03, 0x0C ) # DAC2I gain MSB
+ writeAndDelay(device, "BSP","AREA_DAC2_SPI", 0xFF, 0x0B ) # DAC2I gain LSB
+ writeAndDelay(device, "BSP","AREA_DAC2_SPI", 0x03, 0x10 ) # DAC2Q gain MSB
+ writeAndDelay(device, "BSP","AREA_DAC2_SPI", 0xFF, 0x0f ) # DAC2Q gain LSB
${"########################################################################################################################"}
-def board_hw_init_vm(device, devName, useBackplane, divideReference) :
+def board_hw_init_vm(device, devName, deviceVM, devNameVM, useBackplane, divideReference) :
divided = "direct 81MHz clock"
if divideReference :
divided = "clock divided from 1.3 GHz reference"
@@ -92,240 +89,211 @@ def board_hw_init_vm(device, devName, useBackplane, divideReference) :
source = "RF backplane"
print("Performing full initialization of VM, " + divided + " from " +source + ", for device " + devName)
- writeAndDelay(device, "BOARD.0", "WORD_CLK_SEL", 0x00)
+ writeAndDelay(device, "BSP", "WORD_CLK_SEL", 0x00)
- writeAndDelay(device, "APP.0", "WORD_RTM_RESET", 0x01)
- writeAndDelay(device, "APP.0", "WORD_RTM_RESET", 0x00)
- writeAndDelay(device, "UVM.0", "WORD_DAC_RESET", 0x03)
+ writeAndDelay(device, "APP", "WORD_RTM_RESET", 0x01)
+ writeAndDelay(device, "APP", "WORD_RTM_RESET", 0x00)
+ writeAndDelay(deviceVM, "BSP", "WORD_DAC_RESET", 0x03)
- device.read("UVM.0", "WORD_CLK_FREQ")
+ deviceVM.read("BSP", "WORD_CLK_FREQ")
- writeAndDelay(device, "APP.0", "WORD_RTM_DIV_RST", 0x01)
- writeAndDelay(device, "APP.0", "WORD_RTM_DIV_RST", 0x00)
+ writeAndDelay(device, "APP", "WORD_RTM_DIV_RST", 0x01)
+ writeAndDelay(device, "APP", "WORD_RTM_DIV_RST", 0x00)
if not useBackplane :
- writeAndDelay(device, "UVM.0", "WORD_EXT_CLK_SEL", 0x00)
- writeAndDelay(device, "UVM.0", "WORD_REF_CLK_SEL", 0x02)
+ writeAndDelay(deviceVM, "BSP", "WORD_EXT_CLK_SEL", 0x00)
+ writeAndDelay(deviceVM, "BSP", "WORD_REF_CLK_SEL", 0x02)
else :
- writeAndDelay(device, "UVM.0", "WORD_EXT_CLK_SEL", 0x01)
- writeAndDelay(device, "UVM.0", "WORD_REF_CLK_SEL", 0x00)
+ writeAndDelay(deviceVM, "BSP", "WORD_EXT_CLK_SEL", 0x01)
+ writeAndDelay(deviceVM, "BSP", "WORD_REF_CLK_SEL", 0x00)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x20, 0x58)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x01, 0x5A)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x20, 0x58)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x01, 0x5A)
- writeAndDelay(device, "APP.0", "WORD_RTM_DIV_RST", 0x01)
- writeAndDelay(device, "APP.0", "WORD_RTM_DIV_RST", 0x00)
+ writeAndDelay(device, "APP", "WORD_RTM_DIV_RST", 0x01)
+ writeAndDelay(device, "APP", "WORD_RTM_DIV_RST", 0x00)
if not divideReference :
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x45)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x45)
else :
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x01, 0x45)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x01, 0x45)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x08, 0x3C)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x08, 0x3D)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x08, 0x3E)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x08, 0x3F)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x08, 0x3C)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x08, 0x3D)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x08, 0x3E)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x08, 0x3F)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x02, 0x40)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x02, 0x41)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x02, 0x42)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x02, 0x43)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x02, 0x40)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x02, 0x41)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x02, 0x42)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x02, 0x43)
if not divideReference :
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x49)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x4B)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x4D)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x4F)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x51)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x53)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x55)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x80, 0x57)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x49)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x4B)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x4D)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x4F)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x51)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x53)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x55)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x80, 0x57)
else :
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x49)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x4B)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x4D)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x4F)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x51)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x53)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x55)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x00, 0x57)
-
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x48)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x4A)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x4C)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x4E)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x50)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x52)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x54)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x77, 0x56)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x49)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x4B)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x4D)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x4F)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x51)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x53)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x55)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x00, 0x57)
+
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x48)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x4A)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x4C)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x4E)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x50)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x52)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x54)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x77, 0x56)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x20, 0x58)
- writeAndDelay(device, "UVM.0", "AREA_DIV_SPI", 0x01, 0x5A)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x20, 0x58)
+ writeAndDelay(deviceVM, "BSP", "AREA_DIV_SPI", 0x01, 0x5A)
# VM: synch all divider outputs so clocks of FPGA and DAC are in phase
- writeAndDelay(device, "UVM.0", 'WORD_DIV_RST_ENA', 1) # enable reset/sync off divider
- writeAndDelay(device, "UVM.0", "WORD_DIV_RST_SEL", 1) # sync
- writeAndDelay(device, "UVM.0", "WORD_DIV_RST_SEL", 0) # disable sync
- writeAndDelay(device, "UVM.0", 'WORD_DIV_RST_ENA', 0) # disable possibility to reset/sync
+ writeAndDelay(deviceVM, "BSP", 'WORD_DIV_RST_ENA', 1) # enable reset/sync off divider
+ writeAndDelay(deviceVM, "BSP", "WORD_DIV_RST_SEL", 1) # sync
+ writeAndDelay(deviceVM, "BSP", "WORD_DIV_RST_SEL", 0) # disable sync
+ writeAndDelay(deviceVM, "BSP", 'WORD_DIV_RST_ENA', 0) # disable possibility to reset/sync
time.sleep(2.1) # minimum wait time before clock readings can possibly make sense after initialisation, since the clock is read only once per second
- check_clock(device, devName, "UVM")
- device.write("UVM.0","WORD_BOOT_STATUS", 0x01)
+ check_clock(device, devName, "BSP")
+ deviceVM.write("BSP","WORD_BOOT_STATUS", 0x01)
${"########################################################################################################################"}
-def board_hw_init_tck7(device, devName) :
+def board_hw_init_tck7(device, devName, deviceVM, devNameVM) :
print("Performing full initialization of TCK7 on " + devName)
- writeAndDelay(device, "BOARD.0","WORD_CLK_SWITCH", 0x03, 0)
- writeAndDelay(device, "BOARD.0","WORD_CLK_SWITCH", 0x03, 1)
- writeAndDelay(device, "BOARD.0","WORD_CLK_SWITCH", 0x03, 2)
- writeAndDelay(device, "BOARD.0","WORD_CLK_SWITCH", 0x03, 3)
+ writeAndDelay(device, "BSP","WORD_CLK_SWITCH", 0x03, 0)
+ writeAndDelay(device, "BSP","WORD_CLK_SWITCH", 0x03, 1)
+ writeAndDelay(device, "BSP","WORD_CLK_SWITCH", 0x03, 2)
+ writeAndDelay(device, "BSP","WORD_CLK_SWITCH", 0x03, 3)
time.sleep(2.1) # minimum wait time before clock readings can possibly make sense after initialisation, since the clock is read only once per second
- check_clock(device, devName, "BOARD")
+ check_clock(device, devName, "BSP")
- writeAndDelay(device, "BOARD.0","WORD_CLK_SEL", 0x01)
+ writeAndDelay(device, "BSP","WORD_CLK_SEL", 0x01)
# timing module settings
- if mapFileRevision >= 4188 :
- writeAndDelay(device, "TIMING.0", "WORD_SOURCE_SEL", [4,4,5,0,0,0,0,0]) # backplane trigger for llrf(18-R) and piezo(18-T), others application clock
- writeAndDelay(device, "TIMING.0", "WORD_ENABLE", 53) # enable trg_llrf, trg_piezo, str_ctrl, str_ctables
- writeAndDelay(device, "TIMING.0", "WORD_SYNC_SEL", [0, 0, 0, 0, 1, 1, 0]) # sync strobes to LLRF trigger
- writeAndDelay(device, "TIMING.0", "WORD_DIVIDER_VALUE", [0, 0, 0, 0, 8, 8, 0]) # 4: controller strobe, 5: table strobe (also set by server!)
- else :
- writeAndDelay(device, "APP.0", "WORD_TIMING_INT_ENA", int('11110000', 2)) # backplane trigger as external
- writeAndDelay(device, "APP.0","WORD_TIMING_TRG_SEL", 2) # trigger line on backplane for llrf trigger from x2timer
- writeAndDelay(device, "APP.0","WORD_TIMING_PRE_TRG_SEL", 3) # trigger line on backplane for piezo trigger from x2timer
+ writeAndDelay(device, "TIMING", "WORD_SOURCE_SEL", [4,4,5,0,0,0,0,0]) # backplane trigger for llrf(18-R) and piezo(18-T), others application clock
+ writeAndDelay(device, "TIMING", "WORD_ENABLE", 53) # enable trg_llrf, trg_piezo, str_ctrl, str_ctables
+ writeAndDelay(device, "TIMING", "WORD_SYNC_SEL", [0, 0, 0, 0, 1, 1, 0]) # sync strobes to LLRF trigger
+ writeAndDelay(device, "TIMING", "WORD_DIVIDER_VALUE", [0, 0, 0, 0, 8, 8, 0]) # 4: controller strobe, 5: table strobe (also set by server!)
- writeAndDelay(device, "PZ16M.0","WORD_TIMING_STR_ENA", 3) # enable strobe for tables and daq on PZ16M module
+ writeAndDelay(device, "PZ16M","WORD_TIMING_STR_ENA", 3) # enable strobe for tables and daq on PZ16M module
# setting LLL package aligners for VS
- if mapFileRevision >= 4188 :
- writeAndDelay(device, "APP.0","WORD_ALIGN_CAV_TIMEOUT_PRE",255);
- writeAndDelay(device, "APP.0","WORD_ALIGN_CAV_TIMEOUT_POST",3);
- writeAndDelay(device, "APP.0","WORD_ALIGN_MS_TIMEOUT_PRE",255);
- writeAndDelay(device, "APP.0","WORD_ALIGN_MS_TIMEOUT_POST",7);
- writeAndDelay(device, "APP.0","WORD_ALIGN_CAV_ENABLE",int('000011',2));
- writeAndDelay(device, "APP.0","WORD_ALIGN_MS_ENABLE",int('11',2));
+ writeAndDelay(device, "APP","WORD_ALIGN_CAV_TIMEOUT_PRE",255);
+ writeAndDelay(device, "APP","WORD_ALIGN_CAV_TIMEOUT_POST",3);
+ writeAndDelay(device, "APP","WORD_ALIGN_MS_TIMEOUT_PRE",255);
+ writeAndDelay(device, "APP","WORD_ALIGN_MS_TIMEOUT_POST",7);
+ writeAndDelay(device, "APP","WORD_ALIGN_CAV_ENABLE",int('000011',2));
+ writeAndDelay(device, "APP","WORD_ALIGN_MS_ENABLE",int('11',2));
- writeAndDelay(device, "BOARD.0","WORD_RESET_N", 0x00)
- writeAndDelay(device, "BOARD.0","WORD_RESET_N", 0x01)
+ writeAndDelay(device, "BSP","WORD_RESET_N", 0x00)
+ writeAndDelay(device, "BSP","WORD_RESET_N", 0x01)
time.sleep(1.0)
- writeAndDelay(device, "UVM.0","WORD_GTP_RESET", 0x01)
- writeAndDelay(device, "UVM.0","WORD_GTP_RESET", 0x00)
- time.sleep(0.1)
+ if deviceVM != None :
+ writeAndDelay(deviceVM, "BSP","WORD_GTP_RESET", 0x01)
+ writeAndDelay(deviceVM, "BSP","WORD_GTP_RESET", 0x00)
+ time.sleep(0.1)
# DAQ module settings
- if mapFileRevision >= 4188 :
- writeAndDelay(device, "DAQ.0","WORD_STROBE_DIV", [8,0,0])
- writeAndDelay(device, "DAQ.0","WORD_SAMPLES", [16384,1984,0])
- writeAndDelay(device, "DAQ.0","WORD_ENABLE", 3)
- else :
- writeAndDelay(device, "APP.0","WORD_DAQ_ENABLE", 3)
+ writeAndDelay(device, "DAQ","WORD_STROBE_DIV", [8,0,0])
+ writeAndDelay(device, "DAQ","WORD_SAMPLES", [16384,1984,0])
+ writeAndDelay(device, "DAQ","WORD_ENABLE", 3)
- writeAndDelay(device, "APP.0","WORD_CRYO_MODULE_ENA", enableCryoModules)
+ writeAndDelay(device, "APP","WORD_CRYO_MODULE_ENA", enableCryoModules)
- writeAndDelay(device, "APP.0","WORD_LLL_TORO_LINK_SRC", LLLToroLinkSrc)
+ writeAndDelay(device, "APP","WORD_LLL_TORO_LINK_SRC", LLLToroLinkSrc)
# Enable MLVDS signal to behave as interlock - 0x80 means only Cavity/KLM signals work as interlock
- writeAndDelay(device, "APP.0","WORD_MLVDS_INTLK_ENA", 0x80)
+ writeAndDelay(device, "APP","WORD_MLVDS_INTLK_ENA", 0x80)
# Enable controller input correction, required for BBF
- writeAndDelay(device, "CTRL.0","BIT_ERR_CORR_ENA", 1)
+ writeAndDelay(device, "CTRL","BIT_ERR_CORR_ENA", 1)
# on master, enable receiving data from slave
if instanceType == ${int(InstanceType.mulcavMaster)} :
- writeAndDelay(device, "APP.0", "WORD_MASTER_MODE", 1)
+ writeAndDelay(device, "APP", "WORD_MASTER_MODE", 1)
else :
- writeAndDelay(device, "APP.0", "WORD_MASTER_MODE", 0)
+ writeAndDelay(device, "APP", "WORD_MASTER_MODE", 0)
- writeAndDelay(device, "BOARD.0","WORD_BOOT_STATUS", 1)
+ writeAndDelay(device, "BSP","WORD_BOOT_STATUS", 1)
${"########################################################################################################################"}
-def init(device, devName) :
+def init() :
+ devName = "CtrlBoard"
+ device = mtca4u.Device(devName)
+ devNameVM = "VmBoard"
+ if instanceType != ${int(InstanceType.mulcavSlave)} and instanceType != ${int(InstanceType.monitoring)} :
+ deviceVM = mtca4u.Device(devNameVM)
+ else :
+ deviceVM = None
+
# Check for broken PCIe communication
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
- reg = device.read("APP.0", "WORD_FIRMWARE")
-% else :
- reg = device.read("APP.0", "WORD_ID")
-% endif
+ reg = device.read("APP", "WORD_ID")
if reg == 0xFFFFFFFF :
error("PCIe communication broken on board " + devName)
# Check for broken communcation with VM
if instanceType != ${int(InstanceType.mulcavSlave)} and instanceType != ${int(InstanceType.monitoring)} :
- reg = device.read("UVM.0","WORD_FIRMWARE")
+ reg = deviceVM.read("BSP","WORD_ID")
if reg == 0xFFFFFFFF :
- error("Communication with VM broken on board " + devName)
-
- # Determine mapfile revision and verify firmware and map file match
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
- mapFileRevisionMask = int("0000FFFF", 16)
- mapFileRevisionA = int(device.read("APP.0", "WORD_REVISION")) & mapFileRevisionMask
- mapFileRevisionB = int(device.read("BOARD.0", "WORD_REVISION")) & mapFileRevisionMask
- mapFileRevision = max(mapFileRevisionA, mapFileRevisionB)
- firmwareRevisionMask = int("FFFF0000", 16)
- firmwareRevisionA = int(device.read("APP.0", "WORD_REVISION")) & firmwareRevisionMask
- firmwareRevisionB = int(device.read("BOARD.0", "WORD_REVISION")) & firmwareRevisionMask
- firmwareRevision = max(firmwareRevisionA, firmwareRevisionB)
-
- mapFileRevisionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
- if mapFileRevisionExpected != str(mapFileRevision) :
- print("\n*****************************************************")
- print(" Error: Firmware and map file do not match.")
- print(" Firmware has map file revision " + str(mapFileRevision))
- print(" Map file has revision " + str(mapFileRevisionExpected))
- print("*****************************************************")
- sys.exit(1)
-
- firmwareVersion = str(firmwareRevision)+" (map:"+str(mapFileRevision)+")"
+ error("Communication with VM broken on board " + devNameVM)
-% else :
- mapFileRevision = 9999
- version = int(device.read("BOARD.0", "WORD_PRJ_VERSION"))
+ # Determine mapfile version and verify firmware and map file match
+ version = int(device.read("BSP", "WORD_PRJ_VERSION"))
commit = version & 0xff
patch = (version & 0xff00) >> 8
minor = (version & 0xff0000) >> 16
major = (version & 0xff000000) >> 24
firmwareVersion = "%02d.%02d.%02d-%02d" % (major,minor,patch,commit)
- mapFileRevisionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
- (majorExpected, minorExpected, patchExpected) = mapFileRevisionExpected.split("-")[0].split(".")
+ mapFileVersionExpected = device.getCatalogueMetadata("MAPFILE_REVISION")
+ (majorExpected, minorExpected, patchExpected) = mapFileVersionExpected.split("-")[0].split(".")
if majorExpected != str(major) or minorExpected != str(minor) :
print("\n*****************************************************")
print(" Error: Firmware and map file do not match.")
- print(" Firmware has version "+firmwareVersion)
- print(" Mapfile hase version " + mapFileRevisionExpected)
+ print(" Firmware has version " + firmwareVersion)
+ print(" Map file has version " + mapFileVersionExpected)
print("*****************************************************")
sys.exit(1)
-% endif
-
print("Firmware version detected: "+firmwareVersion)
# Check if full VM initialisation is necessary (it is if either TCK7 or the VM has been power cycled)
- bootStatus = device.read("BOARD.0","WORD_BOOT_STATUS")
- bootStatusVM = device.read("UVM.0","WORD_BOOT_STATUS")
+ bootStatus = device.read("BSP","WORD_BOOT_STATUS")
if instanceType != ${int(InstanceType.mulcavSlave)} and instanceType != ${int(InstanceType.monitoring)} :
+ bootStatusVM = deviceVM.read("BSP","WORD_BOOT_STATUS")
if bootStatus == 0 or bootStatusVM == 0 :
if hasDirectClock :
- board_hw_init_vm(device, devName, False, False)
+ board_hw_init_vm(device, devName, deviceVM, devNameVM, False, False)
elif hasLOGM :
- board_hw_init_vm(device, devName, False, True)
+ board_hw_init_vm(device, devName, deviceVM, devNameVM, False, True)
elif hasULOG :
- board_hw_init_vm(device, devName, True, True)
+ board_hw_init_vm(device, devName, deviceVM, devNameVM, True, True)
else :
error("Incorrect TCK7-VM clock configuration - no clock source specified for device " + devName)
else :
- check_clock(device, devName, "UVM")
+ check_clock(device, devNameVM, "BSP")
# always set DAC gain on VM
- vm_set_dac_gain(device, devName)
+ vm_set_dac_gain(deviceVM, devNameVM)
if bootStatus == 0 :
- board_hw_init_tck7(device, devName)
+ board_hw_init_tck7(device, devName, deviceVM, devNameVM)
else :
- check_clock(device, devName, "BOARD")
+ check_clock(device, devName, "BSP")
${"########################################################################################################################"}
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_cmtb_1.1.4-0-g04139ff9.mapp b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_cmtb_1.1.4-0-g04139ff9.mapp
new file mode 100644
index 0000000..083c8ec
--- /dev/null
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_cmtb_1.1.4-0-g04139ff9.mapp
@@ -0,0 +1,537 @@
+@MAPFILE_REVISION 1.1.4-0-g04139ff9
+BSP.WORD_ID 1 0 4 0 32 0 0 RO
+BSP.WORD_VERSION 1 4 4 0 32 0 0 RO
+BSP.WORD_PRJ_ID 1 8 4 0 32 0 0 RO
+BSP.WORD_PRJ_VERSION 1 12 4 0 32 0 0 RO
+BSP.WORD_PRJ_SHASUM 1 16 4 0 32 0 0 RO
+BSP.WORD_PRJ_TIMESTAMP 1 20 4 0 32 0 0 RO
+BSP.WORD_USER 1 24 4 0 32 0 0 RW
+BSP.WORD_BOOT_STATUS 1 28 4 0 1 0 0 RW
+BSP.WORD_RESET_N 1 32 4 0 1 0 0 RW
+BSP.WORD_CLK_FREQ 8 36 32 0 32 0 0 RW
+BSP.WORD_CLK_SEL 1 80 4 0 1 0 0 RW
+BSP.WORD_CLK_ERR 1 84 4 0 1 0 0 RO
+BSP.WORD_CLK_MUX 6 88 24 0 2 0 0 RW
+BSP.WORD_CLK_RST 1 128 4 0 1 0 0 RW
+BSP.WORD_CLK_PHASE_INCDEC 1 132 4 0 1 0 0 RW
+BSP.WORD_SPI_DIV_SEL 1 136 4 0 2 0 0 RW
+BSP.WORD_SPI_DIV_BUSY 1 140 4 0 1 0 0 RO
+BSP.AREA_SPI_DIV 128 4096 512 0 8 0 0 RW
+BSP.WORD_LLL_STATUS 6 192 24 0 32 0 0 RW
+BSP.WORD_LLL_LOOPBACK 6 224 24 0 3 0 0 RW
+BSP.WORD_ADC_ENA 1 256 4 0 1 0 0 RW
+BSP.WORD_ADC_OV 1 260 4 0 10 0 0 RO
+BSP.WORD_ADC_FIFO_RESET 1 264 4 0 10 0 0 RW
+BSP.WORD_ADC_FIFO_DELAY 10 320 40 0 8 0 0 RW
+BSP.WORD_ADC_IDELAY_SEL 1 464 4 0 8 0 0 RW
+BSP.WORD_ADC_IDELAY_INC 1 468 4 0 1 0 0 RW
+BSP.WORD_ADC_IDELAY_CNT 5 592 20 0 9 0 0 RO
+BSP.WORD_ADC_REVERT_CLK 1 656 4 0 5 0 0 RW
+BSP.WORD_SPI_ADC_SEL 1 288 4 0 3 0 0 RW
+BSP.WORD_SPI_ADC_BUSY 1 292 4 0 1 0 0 RO
+BSP.AREA_SPI_ADC 256 8192 1024 0 8 0 0 RW
+BSP.WORD_DAC_ENA 1 384 4 0 1 0 0 RW
+BSP.WORD_DAC_IDELAY_INC 1 388 4 0 1 0 0 RW
+BSP.WORD_DAC_IDELAY_CNT 1 392 4 0 9 0 0 RO
+BSP.AREA_BOOT 16384 65536 65536 0 32 0 0 RW
+BSP.WORD_RJ45_IN 1 560 4 0 3 0 0 RO
+BSP.WORD_RJ45_OUT 1 564 4 0 3 0 0 RW
+BSP.WORD_MIG_INIT_DONE 1 568 4 0 1 0 0 RO
+BSP.AREA_DMA 67108864 0 268435456 13 32 0 0 RO
+FCM.AREA_WRITE 1024 65536 4096 0 8 0 0 RW
+FCM.AREA_READ 1024 69632 4096 0 8 0 0 RW
+FCM.WORD_SPI_DIVIDER 1 73728 4 0 16 0 0 RW
+FCM.WORD_BYTES_TO_WRITE 1 73740 4 0 16 0 0 RW
+FCM.WORD_BYTES_TO_READ 1 73744 4 0 16 0 0 RW
+FCM.WORD_CONTROL 1 73748 4 0 8 0 0 RW
+FCM.WORD_TCK 1 73752 4 0 1 0 0 RW
+FCM.WORD_TMS 1 73756 4 0 1 0 0 RW
+FCM.WORD_TDI 1 73760 4 0 1 0 0 RW
+FCM.WORD_TDO 1 73764 4 0 1 0 0 RO
+FCM.WORD_MAGIC 1 73784 4 0 32 0 0 RO
+FCM.WORD_REV_SWITCH 1 73788 4 0 32 0 0 RW
+FCM.WORD_REV_SEL 1 73792 4 0 2 0 0 RW
+FCM.WORD_CRC_ERROR 1 73796 4 0 1 0 0 RO
+FCM.WORD_CRC_ERROR_CNT 1 73800 4 0 32 0 0 RO
+FCM.WORD_ECC_ERROR_CNT 1 73804 4 0 32 0 0 RO
+FCM.WORD_ECC_SYNDROME 1 73824 4 0 13 0 0 RO
+APP.WORD_ID 1 0 4 1 32 0 0 RO
+APP.WORD_VERSION 1 4 4 1 32 0 0 RO
+APP.WORD_USER 1 12 4 1 32 0 0 RW
+APP.WORD_STATUS 1 32 4 1 32 0 0 RO
+APP.WORD_ADC_OV_TIME 10 40 40 1 18 0 0 RO
+APP.WORD_ADC_OV_LATCH 1 104 4 1 10 0 0 RO
+APP.MISC_TIMING 128 2048 512 1 32 0 0 RW
+APP.MISC_DAQ 6144 32768 24576 1 32 0 0 RW
+APP.WORD_SW_TRG 1 144 4 1 1 0 0 RW
+APP.WORD_X2_MACROPULSE_NR 2 440 8 1 32 0 0 RO
+APP.WORD_X2_TIMESTAMP 2 448 8 1 32 0 0 RO
+APP.WORD_MLVDS_I 1 512 4 1 8 0 0 RO
+APP.WORD_MLVDS_O 1 516 4 1 8 0 0 RW
+APP.WORD_MLVDS_OE 1 520 4 1 8 0 0 RW
+APP.WORD_MLVDS_IDELAY_VAL 12 544 48 1 6 0 0 RW
+APP.WORD_MLVDS_TRG_OE 1 592 4 1 8 0 0 RW
+APP.BIT_DAC_MEM_ENA 1 1184 4 1 1 0 0 RW
+APP.WORD_DAC_MEM_MODE 1 1188 4 1 2 0 0 RW
+APP.AREA_DAC_I_MEM 1024 4096 4096 1 16 0 1 RW
+APP.AREA_DAC_Q_MEM 1024 8192 4096 1 16 0 1 RW
+APP.WORD_PROT_PLEVA 1 1200 4 1 18 0 1 RW
+APP.WORD_PROT_PLEVB 1 1204 4 1 18 0 1 RW
+APP.WORD_PROT_PLEVS 1 1208 4 1 18 0 1 RW
+APP.WORD_PROT_T0 1 1212 4 1 18 0 0 RW
+APP.WORD_PROT_T1 1 1216 4 1 18 0 0 RW
+APP.WORD_PROT_FL_ENA 1 1220 4 1 18 0 0 RW
+APP.WORD_PROT_ENA_N 1 1224 4 1 1 0 0 RW
+APP.VAR_C_RTM_TYPE 1024 1044480 4096 1 32 0 0 RW
+APP.EXT_DCM 2097152 8388608 8388608 1 32 0 0 RW
+APP.LLRF_FD 16384 8323072 65536 1 32 0 0 RW
+APP.LLRF_CTRL 16384 8257536 65536 1 32 0 0 RW
+APP.LLRF_OVC 64 8192000 256 1 32 0 0 RW
+APP.LLRF_PREDISTORTER 49152 2097152 196608 1 32 0 0 RW
+APP.LLRF_OUTPUT 64 8194048 256 1 32 0 0 RW
+APP.LLRF_CTABLES 262144 1048576 1048576 1 32 0 0 RW
+APP.LLRF_BBFSC 30 65536 120 1 32 0 0 RW
+APP.WORD_INTERLOCK_LATCHER_ENA 1 1228 4 1 1 0 0 RW
+APP.WORD_INTERLOCK_LATCHER_RESET 1 1232 4 1 1 0 0 RW
+APP.WORD_INTERLOCK_LATCHER_STATUS 1 1236 4 1 4 0 0 RO
+APP.WORD_LATCHED_LIMITERS 1 1240 4 1 8 0 0 RO
+APP.WORD_LLL_TX_HEADER 1 1244 4 1 16 0 0 RW
+APP.WORD_LLL_TX_CNT 1 1252 4 1 16 0 0 RO
+APP.WORD_PIEZO_FOR_SEL 1 1256 4 1 3 0 0 RW
+APP.WORD_PIEZO_PRO_SEL 1 1260 4 1 3 0 0 RW
+APP.WORD_PIEZO_REF_SEL 1 1264 4 1 3 0 0 RW
+APP.ALG_PIEZOFB 16384 8126464 65536 1 32 0 0 RW
+APP.ALG_QLDET 16384 7929856 65536 1 32 0 0 RW
+APP.AREA_PIEZO0 16384 8060928 65536 1 18 0 0 RO
+APP.AREA_PIEZO1 16384 7995392 65536 1 18 0 0 RO
+APP.WORD_REFL_REL_LATCH 1 1268 4 1 1 0 0 RW
+APP.WORD_REFL_LATCH_CNT 1 1272 4 1 8 0 0 RW
+APP.WORD_RF_OFF_TIME 1 1276 4 1 18 0 0 RO
+APP.LLRF_DECA 128 12288 512 1 32 0 0 RW
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF0 131072 0 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ0_BUF0_0 1 0 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_1 1 2 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_2 1 4 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_3 1 6 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_4 1 8 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF0_5 1 10 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF0_6 1 12 2 13 16 8 1 RO
+APP.SEQUENCE_DAQ0_BUF0_7 1 14 2 13 16 8 1 RO
+APP.SEQUENCE_DAQ0_BUF0_8 1 16 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_9 1 18 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_10 1 20 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_11 1 22 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_12 1 24 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_13 1 26 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF0_14 1 28 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF0_15 1 30 2 13 16 0 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF1 131072 1048576 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ0_BUF1_0 1 1048576 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_1 1 1048578 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_2 1 1048580 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_3 1 1048582 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_4 1 1048584 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF1_5 1 1048586 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF1_6 1 1048588 2 13 16 8 1 RO
+APP.SEQUENCE_DAQ0_BUF1_7 1 1048590 2 13 16 8 1 RO
+APP.SEQUENCE_DAQ0_BUF1_8 1 1048592 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_9 1 1048594 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_10 1 1048596 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_11 1 1048598 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_12 1 1048600 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_13 1 1048602 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ0_BUF1_14 1 1048604 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ0_BUF1_15 1 1048606 2 13 16 0 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0 131072 4194304 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ1_BUF0_0 1 4194304 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_1 1 4194306 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_2 1 4194308 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_3 1 4194310 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_4 1 4194312 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_5 1 4194314 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_6 1 4194316 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_7 1 4194318 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_8 1 4194320 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_9 1 4194322 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_10 1 4194324 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_11 1 4194326 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_12 1 4194328 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_13 1 4194330 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_14 1 4194332 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF0_15 1 4194334 2 13 16 -2 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF1 131072 5242880 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ1_BUF1_0 1 5242880 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_1 1 5242882 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_2 1 5242884 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_3 1 5242886 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_4 1 5242888 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_5 1 5242890 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_6 1 5242892 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_7 1 5242894 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_8 1 5242896 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_9 1 5242898 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_10 1 5242900 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_11 1 5242902 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_12 1 5242904 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_13 1 5242906 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_14 1 5242908 2 13 16 -2 1 RO
+APP.SEQUENCE_DAQ1_BUF1_15 1 5242910 2 13 16 -2 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0_RAW 294912 4194304 1179648 13 32 0 0 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_0 1 4194304 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_1 1 4194306 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_2 1 4194308 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_3 1 4194310 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_4 1 4194312 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_5 1 4194314 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_6 1 4194316 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_7 1 4194318 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_8 1 4194320 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_9 1 4194322 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_10 1 4194324 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_11 1 4194326 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_12 1 4194328 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_13 1 4194330 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_14 1 4194332 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF0_RAW_15 1 4194334 2 13 16 0 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF1_RAW 294912 5242880 1179648 13 32 0 0 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_0 1 5242880 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_1 1 5242882 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_2 1 5242884 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_3 1 5242886 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_4 1 5242888 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_5 1 5242890 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_6 1 5242892 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_7 1 5242894 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_8 1 5242896 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_9 1 5242898 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_10 1 5242900 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_11 1 5242902 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_12 1 5242904 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_13 1 5242906 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_14 1 5242908 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ1_BUF1_RAW_15 1 5242910 2 13 16 0 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ2_BUF0 131072 2097152 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ2_BUF0_0 1 2097152 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_1 1 2097154 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_2 1 2097156 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_3 1 2097158 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_4 1 2097160 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_5 1 2097162 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_6 1 2097164 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_7 1 2097166 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_8 1 2097168 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_9 1 2097170 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_10 1 2097172 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_11 1 2097174 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_12 1 2097176 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_13 1 2097178 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_14 1 2097180 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF0_15 1 2097182 2 13 16 0 1 RO
+APP.AREA_MULTIPLEXED_SEQUENCE_DAQ2_BUF1 131072 3145728 524288 13 32 0 0 RO
+APP.SEQUENCE_DAQ2_BUF1_0 1 3145728 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_1 1 3145730 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_2 1 3145732 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_3 1 3145734 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_4 1 3145736 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_5 1 3145738 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_6 1 3145740 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_7 1 3145742 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_8 1 3145744 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_9 1 3145746 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_10 1 3145748 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_11 1 3145750 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_12 1 3145752 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_13 1 3145754 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_14 1 3145756 2 13 16 0 1 RO
+APP.SEQUENCE_DAQ2_BUF1_15 1 3145758 2 13 16 0 1 RO
+TIMING.WORD_ID 1 2048 4 1 32 0 0 RO
+TIMING.WORD_VERSION 1 2052 4 1 32 0 0 RO
+TIMING.WORD_ENABLE 1 2056 4 1 8 0 0 RW
+TIMING.WORD_SOURCE_SEL 8 2080 32 1 8 0 0 RW
+TIMING.WORD_SYNC_SEL 8 2112 32 1 8 0 0 RW
+TIMING.WORD_DIVIDER_VALUE 8 2144 32 1 32 0 0 RW
+TIMING.WORD_TRIGGER_CNT 8 2176 32 1 32 0 0 RO
+TIMING.WORD_EXT_TRIGGER_CNT 8 2208 32 1 32 0 0 RO
+TIMING.WORD_DELAY_ENABLE 8 2240 32 1 1 0 0 RW
+TIMING.WORD_DELAY_VALUE 8 2272 32 1 32 0 0 RW
+TIMING.WORD_MANUAL_TRG 8 2304 32 1 1 0 0 RW
+DAQ.WORD_ID 1 32768 4 1 32 0 0 RO
+DAQ.WORD_VERSION 1 32772 4 1 32 0 0 RO
+DAQ.WORD_ENABLE 1 32776 4 1 3 0 0 RW
+DAQ.WORD_MUX_SEL 3 32784 12 1 8 0 0 RW
+DAQ.WORD_STROBE_DIV 3 32796 12 1 32 0 0 RW
+DAQ.WORD_STROBE_COUNT 3 32808 12 1 32 0 0 RO
+DAQ.WORD_SAMPLES 3 32820 12 1 32 0 0 RW
+DAQ.WORD_DUB_BUF_ENA 3 32832 12 1 1 0 0 RW
+DAQ.WORD_DUB_BUF_CURR 3 32844 12 1 1 0 0 RO
+DAQ.WORD_DUB_BUF_PNUM 3 32856 12 1 32 0 0 RO
+DAQ.WORD_FIFO_STATUS 3 32868 12 1 32 0 0 RO
+DAQ.WORD_SENT_BURST_CNT 3 32880 12 1 32 0 0 RO
+DAQ.WORD_TRG_DELAY_VAL 3 32892 12 1 32 0 0 RW
+DAQ.WORD_TRG_DELAY_ENA 3 32904 12 1 1 0 0 RW
+DAQ.WORD_TRG_CNT_BUF0 3 32916 12 1 16 0 0 RO
+DAQ.WORD_TRG_CNT_BUF1 3 32928 12 1 16 0 0 RO
+DAQ.WORD_TIMESTAMP_RST 3 32940 12 1 1 0 0 RW
+DAQ.AREA_DAQ_TIMES_0 1024 36864 4096 1 32 0 0 RO
+DAQ.AREA_DAQ_TIMES_1 1024 40960 4096 1 32 0 0 RO
+DAQ.AREA_DAQ_TIMES_2 1024 49152 4096 1 32 0 0 RO
+DWC8VM1.WORD_ID 1 1044480 4 1 32 0 0 RO
+DWC8VM1.WORD_VERSION 1 1044484 4 1 32 0 0 RO
+DWC8VM1.WORD_RF_PERMIT 1 1044512 4 1 1 0 0 RW
+DWC8VM1.WORD_ATT_SEL 1 1044516 4 1 9 0 0 RW
+DWC8VM1.WORD_ATT_VAL 1 1044520 4 1 6 0 0 RW
+DWC8VM1.WORD_ATT_STATUS 1 1044528 4 1 1 0 0 RO
+DWC8VM1.WORD_ADC_STATUS 1 1044544 4 1 4 0 0 RO
+DWC8VM1.WORD_ADC_A 1 1044548 4 1 25 0 1 RO
+DWC8VM1.WORD_ADC_B 1 1044552 4 1 25 0 1 RO
+DWC8VM1.WORD_ADC_C 1 1044556 4 1 25 0 1 RO
+DWC8VM1.WORD_ADC_D 1 1044560 4 1 25 0 1 RO
+DWC8VM1.WORD_ADC_RD_ENA 1 1044564 4 1 4 0 0 RW
+DWC8VM1.WORD_DACAB 1 1044576 4 1 12 0 0 RW
+DWC8VM1.WORD_DAC_STATUS 1 1044580 4 1 4 0 0 RO
+DWC8VM1.WORD_DAC 2 1044584 8 1 12 0 0 RW
+DWC8VM1.WORD_HYT271_TEMP 1 1044608 4 1 14 0 0 RO
+DWC8VM1.WORD_HYT271_HUMI 1 1044612 4 1 14 0 0 RO
+DWC8VM1.WORD_HYT271_RD_ENA 1 1044616 4 1 1 0 0 RW
+DWC8VM1.WORD_EXT_INTERLOCK 1 1044620 4 1 1 0 0 RO
+BBFSC.WORD_ID 1 65536 4 1 32 0 0 RO
+BBFSC.WORD_VERSION 1 65540 4 1 32 0 0 RO
+BBFSC.WORD_CAPABILITIES 1 65544 4 1 32 0 0 RO
+BBFSC.WORD_BBFSC_ENA 1 65548 4 1 1 0 0 RW
+BBFSC.WORD_BUNCH_SPACE 1 65552 4 1 8 0 0 RW
+BBFSC.WORD_BAM_THR 1 65556 4 1 18 0 1 RW
+BBFSC.WORD_BAM_SP 1 65560 4 1 18 0 1 RW
+BBFSC.WORD_BAM_KP_I 1 65564 4 1 18 10 1 RW
+BBFSC.WORD_BAM_KP_Q 1 65568 4 1 18 10 1 RW
+BBFSC.WORD_EMU_ENA 1 65572 4 1 1 0 0 RW
+BBFSC.WORD_EMU_TRG 1 65576 4 1 1 0 0 RW
+BBFSC.WORD_EMU_BUNCH_QTY 1 65580 4 1 8 0 0 RW
+BBFSC.WORD_EMU_BUNCH_SPACE 1 65584 4 1 8 0 0 RW
+BBFSC.WORD_EMU_ARRIVAL_TIME_0 1 65588 4 1 18 0 1 RW
+BBFSC.WORD_EMU_ARRIVAL_TIME_1 1 65592 4 1 18 0 1 RW
+BBFSC.WORD_EMU_ARRIVAL_TIME_2 1 65596 4 1 18 0 1 RW
+BBFSC.WORD_EMU_ARRIVAL_TIME_3 1 65600 4 1 18 0 1 RW
+BBFSC.WORD_DBG_ENA 1 65604 4 1 1 0 0 RW
+BBFSC.WORD_DBG_TRG 1 65608 4 1 1 0 0 RW
+BBFSC.WORD_DBG_BUNCH_INDEX 1 65612 4 1 8 0 0 RW
+BBFSC.WORD_ONLINE_BAM_ARRIVAL_TIME 1 65616 4 1 18 0 1 RO
+BBFSC.WORD_ONLINE_SP_CORR_I 1 65620 4 1 18 0 1 RO
+BBFSC.WORD_ONLINE_SP_CORR_Q 1 65624 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_PRE_BAM_ARRIVAL_TIME 1 65628 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_PRE_SP_CORR_I 1 65632 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_PRE_SP_CORR_Q 1 65636 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_POST_BAM_ARRIVAL_TIME 1 65640 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_POST_SP_CORR_I 1 65644 4 1 18 0 1 RO
+BBFSC.WORD_TRIGED_POST_SP_CORR_Q 1 65648 4 1 18 0 1 RO
+BBFSC.WORD_LLL_BAM_CRC_ERR_CNT 1 65652 4 1 16 0 0 RO
+CTABLES.WORD_ID 1 1048576 4 1 32 0 0 RO
+CTABLES.WORD_VERSION 1 1048580 4 1 32 0 0 RO
+CTABLES.WORD_CAPABILITIES 1 1048584 4 1 32 0 0 RO
+CTABLES.BIT_CTL_MODE 1 1048596 4 1 2 0 0 RW
+CTABLES.BIT_CTL_TABLES_BUF 1 1048588 4 1 14 0 0 RW
+CTABLES.BIT_CTL_TABLES_BUF_ACTUAL 1 1048592 4 1 14 0 0 RO
+CTABLES.AREA_FF_I 16384 1114112 65536 1 18 0 1 RW
+CTABLES.AREA_FF_Q 16384 1179648 65536 1 18 0 1 RW
+CTABLES.AREA_FF_CORR_I 16384 1245184 65536 1 18 0 1 RW
+CTABLES.AREA_FF_CORR_Q 16384 1310720 65536 1 18 0 1 RW
+CTABLES.AREA_SP_I 16384 1376256 65536 1 18 0 1 RW
+CTABLES.AREA_SP_Q 16384 1441792 65536 1 18 0 1 RW
+CTABLES.AREA_SP_CORR_I 16384 1507328 65536 1 18 0 1 RW
+CTABLES.AREA_SP_CORR_Q 16384 1572864 65536 1 18 0 1 RW
+CTABLES.AREA_GP_I 16384 1638400 65536 1 18 10 1 RW
+CTABLES.AREA_GP_Q 16384 1703936 65536 1 18 10 1 RW
+CTABLES.AREA_GC_I 1 1769472 4 1 18 0 1 RW
+CTABLES.AREA_GC_Q 1 1835008 4 1 18 0 1 RW
+CTABLES.AREA_GI_I 1 1900544 4 1 18 0 1 RW
+CTABLES.AREA_GI_Q 1 1966080 4 1 18 0 1 RW
+QLDET.WORD_ID 1 7929856 4 1 32 0 0 RO
+QLDET.WORD_VERSION 1 7929860 4 1 32 0 0 RO
+QLDET.WORD_TIMESTAMP 1 7929864 4 1 32 0 0 RO
+QLDET.WORD_QLDET_COEFF_REA 8 7929888 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF_IMA 8 7929920 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF_REB 8 7929952 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF_IMB 8 7929984 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF_IMP 8 7930016 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF_REP 8 7930048 32 1 25 0 1 RW
+QLDET.WORD_QLDET_COEFF 8 7930080 32 1 25 0 1 RW
+QLDET.WORD_QLDET_IIR_IN_A 8 7930112 32 1 25 0 1 RW
+QLDET.WORD_QLDET_IIR_IN_B 8 7930144 32 1 25 0 1 RW
+QLDET.WORD_QLDET_IIR_OUT_A 8 7930176 32 1 25 0 1 RW
+QLDET.WORD_QLDET_IIR_OUT_B 8 7930208 32 1 25 0 1 RW
+QLDET.WORD_QLDET_DT 1 7930240 4 1 32 0 1 RW
+QLDET.WORD_QLDET_DBG_SEL 1 7930272 4 1 6 0 0 RW
+QLDET.AREA_QLDET_HBW_BASE 2048 7938048 8192 1 32 0 1 RW
+QLDET.AREA_QLDET_HBW_DELTA 2048 7946240 8192 1 32 0 1 RW
+QLDET.AREA_QLDET_DET_BASE 2048 7954432 8192 1 32 0 1 RW
+QLDET.AREA_QLDET_DET_DELTA 2048 7962624 8192 1 32 0 1 RW
+PIEZOFB.WORD_ID 1 8126464 4 1 32 0 0 RO
+PIEZOFB.WORD_VERSION 1 8126468 4 1 32 0 0 RO
+PIEZOFB.WORD_TIMESTAMP 1 8126472 4 1 32 0 0 RO
+PIEZOFB.WORD_FB_ENA 1 8126476 4 1 0 0 0 RW
+PIEZOFB.WORD_FB_PGAIN 1 8126480 0 1 25 0 1 RW
+PIEZOFB.WORD_FB_LIMIT 1 8126512 4 1 18 0 1 RW
+PIEZOFB.WORD_FB_IIR_A 3 8126516 12 1 32 0 1 RW
+PIEZOFB.WORD_FB_IIR_B 3 8126532 12 1 32 0 1 RW
+PIEZOFB.WORD_ANC_ENA 1 8126552 4 1 0 0 0 RW
+PIEZOFB.WORD_ANC_LIMIT 1 8126556 4 1 25 0 0 RW
+PIEZOFB.AREA_ANC_MI 1 8126592 0 1 25 0 1 RW
+PIEZOFB.AREA_ANC_PHA 1 8126720 0 1 16 0 0 RW
+PIEZOFB.AREA_ANC_DELAY 1 8126848 0 1 16 0 0 RW
+PIEZOFB.WORD_SOURCE_SEL 1 8127072 4 1 2 0 0 RW
+PIEZOFB.WORD_FB_IGAIN 1 8127076 0 1 25 0 1 RW
+PIEZOFB.WORD_FB_SP 1 8127112 0 1 18 0 1 RW
+PIEZOFB.WORD_DEC_COEFF 1 8127148 4 1 18 0 1 RW
+PIEZOFB.WORD_DEC_SHIFT 1 8127152 4 1 6 0 0 RW
+PIEZOFB.WORD_DEC_ENA 1 8127160 4 1 1 0 0 RW
+PIEZOFB.WORD_TIMING_DIV 1 8127168 4 1 16 0 0 RW
+PIEZOFB.WORD_ANC_IIR_IN_ENA 1 8127172 4 1 1 0 0 RW
+PIEZOFB.WORD_ANC_IIR_IN_A 3 8127176 12 1 32 0 1 RW
+PIEZOFB.WORD_ANC_IIR_IN_B 3 8127192 12 1 32 0 1 RW
+PIEZOFB.WORD_ANC_IIR_OUT_ENA 1 8127208 4 1 1 0 0 RW
+PIEZOFB.WORD_ANC_IIR_OUT_A 3 8127224 12 1 32 0 1 RW
+PIEZOFB.WORD_ANC_IIR_OUT_B 3 8127240 12 1 32 0 1 RW
+PIEZOFB.WORD_FB_LGAIN 1 8127256 0 1 25 0 1 RW
+PIEZOFB.WORD_LFD_FB_ENA 1 8127296 4 1 0 0 1 RW
+OVC.WORD_ID 1 8192000 4 1 32 0 0 RO
+OVC.WORD_VERSION 1 8192004 4 1 32 0 0 RO
+OVC.WORD_STATUS 1 8192012 4 1 3 0 0 RO
+OVC.WORD_ROT_RE 1 8192016 4 1 18 16 1 RW
+OVC.WORD_ROT_IM 1 8192020 4 1 18 16 1 RW
+OVC.WORD_GAIN_CORR 1 8192024 4 1 18 16 1 RW
+OUTPUT.WORD_ID 1 8194048 4 1 32 0 0 RO
+OUTPUT.WORD_VERSION 1 8194052 4 1 32 0 0 RO
+OUTPUT.WORD_CAPABILITIES 1 8194056 4 1 32 0 0 RO
+OUTPUT.WORD_STATUS 1 8194064 4 1 4 0 0 RO
+OUTPUT.WORD_Q_SIGN 1 8194068 4 1 1 0 0 RW
+OUTPUT.WORD_DAC_OFFSET 2 8194080 8 1 18 0 1 RW
+OUTPUT.WORD_AMP_LIMIT 1 8194092 4 1 18 0 0 RW
+OUTPUT.WORD_AMP_LIMIT_ENA 1 8194096 4 1 1 0 0 RW
+OUTPUT.WORD_RF_GATE_MODE 1 8194104 4 1 1 0 0 RW
+OUTPUT.WORD_RF_GATE_STEP 1 8194108 4 1 18 16 1 RW
+CTRL.WORD_ID 1 8257536 4 1 32 0 0 RO
+CTRL.WORD_VERSION 1 8257540 4 1 32 0 0 RO
+CTRL.WORD_CAPABILITIES 1 8257544 4 1 32 0 0 RO
+CTRL.WORD_PROPERTIES 1 8257548 4 1 32 0 0 RO
+CTRL.WORD_STATUS 1 8257552 4 1 32 0 0 RO
+CTRL.WORD_VS_ROT_RE 1 8257556 4 1 18 16 1 RW
+CTRL.WORD_VS_ROT_IM 1 8257560 4 1 18 16 1 RW
+CTRL.BIT_SP_CORR_ENA 1 8257564 4 1 1 0 0 RW
+CTRL.BIT_ERR_CORR_ENA 1 8257568 4 1 1 0 0 RW
+CTRL.BIT_FB_ENA 1 8257572 4 1 1 0 0 RW
+CTRL.BIT_FB_INT_ENA 1 8257576 4 1 1 0 0 RW
+CTRL.BIT_FF_ENA 1 8257580 4 1 1 0 0 RW
+CTRL.BIT_FF_CORR_ENA 1 8257584 4 1 1 0 0 RW
+CTRL.WORD_MIMO_A11 2 8257588 8 1 18 16 1 RW
+CTRL.WORD_MIMO_A12 2 8257596 8 1 18 16 1 RW
+CTRL.WORD_MIMO_A21 2 8257604 8 1 18 16 1 RW
+CTRL.WORD_MIMO_A22 2 8257612 8 1 18 16 1 RW
+CTRL.WORD_MIMO_B11 3 8257620 12 1 18 16 1 RW
+CTRL.WORD_MIMO_B12 3 8257632 12 1 18 16 1 RW
+CTRL.WORD_MIMO_B21 3 8257644 12 1 18 16 1 RW
+CTRL.WORD_MIMO_B22 3 8257656 12 1 18 16 1 RW
+CTRL.WORD_MIMO_ENA 1 8257668 4 1 1 0 0 RW
+CTRL.WORD_MIMO_COEF_VALID 1 8257672 4 1 1 0 0 RW
+CTRL.WORD_CNTRL_I_LIMIT 1 8257676 4 1 18 0 1 RW
+CTRL.WORD_CNTRL_Q_LIMIT 1 8257680 4 1 18 0 1 RW
+CTRL.WORD_SMITH_A11 2 8257684 8 1 18 16 1 RW
+CTRL.WORD_SMITH_A12 2 8257692 8 1 18 16 1 RW
+CTRL.WORD_SMITH_A21 2 8257700 8 1 18 16 1 RW
+CTRL.WORD_SMITH_A22 2 8257708 8 1 18 16 1 RW
+CTRL.WORD_SMITH_B11 3 8257716 12 1 18 16 1 RW
+CTRL.WORD_SMITH_B12 3 8257728 12 1 18 16 1 RW
+CTRL.WORD_SMITH_B21 3 8257740 12 1 18 16 1 RW
+CTRL.WORD_SMITH_B22 3 8257752 12 1 18 16 1 RW
+CTRL.WORD_SMITH_COEF_VALID 1 8257764 4 1 1 0 0 RW
+CTRL.WORD_SMITH_ENA 1 8257768 4 1 1 0 0 RW
+CTRL.WORD_SMITH_DELAY 1 8257772 4 1 18 0 0 RW
+CTRL.WORD_MIMO_O4_A11_MSB 4 8257776 16 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_A11_LSB 4 8257792 16 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_A12_MSB 4 8257808 16 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_A12_LSB 4 8257824 16 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_A21_MSB 4 8257840 16 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_A21_LSB 4 8257856 16 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_A22_MSB 4 8257872 16 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_A22_LSB 4 8257888 16 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_B11_MSB 5 8257904 20 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_B11_LSB 5 8257924 20 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_B12_MSB 5 8257944 20 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_B12_LSB 5 8257964 20 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_B21_MSB 5 8257984 20 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_B21_LSB 5 8258004 20 1 32 0 0 RW
+CTRL.WORD_MIMO_O4_B22_MSB 5 8258024 20 1 3 0 0 RW
+CTRL.WORD_MIMO_O4_B22_LSB 5 8258044 20 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_A11_MSB 4 8258064 16 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_A11_LSB 4 8258080 16 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_A12_MSB 4 8258096 16 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_A12_LSB 4 8258112 16 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_A21_MSB 4 8258128 16 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_A21_LSB 4 8258144 16 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_A22_MSB 4 8258160 16 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_A22_LSB 4 8258176 16 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_B11_MSB 5 8258192 20 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_B11_LSB 5 8258212 20 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_B12_MSB 5 8258232 20 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_B12_LSB 5 8258252 20 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_B21_MSB 5 8258272 20 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_B21_LSB 5 8258292 20 1 32 0 0 RW
+CTRL.WORD_SMITH_O4_B22_MSB 5 8258312 20 1 3 0 0 RW
+CTRL.WORD_SMITH_O4_B22_LSB 5 8258332 20 1 32 0 0 RW
+FD.WORD_ID 1 8323072 4 1 32 0 0 RO
+FD.WORD_VERSION 1 8323084 4 1 32 0 0 RO
+FD.WORD_IQ_COS 24 8325120 96 1 18 16 1 RW
+FD.WORD_IQ_SIN 24 8327168 96 1 18 16 1 RW
+FD.WORD_IQ_SYNC_MODE 1 8323200 4 1 1 0 0 RW
+FD.WORD_DEC_FACTOR 8 8323760 32 1 16 0 0 RW
+FD.WORD_DEC_PARAM_EN 1 8323800 4 1 8 0 0 RW
+FD.WORD_DEC_MODE 1 8323804 4 1 8 0 0 RW
+FD.WORD_IIR_COEF0 5 8331264 20 1 25 16 1 RW
+FD.WORD_IIR_COEF1 5 8331296 20 1 25 16 1 RW
+FD.WORD_IIR_COEF2 5 8331328 20 1 25 16 1 RW
+FD.WORD_IIR_COEF3 5 8331360 20 1 25 16 1 RW
+FD.WORD_IIR_COEF4 5 8331392 20 1 25 16 1 RW
+FD.WORD_IIR_COEF5 5 8331424 20 1 25 16 1 RW
+FD.WORD_IIR_COEF6 5 8331456 20 1 25 16 1 RW
+FD.WORD_IIR_COEF7 5 8331488 20 1 25 16 1 RW
+FD.WORD_IIR_COEF8 5 8331520 20 1 25 16 1 RW
+FD.WORD_IIR_COEF9 5 8331552 20 1 25 16 1 RW
+FD.WORD_IIR_COEF_VALID 1 8331584 4 1 1 0 0 RW
+FD.WORD_ROT_CH_ENA 1 8323580 4 1 8 0 0 RW
+FD.WORD_VS_SHIFT 1 8323584 4 1 3 0 0 RW
+FD.WORD_VS_CH_ENA 1 8323588 4 1 8 0 0 RW
+FD.WORD_AMP_LIMIT 8 8323596 32 1 18 0 1 RW
+FD.WORD_AMP_LIMIT_ACTIVE 1 8323592 4 1 8 0 0 RO
+FD.WORD_AMP_LIMIT_DISABLE 1 8323680 4 1 8 0 0 RW
+FD.WORD_AMP_LIMIT_PRE 8 8323640 32 1 18 0 1 RW
+FD.WORD_AMP_LIMIT_PRE_ACTIVE 1 8323636 4 1 8 0 0 RO
+FD.WORD_AMP_LIMIT_TRG 8 8323684 32 1 18 0 1 RW
+FD.WORD_AMP_LIMIT_TRG_ACTIVE 1 8323724 4 1 8 0 0 RO
+FD.WORD_AMP_LIMIT_TRG_DISABLE 1 8323728 4 1 8 0 0 RW
+DCM.WORD_ID 1 8388608 4 1 32 0 0 RO
+DCM.WORD_VERSION 1 8388612 4 1 32 0 0 RO
+DCM.WORD_DCM_AVG_AMP 1 8388616 4 1 18 0 1 RO
+DCM.WORD_DCM_AVG_CNT 1 8388620 4 1 16 0 0 RO
+DCM.WORD_DCM_AMP_SCA 10 8388624 40 1 18 0 1 RW
+DCM.WORD_DCM_PHASE_OFS 10 8388664 40 1 18 0 1 RW
+DCM.WORD_DCM_IQ_AVG_POINTS 1 8388704 4 1 4 0 0 RW
+DCM.WORD_DCM_A0 10 8388708 40 1 18 0 1 RO
+DCM.WORD_DCM_P0 10 8388748 40 1 18 0 1 RO
+DCM.WORD_DCM_DIV_A0 10 8388788 40 1 18 0 1 RO
+DCM.WORD_DCM_MUL_A0 10 8388828 40 1 18 0 1 RO
+DCM.WORD_DCM_ROT_RE 10 8388868 40 1 18 0 1 RO
+DCM.WORD_DCM_ROT_IM 10 8388908 40 1 18 0 1 RO
+DCM.WORD_DCM_LIMIT_A 10 8388948 40 1 16 0 0 RW
+DCM.WORD_DCM_LIMIT_P 10 8388988 40 1 18 0 1 RW
+DCM.WORD_DCM_LIMIT_A_ST 1 8389028 4 1 10 0 0 RO
+DCM.WORD_DCM_LIMIT_P_ST 1 8389032 4 1 10 0 0 RO
+DCM.WORD_DCM_RX_ERR_CNT 1 8389088 4 1 8 0 0 RO
+DCM.WORD_LLL_II_ERR_CNT 1 8389092 4 1 8 0 0 RO
+DCM.APP_TMCB_DCM2 1048576 12582912 4194304 1 32 0 0 RW
+PREDISTORTER.WORD_ID 1 2097152 4 1 32 0 0 RO
+PREDISTORTER.WORD_VERSION 1 2097156 4 1 32 0 0 RO
+PREDISTORTER.WORD_CAPABILITIES 2 2097160 8 1 32 0 0 RO
+PREDISTORTER.BIT_PREDISTORTER_ENA 1 2097184 4 1 1 0 0 RW
+PREDISTORTER.WORD_PREDISTORTER_A2 1 2097188 4 1 25 0 1 RO
+PREDISTORTER.WORD_PREDISTORTER_RE 1 2097192 4 1 25 15 1 RO
+PREDISTORTER.WORD_PREDISTORTER_IM 1 2097196 4 1 25 15 1 RO
+PREDISTORTER.WORD_PREDISTORTER_MEM_SEL 1 2097200 4 1 6 0 0 RW
+PREDISTORTER.AREA_PREDISTORTER_MEM 1024 2101248 4096 1 25 0 1 RW
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_regae_1.0.0-10-g0842dba5.mapp b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_regae_1.0.0-10-g0842dba5.mapp
deleted file mode 100644
index 128a273..0000000
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrf_scav_sis8300ku_regae_1.0.0-10-g0842dba5.mapp
+++ /dev/null
@@ -1,535 +0,0 @@
-@MAPFILE_REVISION 1.0.0-10-g0842dba5
-BOARD.0.WORD_ID 1 0 4 0 32 0 0 RO
-BOARD.0.WORD_VERSION 1 4 4 0 32 0 0 RO
-BOARD.0.WORD_PRJ_ID 1 8 4 0 32 0 0 RO
-BOARD.0.WORD_PRJ_VERSION 1 12 4 0 32 0 0 RO
-BOARD.0.WORD_PRJ_SHASUM 1 16 4 0 32 0 0 RO
-BOARD.0.WORD_PRJ_TIMESTAMP 1 20 4 0 32 0 0 RO
-BOARD.0.WORD_USER 1 24 4 0 32 0 0 RW
-BOARD.0.WORD_BOOT_STATUS 1 28 4 0 1 0 0 RW
-BOARD.0.WORD_RESET_N 1 32 4 0 1 0 0 RW
-BOARD.0.WORD_CLK_FREQ 8 36 32 0 32 0 0 RW
-BOARD.0.WORD_CLK_SEL 1 80 4 0 1 0 0 RW
-BOARD.0.WORD_CLK_ERR 1 84 4 0 1 0 0 RO
-BOARD.0.WORD_CLK_MUX 6 88 24 0 2 0 0 RW
-BOARD.0.WORD_CLK_RST 1 128 4 0 1 0 0 RW
-BOARD.0.WORD_CLK_PHASE_INCDEC 1 132 4 0 1 0 0 RW
-BOARD.0.WORD_SPI_DIV_SEL 1 136 4 0 2 0 0 RW
-BOARD.0.WORD_SPI_DIV_BUSY 1 140 4 0 1 0 0 RO
-BOARD.0.AREA_SPI_DIV 128 4096 512 0 8 0 0 RW
-BOARD.0.WORD_LLL_STATUS 6 192 24 0 32 0 0 RW
-BOARD.0.WORD_LLL_LOOPBACK 6 224 24 0 3 0 0 RW
-BOARD.0.WORD_ADC_ENA 1 256 4 0 1 0 0 RW
-BOARD.0.WORD_ADC_OV 1 260 4 0 10 0 0 RO
-BOARD.0.WORD_ADC_FIFO_RESET 1 264 4 0 10 0 0 RW
-BOARD.0.WORD_ADC_FIFO_DELAY 10 320 40 0 8 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_SEL 1 464 4 0 8 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_INC 1 468 4 0 1 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_CNT 5 592 20 0 9 0 0 RO
-BOARD.0.WORD_ADC_REVERT_CLK 1 656 4 0 5 0 0 RW
-BOARD.0.WORD_SPI_ADC_SEL 1 288 4 0 3 0 0 RW
-BOARD.0.WORD_SPI_ADC_BUSY 1 292 4 0 1 0 0 RO
-BOARD.0.AREA_SPI_ADC 256 8192 1024 0 8 0 0 RW
-BOARD.0.WORD_DAC_ENA 1 384 4 0 1 0 0 RW
-BOARD.0.WORD_DAC_IDELAY_INC 1 388 4 0 1 0 0 RW
-BOARD.0.WORD_DAC_IDELAY_CNT 1 392 4 0 9 0 0 RO
-BOARD.0.AREA_BOOT 16384 65536 65536 0 32 0 0 RW
-BOARD.0.WORD_RJ45_IN 1 560 4 0 3 0 0 RO
-BOARD.0.WORD_RJ45_OUT 1 564 4 0 3 0 0 RW
-BOARD.0.WORD_MIG_INIT_DONE 1 568 4 0 1 0 0 RO
-BOARD.0.AREA_DMA 67108864 0 268435456 13 32 0 0 RO
-FCM.AREA_WRITE 1024 65536 4096 0 8 0 0 RW
-FCM.AREA_READ 1024 69632 4096 0 8 0 0 RW
-FCM.WORD_SPI_DIVIDER 1 73728 4 0 16 0 0 RW
-FCM.WORD_BYTES_TO_WRITE 1 73740 4 0 16 0 0 RW
-FCM.WORD_BYTES_TO_READ 1 73744 4 0 16 0 0 RW
-FCM.WORD_CONTROL 1 73748 4 0 8 0 0 RW
-FCM.WORD_TCK 1 73752 4 0 1 0 0 RW
-FCM.WORD_TMS 1 73756 4 0 1 0 0 RW
-FCM.WORD_TDI 1 73760 4 0 1 0 0 RW
-FCM.WORD_TDO 1 73764 4 0 1 0 0 RO
-FCM.WORD_MAGIC 1 73784 4 0 32 0 0 RO
-FCM.WORD_REV_SWITCH 1 73788 4 0 32 0 0 RW
-FCM.WORD_REV_SEL 1 73792 4 0 2 0 0 RW
-FCM.WORD_CRC_ERROR 1 73796 4 0 1 0 0 RO
-FCM.WORD_CRC_ERROR_CNT 1 73800 4 0 32 0 0 RO
-FCM.WORD_ECC_ERROR_CNT 1 73804 4 0 32 0 0 RO
-FCM.WORD_ECC_SYNDROME 1 73824 4 0 13 0 0 RO
-APP.0.WORD_ID 1 0 4 1 32 0 0 RO
-APP.0.WORD_VERSION 1 4 4 1 32 0 0 RO
-APP.0.WORD_USER 1 12 4 1 32 0 0 RW
-APP.0.WORD_STATUS 1 32 4 1 32 0 0 RO
-APP.0.WORD_ADC_OV_TIME 10 40 40 1 18 0 0 RO
-APP.0.WORD_ADC_OV_LATCH 1 104 4 1 10 0 0 RO
-APP.0.MISC_TIMING 128 2048 512 1 32 0 0 RW
-APP.0.MISC_DAQ 6144 32768 24576 1 32 0 0 RW
-APP.0.WORD_SW_TRG 1 144 4 1 1 0 0 RW
-APP.0.WORD_X2_MACROPULSE_NR 2 440 8 1 32 0 0 RO
-APP.0.WORD_X2_TIMESTAMP 2 448 8 1 32 0 0 RO
-APP.0.WORD_MLVDS_I 1 512 4 1 8 0 0 RO
-APP.0.WORD_MLVDS_O 1 516 4 1 8 0 0 RW
-APP.0.WORD_MLVDS_OE 1 520 4 1 8 0 0 RW
-APP.0.WORD_MLVDS_IDELAY_VAL 12 544 48 1 6 0 0 RW
-APP.0.WORD_MLVDS_TRG_OE 1 592 4 1 8 0 0 RW
-APP.0.BIT_DAC_MEM_ENA 1 1184 4 1 1 0 0 RW
-APP.0.WORD_DAC_MEM_MODE 1 1188 4 1 2 0 0 RW
-APP.0.AREA_DAC_I_MEM 1024 4096 4096 1 16 0 1 RW
-APP.0.AREA_DAC_Q_MEM 1024 8192 4096 1 16 0 1 RW
-APP.0.WORD_PROT_PLEVA 1 1200 4 1 18 0 1 RW
-APP.0.WORD_PROT_PLEVB 1 1204 4 1 18 0 1 RW
-APP.0.WORD_PROT_PLEVS 1 1208 4 1 18 0 1 RW
-APP.0.WORD_PROT_T0 1 1212 4 1 18 0 0 RW
-APP.0.WORD_PROT_T1 1 1216 4 1 18 0 0 RW
-APP.0.WORD_PROT_FL_ENA 1 1220 4 1 18 0 0 RW
-APP.0.WORD_PROT_ENA_N 1 1224 4 1 1 0 0 RW
-APP.0.VAR_C_RTM_TYPE 1024 1044480 4096 1 32 0 0 RW
-APP.0.EXT_DCM 2097152 8388608 8388608 1 32 0 0 RW
-APP.0.LLRF_FD 16384 8323072 65536 1 32 0 0 RW
-APP.0.LLRF_CTRL 16384 8257536 65536 1 32 0 0 RW
-APP.0.LLRF_OVC 64 8192000 256 1 32 0 0 RW
-APP.0.LLRF_PREDISTORTER 49152 8388608 196608 1 32 0 0 RW
-APP.0.LLRF_OUTPUT 64 8194048 256 1 32 0 0 RW
-APP.0.LLRF_CTABLES 262144 1048576 1048576 1 32 0 0 RW
-APP.0.LLRF_BBFSC 30 65536 120 1 32 0 0 RW
-APP.0.WORD_INTERLOCK_LATCHER_ENA 1 1228 4 1 1 0 0 RW
-APP.0.WORD_INTERLOCK_LATCHER_RESET 1 1232 4 1 1 0 0 RW
-APP.0.WORD_INTERLOCK_LATCHER_STATUS 1 1236 4 1 4 0 0 RO
-APP.0.WORD_LATCHED_LIMITERS 1 1240 4 1 8 0 0 RO
-APP.0.WORD_LLL_TX_HEADER 1 1244 4 1 16 0 0 RW
-APP.0.WORD_LLL_TX_CNT 1 1252 4 1 16 0 0 RO
-APP.0.WORD_PIEZO_FOR_SEL 1 1256 4 1 3 0 0 RW
-APP.0.WORD_PIEZO_PRO_SEL 1 1260 4 1 3 0 0 RW
-APP.0.WORD_PIEZO_REF_SEL 1 1264 4 1 3 0 0 RW
-APP.0.ALG_PIEZOFB 16384 8126464 65536 1 32 0 0 RW
-APP.0.ALG_QLDET 16384 7929856 65536 1 32 0 0 RW
-APP.0.AREA_PIEZO0 16384 8060928 65536 1 18 0 0 RO
-APP.0.AREA_PIEZO1 16384 7995392 65536 1 18 0 0 RO
-APP.0.WORD_REFL_REL_LATCH 1 1268 4 1 1 0 0 RW
-APP.0.WORD_REFL_LATCH_CNT 1 1272 4 1 8 0 0 RW
-APP.0.WORD_RF_OFF_TIME 1 1276 4 1 18 0 0 RO
-APP.0.LLRF_DECA 128 1280 512 1 32 0 0 RW
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF0 16384 0 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ0_BUF0_0 1 0 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_1 1 2 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_2 1 4 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_3 1 6 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_4 1 8 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_5 1 10 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_6 1 12 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_7 1 14 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_8 1 16 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_9 1 18 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_10 1 20 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_11 1 22 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_12 1 24 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_13 1 26 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_14 1 28 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_15 1 30 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF1 16384 1048576 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ0_BUF1_0 1 1048576 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_1 1 1048578 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_2 1 1048580 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_3 1 1048582 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_4 1 1048584 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_5 1 1048586 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_6 1 1048588 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_7 1 1048590 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_8 1 1048592 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_9 1 1048594 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_10 1 1048596 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_11 1 1048598 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_12 1 1048600 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_13 1 1048602 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_14 1 1048604 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_15 1 1048606 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0 16384 4194304 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF0_0 1 4194304 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_1 1 4194306 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_2 1 4194308 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_3 1 4194310 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_4 1 4194312 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_5 1 4194314 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_6 1 4194316 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_7 1 4194318 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_8 1 4194320 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_9 1 4194322 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_10 1 4194324 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_11 1 4194326 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_12 1 4194328 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_13 1 4194330 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_14 1 4194332 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_15 1 4194334 2 13 16 -2 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF1 16384 5242880 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF1_0 1 5242880 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_1 1 5242882 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_2 1 5242884 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_3 1 5242886 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_4 1 5242888 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_5 1 5242890 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_6 1 5242892 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_7 1 5242894 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_8 1 5242896 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_9 1 5242898 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_10 1 5242900 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_11 1 5242902 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_12 1 5242904 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_13 1 5242906 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_14 1 5242908 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_15 1 5242910 2 13 16 -2 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0_RAW 147456 4194304 589824 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_0 1 4194304 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_1 1 4194306 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_2 1 4194308 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_3 1 4194310 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_4 1 4194312 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_5 1 4194314 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_6 1 4194316 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_7 1 4194318 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_8 1 4194320 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_9 1 4194322 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_10 1 4194324 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_11 1 4194326 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_12 1 4194328 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_13 1 4194330 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_14 1 4194332 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_15 1 4194334 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF1_RAW 147456 5242880 589824 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_0 1 5242880 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_1 1 5242882 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_2 1 5242884 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_3 1 5242886 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_4 1 5242888 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_5 1 5242890 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_6 1 5242892 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_7 1 5242894 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_8 1 5242896 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_9 1 5242898 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_10 1 5242900 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_11 1 5242902 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_12 1 5242904 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_13 1 5242906 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_14 1 5242908 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_RAW_15 1 5242910 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ2_BUF0 16384 2097152 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ2_BUF0_0 1 2097152 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_1 1 2097154 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_2 1 2097156 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_3 1 2097158 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_4 1 2097160 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_5 1 2097162 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_6 1 2097164 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_7 1 2097166 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_8 1 2097168 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_9 1 2097170 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_10 1 2097172 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_11 1 2097174 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_12 1 2097176 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_13 1 2097178 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_14 1 2097180 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF0_15 1 2097182 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ2_BUF1 16384 3145728 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ2_BUF1_0 1 3145728 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_1 1 3145730 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_2 1 3145732 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_3 1 3145734 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_4 1 3145736 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_5 1 3145738 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_6 1 3145740 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_7 1 3145742 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_8 1 3145744 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_9 1 3145746 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_10 1 3145748 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_11 1 3145750 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_12 1 3145752 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_13 1 3145754 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_14 1 3145756 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ2_BUF1_15 1 3145758 2 13 16 0 1 RO
-TIMING.0.WORD_ID 1 2048 4 1 32 0 0 RO
-TIMING.0.WORD_VERSION 1 2052 4 1 32 0 0 RO
-TIMING.0.WORD_ENABLE 1 2056 4 1 8 0 0 RW
-TIMING.0.WORD_SOURCE_SEL 8 2080 32 1 8 0 0 RW
-TIMING.0.WORD_SYNC_SEL 8 2112 32 1 8 0 0 RW
-TIMING.0.WORD_DIVIDER_VALUE 8 2144 32 1 32 0 0 RW
-TIMING.0.WORD_TRIGGER_CNT 8 2176 32 1 32 0 0 RO
-TIMING.0.WORD_EXT_TRIGGER_CNT 8 2208 32 1 32 0 0 RO
-TIMING.0.WORD_DELAY_ENABLE 8 2240 32 1 1 0 0 RW
-TIMING.0.WORD_DELAY_VALUE 8 2272 32 1 32 0 0 RW
-TIMING.0.WORD_MANUAL_TRG 8 2304 32 1 1 0 0 RW
-DAQ.0.WORD_ID 1 32768 4 1 32 0 0 RO
-DAQ.0.WORD_VERSION 1 32772 4 1 32 0 0 RO
-DAQ.0.WORD_ENABLE 1 32776 4 1 3 0 0 RW
-DAQ.0.WORD_MUX_SEL 3 32784 12 1 8 0 0 RW
-DAQ.0.WORD_STROBE_DIV 3 32796 12 1 32 0 0 RW
-DAQ.0.WORD_STROBE_COUNT 3 32808 12 1 32 0 0 RO
-DAQ.0.WORD_SAMPLES 3 32820 12 1 32 0 0 RW
-DAQ.0.WORD_DUB_BUF_ENA 3 32832 12 1 1 0 0 RW
-DAQ.0.WORD_DUB_BUF_CURR 3 32844 12 1 1 0 0 RO
-DAQ.0.WORD_DUB_BUF_PNUM 3 32856 12 1 32 0 0 RO
-DAQ.0.WORD_FIFO_STATUS 3 32868 12 1 32 0 0 RO
-DAQ.0.WORD_SENT_BURST_CNT 3 32880 12 1 32 0 0 RO
-DAQ.0.WORD_TRG_DELAY_VAL 3 32892 12 1 32 0 0 RW
-DAQ.0.WORD_TRG_DELAY_ENA 3 32904 12 1 1 0 0 RW
-DAQ.0.WORD_TRG_CNT_BUF0 3 32916 12 1 16 0 0 RO
-DAQ.0.WORD_TRG_CNT_BUF1 3 32928 12 1 16 0 0 RO
-DAQ.0.WORD_TIMESTAMP_RST 3 32940 12 1 1 0 0 RW
-DAQ.0.AREA_DAQ_TIMES_0 1024 36864 4096 1 32 0 0 RO
-DAQ.0.AREA_DAQ_TIMES_1 1024 40960 4096 1 32 0 0 RO
-DAQ.0.AREA_DAQ_TIMES_2 1024 49152 4096 1 32 0 0 RO
-DWC8VM1.0.WORD_ID 1 1044480 4 1 32 0 0 RO
-DWC8VM1.0.WORD_VERSION 1 1044484 4 1 32 0 0 RO
-DWC8VM1.0.WORD_RF_PERMIT 1 1044512 4 1 1 0 0 RW
-DWC8VM1.0.WORD_ATT_SEL 1 1044516 4 1 10 0 0 RW
-DWC8VM1.0.WORD_ATT_VAL 1 1044520 4 1 6 0 0 RW
-DWC8VM1.0.WORD_ATT_STATUS 1 1044524 4 1 1 0 0 RO
-DWC8VM1.0.WORD_ADC_STATUS 1 1044544 4 1 4 0 0 RO
-DWC8VM1.0.WORD_ADC_A 1 1044548 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_B 1 1044552 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_C 1 1044556 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_D 1 1044560 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_RD_ENA 1 1044564 4 1 4 0 0 RW
-DWC8VM1.0.WORD_DACAB 1 1044576 4 1 12 0 0 RW
-DWC8VM1.0.WORD_DAC_STATUS 1 1044580 4 1 4 0 0 RO
-DWC8VM1.0.WORD_DAC 2 1044584 8 1 12 0 0 RW
-DWC8VM1.0.WORD_HYT271_TEMP 1 1044608 4 1 14 0 0 RO
-DWC8VM1.0.WORD_HYT271_HUMI 1 1044612 4 1 14 0 0 RO
-DWC8VM1.0.WORD_HYT271_RD_ENA 1 1044616 4 1 1 0 0 RW
-DWC8VM1.0.WORD_EXT_INTERLOCK 1 1044620 4 1 1 0 0 RO
-BBFSC.0.WORD_ID 1 65536 4 1 32 0 0 RO
-BBFSC.0.WORD_VERSION 1 65540 4 1 32 0 0 RO
-BBFSC.0.WORD_CAPABILITIES 1 65544 4 1 32 0 0 RO
-BBFSC.0.WORD_BBFSC_ENA 1 65548 4 1 1 0 0 RW
-BBFSC.0.WORD_BUNCH_SPACE 1 65552 4 1 8 0 0 RW
-BBFSC.0.WORD_BAM_THR 1 65556 4 1 18 0 1 RW
-BBFSC.0.WORD_BAM_SP 1 65560 4 1 18 0 1 RW
-BBFSC.0.WORD_BAM_KP_I 1 65564 4 1 18 10 1 RW
-BBFSC.0.WORD_BAM_KP_Q 1 65568 4 1 18 10 1 RW
-BBFSC.0.WORD_EMU_ENA 1 65572 4 1 1 0 0 RW
-BBFSC.0.WORD_EMU_TRG 1 65576 4 1 1 0 0 RW
-BBFSC.0.WORD_EMU_BUNCH_QTY 1 65580 4 1 8 0 0 RW
-BBFSC.0.WORD_EMU_BUNCH_SPACE 1 65584 4 1 8 0 0 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_0 1 65588 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_1 1 65592 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_2 1 65596 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_3 1 65600 4 1 18 0 1 RW
-BBFSC.0.WORD_DBG_ENA 1 65604 4 1 1 0 0 RW
-BBFSC.0.WORD_DBG_TRG 1 65608 4 1 1 0 0 RW
-BBFSC.0.WORD_DBG_BUNCH_INDEX 1 65612 4 1 8 0 0 RW
-BBFSC.0.WORD_ONLINE_BAM_ARRIVAL_TIME 1 65616 4 1 18 0 1 RO
-BBFSC.0.WORD_ONLINE_SP_CORR_I 1 65620 4 1 18 0 1 RO
-BBFSC.0.WORD_ONLINE_SP_CORR_Q 1 65624 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_BAM_ARRIVAL_TIME 1 65628 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_SP_CORR_I 1 65632 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_SP_CORR_Q 1 65636 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_BAM_ARRIVAL_TIME 1 65640 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_SP_CORR_I 1 65644 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_SP_CORR_Q 1 65648 4 1 18 0 1 RO
-BBFSC.0.WORD_LLL_BAM_CRC_ERR_CNT 1 65652 4 1 16 0 0 RO
-CTABLES.0.WORD_ID 1 1048576 4 1 32 0 0 RO
-CTABLES.0.WORD_VERSION 1 1048580 4 1 32 0 0 RO
-CTABLES.0.WORD_CAPABILITIES 1 1048584 4 1 32 0 0 RO
-CTABLES.0.BIT_CTL_TABLES_BUF 1 1048588 4 1 14 0 0 RW
-CTABLES.0.AREA_FF_I 2048 1056768 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_Q 2048 1064960 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_CORR_I 2048 1073152 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_CORR_Q 2048 1081344 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_I 2048 1089536 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_Q 2048 1097728 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_CORR_I 2048 1105920 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_CORR_Q 2048 1114112 8192 1 18 0 1 RW
-CTABLES.0.AREA_GP_I 2048 1122304 8192 1 18 10 1 RW
-CTABLES.0.AREA_GP_Q 2048 1130496 8192 1 18 10 1 RW
-CTABLES.0.AREA_GC_I 1 1138688 4 1 18 0 1 RW
-CTABLES.0.AREA_GC_Q 1 1146880 4 1 18 0 1 RW
-CTABLES.0.AREA_GI_I 1 1155072 4 1 18 0 1 RW
-CTABLES.0.AREA_GI_Q 1 1163264 4 1 18 0 1 RW
-QLDET.0.WORD_ID 1 7929856 4 1 32 0 0 RO
-QLDET.0.WORD_VERSION 1 7929860 4 1 32 0 0 RO
-QLDET.0.WORD_TIMESTAMP 1 7929864 4 1 32 0 0 RO
-QLDET.0.WORD_QLDET_COEFF_REA 8 7929888 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMA 8 7929920 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_REB 8 7929952 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMB 8 7929984 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMP 8 7930016 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_REP 8 7930048 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF 8 7930080 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_IN_A 8 7930112 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_IN_B 8 7930144 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_OUT_A 8 7930176 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_OUT_B 8 7930208 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_DT 1 7930240 4 1 32 0 1 RW
-QLDET.0.WORD_QLDET_DBG_SEL 1 7930272 4 1 6 0 0 RW
-QLDET.0.AREA_QLDET_HBW_BASE 2048 7938048 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_HBW_DELTA 2048 7946240 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_DET_BASE 2048 7954432 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_DET_DELTA 2048 7962624 8192 1 32 0 1 RW
-PIEZOFB.0.WORD_ID 1 8126464 4 1 32 0 0 RO
-PIEZOFB.0.WORD_VERSION 1 8126468 4 1 32 0 0 RO
-PIEZOFB.0.WORD_TIMESTAMP 1 8126472 4 1 32 0 0 RO
-PIEZOFB.0.WORD_FB_ENA 1 8126476 4 1 0 0 0 RW
-PIEZOFB.0.WORD_FB_PGAIN 1 8126480 0 1 25 0 1 RW
-PIEZOFB.0.WORD_FB_LIMIT 1 8126512 4 1 18 0 1 RW
-PIEZOFB.0.WORD_FB_IIR_A 3 8126516 12 1 32 0 1 RW
-PIEZOFB.0.WORD_FB_IIR_B 3 8126532 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_ENA 1 8126552 4 1 0 0 0 RW
-PIEZOFB.0.WORD_ANC_LIMIT 1 8126556 4 1 25 0 0 RW
-PIEZOFB.0.AREA_ANC_MI 1 8126592 0 1 25 0 1 RW
-PIEZOFB.0.AREA_ANC_PHA 1 8126720 0 1 16 0 0 RW
-PIEZOFB.0.AREA_ANC_DELAY 1 8126848 0 1 16 0 0 RW
-PIEZOFB.0.WORD_SOURCE_SEL 1 8127072 4 1 2 0 0 RW
-PIEZOFB.0.WORD_FB_IGAIN 1 8127076 0 1 25 0 1 RW
-PIEZOFB.0.WORD_FB_SP 1 8127112 0 1 18 0 1 RW
-PIEZOFB.0.WORD_DEC_COEFF 1 8127148 4 1 18 0 1 RW
-PIEZOFB.0.WORD_DEC_SHIFT 1 8127152 4 1 6 0 0 RW
-PIEZOFB.0.WORD_DEC_ENA 1 8127160 4 1 1 0 0 RW
-PIEZOFB.0.WORD_TIMING_DIV 1 8127168 4 1 16 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_ENA 1 8127172 4 1 1 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_A 3 8127176 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_B 3 8127192 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_ENA 1 8127208 4 1 1 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_A 3 8127224 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_B 3 8127240 12 1 32 0 1 RW
-PIEZOFB.0.WORD_FB_LGAIN 1 8127256 0 1 25 0 1 RW
-PIEZOFB.0.WORD_LFD_FB_ENA 1 8127296 4 1 0 0 1 RW
-OVC.0.WORD_ID 1 8192000 4 1 32 0 0 RO
-OVC.0.WORD_VERSION 1 8192004 4 1 32 0 0 RO
-OVC.0.WORD_STATUS 1 8192012 4 1 2 0 0 RO
-OVC.0.WORD_ROT_RE 1 8192016 4 1 18 16 1 RW
-OVC.0.WORD_ROT_IM 1 8192020 4 1 18 16 1 RW
-OVC.0.WORD_GAIN_CORR 1 8192024 4 1 18 16 1 RW
-OUTPUT.0.WORD_ID 1 8194048 4 1 32 0 0 RO
-OUTPUT.0.WORD_VERSION 1 8194052 4 1 32 0 0 RO
-OUTPUT.0.WORD_CAPABILITIES 1 8194056 4 1 32 0 0 RO
-OUTPUT.0.WORD_STATUS 1 8194064 4 1 4 0 0 RO
-OUTPUT.0.WORD_Q_SIGN 1 8194068 4 1 1 0 0 RW
-OUTPUT.0.WORD_DAC_OFFSET 2 8194080 8 1 18 0 1 RW
-OUTPUT.0.WORD_AMP_LIMIT 1 8194092 4 1 18 0 0 RW
-OUTPUT.0.WORD_AMP_LIMIT_ENA 1 8194096 4 1 1 0 0 RW
-OUTPUT.0.WORD_RF_GATE_MODE 1 8194104 4 1 1 0 0 RW
-OUTPUT.0.WORD_RF_GATE_STEP 1 8194108 4 1 18 16 1 RW
-CTRL.0.WORD_ID 1 8257536 4 1 32 0 0 RO
-CTRL.0.WORD_VERSION 1 8257540 4 1 32 0 0 RO
-CTRL.0.WORD_CAPABILITIES 1 8257544 4 1 32 0 0 RO
-CTRL.0.WORD_PROPERTIES 1 8257548 4 1 32 0 0 RO
-CTRL.0.WORD_STATUS 1 8257552 4 1 32 0 0 RO
-CTRL.0.WORD_VS_ROT_RE 1 8257556 4 1 18 16 1 RW
-CTRL.0.WORD_VS_ROT_IM 1 8257560 4 1 18 16 1 RW
-CTRL.0.BIT_SP_CORR_ENA 1 8257564 4 1 1 0 0 RW
-CTRL.0.BIT_ERR_CORR_ENA 1 8257568 4 1 1 0 0 RW
-CTRL.0.BIT_FB_ENA 1 8257572 4 1 1 0 0 RW
-CTRL.0.BIT_FB_INT_ENA 1 8257576 4 1 1 0 0 RW
-CTRL.0.BIT_FF_ENA 1 8257580 4 1 1 0 0 RW
-CTRL.0.BIT_FF_CORR_ENA 1 8257584 4 1 1 0 0 RW
-CTRL.0.WORD_MIMO_A11 2 8257588 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A12 2 8257596 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A21 2 8257604 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A22 2 8257612 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B11 3 8257620 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B12 3 8257632 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B21 3 8257644 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B22 3 8257656 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_ENA 1 8257668 4 1 1 0 0 RW
-CTRL.0.WORD_MIMO_COEF_VALID 1 8257672 4 1 1 0 0 RW
-CTRL.0.WORD_CNTRL_I_LIMIT 1 8257676 4 1 18 0 1 RW
-CTRL.0.WORD_CNTRL_Q_LIMIT 1 8257680 4 1 18 0 1 RW
-CTRL.0.WORD_SMITH_A11 2 8257684 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A12 2 8257692 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A21 2 8257700 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A22 2 8257708 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B11 3 8257716 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B12 3 8257728 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B21 3 8257740 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B22 3 8257752 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_COEF_VALID 1 8257764 4 1 1 0 0 RW
-CTRL.0.WORD_SMITH_ENA 1 8257768 4 1 1 0 0 RW
-CTRL.0.WORD_SMITH_DELAY 1 8257772 4 1 18 0 0 RW
-CTRL.0.WORD_MIMO_O4_A11_MSB 4 8257776 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A11_LSB 4 8257792 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A12_MSB 4 8257808 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A12_LSB 4 8257824 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A21_MSB 4 8257840 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A21_LSB 4 8257856 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A22_MSB 4 8257872 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A22_LSB 4 8257888 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B11_MSB 5 8257904 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B11_LSB 5 8257924 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B12_MSB 5 8257944 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B12_LSB 5 8257964 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B21_MSB 5 8257984 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B21_LSB 5 8258004 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B22_MSB 5 8258024 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B22_LSB 5 8258044 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A11_MSB 4 8258064 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A11_LSB 4 8258080 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A12_MSB 4 8258096 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A12_LSB 4 8258112 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A21_MSB 4 8258128 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A21_LSB 4 8258144 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A22_MSB 4 8258160 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A22_LSB 4 8258176 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B11_MSB 5 8258192 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B11_LSB 5 8258212 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B12_MSB 5 8258232 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B12_LSB 5 8258252 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B21_MSB 5 8258272 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B21_LSB 5 8258292 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B22_MSB 5 8258312 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B22_LSB 5 8258332 20 1 32 0 0 RW
-FD.0.WORD_ID 1 8323072 4 1 32 0 0 RO
-FD.0.WORD_VERSION 1 8323084 4 1 32 0 0 RO
-FD.0.WORD_IQ_COS 40 8325120 160 1 18 16 1 RW
-FD.0.WORD_IQ_SIN 40 8327168 160 1 18 16 1 RW
-FD.0.WORD_IQ_SYNC_MODE 1 8323200 4 1 1 0 0 RW
-FD.0.WORD_DEC_FACTOR 8 8323760 32 1 16 0 0 RW
-FD.0.WORD_DEC_PARAM_EN 1 8323800 4 1 8 0 0 RW
-FD.0.WORD_DEC_MODE 1 8323804 4 1 8 0 0 RW
-FD.0.WORD_IIR_COEF0 5 8331264 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF1 5 8331296 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF2 5 8331328 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF3 5 8331360 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF4 5 8331392 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF5 5 8331424 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF6 5 8331456 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF7 5 8331488 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF8 5 8331520 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF9 5 8331552 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF_VALID 1 8331584 4 1 1 0 0 RW
-FD.0.WORD_ROT_CH_ENA 1 8323580 4 1 8 0 0 RW
-FD.0.WORD_VS_SHIFT 1 8323584 4 1 3 0 0 RW
-FD.0.WORD_VS_CH_ENA 1 8323588 4 1 8 0 0 RW
-FD.0.WORD_AMP_LIMIT 8 8323596 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_ACTIVE 1 8323592 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_DISABLE 1 8323680 4 1 8 0 0 RW
-FD.0.WORD_AMP_LIMIT_PRE 8 8323640 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_PRE_ACTIVE 1 8323636 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_TRG 8 8323684 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_TRG_ACTIVE 1 8323724 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_TRG_DISABLE 1 8323728 4 1 8 0 0 RW
-DCM.0.WORD_ID 1 8388608 4 1 32 0 0 RO
-DCM.0.WORD_VERSION 1 8388612 4 1 32 0 0 RO
-DCM.0.WORD_DCM_AVG_AMP 1 8388616 4 1 18 0 1 RO
-DCM.0.WORD_DCM_AVG_CNT 1 8388620 4 1 16 0 0 RO
-DCM.0.WORD_DCM_AMP_SCA 10 8388624 40 1 18 0 1 RW
-DCM.0.WORD_DCM_PHASE_OFS 10 8388664 40 1 18 0 1 RW
-DCM.0.WORD_DCM_IQ_AVG_POINTS 1 8388704 4 1 4 0 0 RW
-DCM.0.WORD_DCM_A0 10 8388708 40 1 18 0 1 RO
-DCM.0.WORD_DCM_P0 10 8388748 40 1 18 0 1 RO
-DCM.0.WORD_DCM_DIV_A0 10 8388788 40 1 18 0 1 RO
-DCM.0.WORD_DCM_MUL_A0 10 8388828 40 1 18 0 1 RO
-DCM.0.WORD_DCM_ROT_RE 10 8388868 40 1 18 0 1 RO
-DCM.0.WORD_DCM_ROT_IM 10 8388908 40 1 18 0 1 RO
-DCM.0.WORD_DCM_LIMIT_A 10 8388948 40 1 16 0 0 RW
-DCM.0.WORD_DCM_LIMIT_P 10 8388988 40 1 18 0 1 RW
-DCM.0.WORD_DCM_LIMIT_A_ST 1 8389028 4 1 10 0 0 RO
-DCM.0.WORD_DCM_LIMIT_P_ST 1 8389032 4 1 10 0 0 RO
-DCM.0.WORD_DCM_RX_ERR_CNT 1 8389088 4 1 8 0 0 RO
-DCM.0.WORD_LLL_II_ERR_CNT 1 8389092 4 1 8 0 0 RO
-DCM.0.APP_TMCB_DCM2 1048576 12582912 4194304 1 32 0 0 RW
-PREDISTORTER.0.WORD_ID 1 9437184 4 1 32 0 0 RO
-PREDISTORTER.0.WORD_VERSION 1 9437188 4 1 32 0 0 RO
-PREDISTORTER.0.WORD_CAPABILITIES 2 9437192 8 1 32 0 0 RO
-PREDISTORTER.0.BIT_PREDISTORTER_ENA 1 9437216 4 1 1 0 0 RW
-PREDISTORTER.0.WORD_PREDISTORTER_A2 1 9437220 4 1 25 0 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_RE 1 9437224 4 1 25 15 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_IM 1 9437228 4 1 25 15 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL 1 9437232 4 1 6 0 0 RW
-PREDISTORTER.0.AREA_PREDISTORTER_MEM 1024 9441280 4096 1 25 0 1 RW
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl.dmap b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl.dmap
index fc36e79..ff33c7e 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl.dmap
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl.dmap
@@ -1,11 +1,9 @@
##mako
x2timer (doocs:${TIMING_LOCATION}?cacheFile=timer.cache)
Timer (logicalNameMap?map=timer.xlmap)
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
-CtrlBoard (pci:pcieunis${CTRLBOARD_SLOT}?map=./${FIRMWARE_PROJECT_CONTROLLER}_${FIRMWARE_TYPE_CONTROLLER}_r${FIRMWARE_REV_CONTROLLER}.mapp)
-% else :
-# Hack for new gitlab firmware builds in effect!
-CtrlBoard (pci:pcieunis${CTRLBOARD_SLOT}?map=./${FIRMWARE_PROJECT_CONTROLLER}_${FIRMWARE_TYPE_CONTROLLER}_${FIRMWARE_REV_CONTROLLER}.mapp)
+CtrlBoard (pci:pcieunis${CTRLBOARD_SLOT}?map=./${FIRMWARE_PROJECT_CONTROLLER}_${FIRMWARE_VER_CONTROLLER}.mapp)
+% if INSTANCE_TYPE == InstanceType.mulcavStandAlone or INSTANCE_TYPE == InstanceType.mulcavMaster :
+VmBoard (subdevice?type=area&device=CtrlBoard&area=VM.BOARD_UVM&map=./llrf_mcav_vm_vm2xf_${FIRMWARE_VER_UVM}.mapp)
% endif
Controller (logicalNameMap?map=llrfctrl_controller.xlmap)
% if INSTANCE_TYPE == InstanceType.mulcavMaster :
@@ -14,11 +12,6 @@ Slave (logicalNameMap?map=slave.xlmap)
Master (logicalNameMap?map=master.xlmap)
% endif
% for BOARD in ADCBOARD.keys() :
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
-AdcBoard${BOARD} (${ADCBOARD[BOARD]["BACKEND"]}:pcieunis${ADCBOARD[BOARD]["SLOT"]}?map=./${ADCBOARD[BOARD]["FIRMWARE_PROJECT"]}_${ADCBOARD[BOARD]["FIRMWARE_TYPE"]}_r${ADCBOARD[BOARD]["FIRMWARE_REV"]}.mapp)
-% else :
-# Hack for new gitlab firmware builds in effect!
-AdcBoard${BOARD} (${ADCBOARD[BOARD]["BACKEND"]}:pcieunis${ADCBOARD[BOARD]["SLOT"]}?map=./${ADCBOARD[BOARD]["FIRMWARE_PROJECT"]}_${ADCBOARD[BOARD]["FIRMWARE_TYPE"]}_${ADCBOARD[BOARD]["FIRMWARE_REV"]}.mapp)
-% endif
+AdcBoard${BOARD} (${ADCBOARD[BOARD]["BACKEND"]}:pcieunis${ADCBOARD[BOARD]["SLOT"]}?map=./${ADCBOARD[BOARD]["FIRMWARE_PROJECT"]}_${ADCBOARD[BOARD]["FIRMWARE_VER"]}.mapp)
Adc${BOARD} (logicalNameMap?map=llrfctrl_${ADCBOARD[BOARD]["XLMAP_TYPE"]}.xlmap&target=AdcBoard${BOARD}&lPhaseDaq=${ADCBOARD[BOARD]["AMPL_PHASE_DAQ"]}&rawDaq=${ADCBOARD[BOARD]["RAW_DAQ"]}&rtmType=${ADCBOARD[BOARD]['RTM_TYPE']})
% endfor
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_adc.xlmap b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_adc.xlmap
index 8990885..57466b2 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_adc.xlmap
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_adc.xlmap
@@ -1,13 +1,9 @@
##mako
<%page args="**kwargs"/>
<%
- fwRev = INTERFACE_REV_ADC
- fwType = INTERFACE_TYPE_ADC
if "sincavFirmware" in kwargs :
if INSTANCE_TYPE != InstanceType.sincav :
raise OmitFileException
- fwRev = INTERFACE_REV_CONTROLLER
- fwType = INTERFACE_TYPE_CONTROLLER
sincavFirmware = kwargs["sincavFirmware"]
else :
sincavFirmware = False
@@ -21,139 +17,164 @@
%>\
<logicalNameMap>
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
<module name="ToControlSystem">
+
<module name="Configuration">
+
<variable name="samplingFrequencyAdc">
<type>float64</type>
<value>0</value>
</variable>
+
<variable name="bitScalingLengthScaled">
<type>float64</type>
<value>0</value>
</variable>
+
<redirectedRegister name="vectorSumBitShift">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_VS_SHIFT</targetRegister>
+ <targetRegister>FD.WORD_VS_SHIFT</targetRegister>
</redirectedRegister>
+
% if sincavFirmware :
-%% The fw revision for this switch was 3076 before, but for the HZB firmware at least 3017 already has the new names.
-%% This applies to all switchs with that revision.
-% if int(fwRev) < 3017 :
- <redirectedRegister name="pulseLength">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_DAQ_SAMPLES</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
-% else :
<redirectedRegister name="pulseLength">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0/WORD_SAMPLES</targetRegister>
+ <targetRegister>DAQ.WORD_SAMPLES</targetRegister>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>1</numberOfElements>
</redirectedRegister>
% endif
-% endif
- </module>
- </module>
+
+ </module> <!-- Configuration -->
+
+ </module> <!-- ToControlSystem -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
<module name="Adc">
+
+ <!--
+ ################################################################################################################
+ -->
+
% for c in range(0,nChannels) :
<module name="Channel${c}">
+
<redirectedBit name="vectorSumInclude">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_VS_CH_ENA</targetRegister>
+ <targetRegister>FD.WORD_VS_CH_ENA</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
-% if provideLimiterEnable == 0 :
+
+ <redirectedRegister name="prelimiter">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_AMP_LIMIT_PRE</targetRegister>
+ <targetStartIndex>${c}</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ <plugin name="math">
+ <parameter name="formula">x*bitScalingLengthScaled</parameter>
+ <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
+ <parameter name="enable_push_parameters"/>
+ </plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="limiter">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_AMP_LIMIT</targetRegister>
+ <targetStartIndex>${c}</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ <plugin name="math">
+ <parameter name="formula">x*bitScalingLengthScaled</parameter>
+ <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
+ <parameter name="enable_push_parameters"/>
+ </plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="triggerLimiter">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_AMP_LIMIT_TRG</targetRegister>
+ <targetStartIndex>${c}</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ <plugin name="math">
+ <parameter name="formula">x*bitScalingLengthScaled</parameter>
+ <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
+ <parameter name="enable_push_parameters"/>
+ </plugin>
+ </redirectedRegister>
+
<redirectedBit name="limiterDisable">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_DISABLE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_DISABLE</targetRegister>
<targetBit>${c}</targetBit>
+% if provideLimiterEnable :
+ <plugin name="forceReadOnly"/>
+% endif
</redirectedBit>
+
<redirectedBit name="triggerLimiterDisable">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG_DISABLE</targetRegister>
- <targetBit>${c}</targetBit>
- </redirectedBit>
-% else:
- <redirectedBit name="limiterDisable">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_DISABLE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_TRG_DISABLE</targetRegister>
<targetBit>${c}</targetBit>
+% if provideLimiterEnable :
<plugin name="forceReadOnly"/>
+% endif
</redirectedBit>
+
+% if provideLimiterEnable :
+
<redirectedBit name="limiterEnable">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_DISABLE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_DISABLE</targetRegister>
<targetBit>${c}</targetBit>
<plugin name="math"><parameter name="formula">not(x)</parameter></plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedBit>
- <redirectedBit name="triggerLimiterDisable">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG_DISABLE</targetRegister>
- <targetBit>${c}</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
+
<redirectedBit name="triggerLimiterEnable">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG_DISABLE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_TRG_DISABLE</targetRegister>
<targetBit>${c}</targetBit>
<plugin name="math"><parameter name="formula">not(x)</parameter></plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedBit>
-% endif
+
+% endif # provideLimiterEnable
+
<redirectedBit name="prelimiterActive">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_PRE_ACTIVE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_PRE_ACTIVE</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
+
<redirectedBit name="limiterActive">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_ACTIVE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_ACTIVE</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
+
<redirectedBit name="triggerLimiterActive">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG_ACTIVE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_TRG_ACTIVE</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
- </module>
-% endfor
-% if sincavFirmware :
- <module name="RawChannel8">
- <redirectedChannel name="raw">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>9</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- </module>
- <module name="RawChannel9">
- <redirectedChannel name="raw">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>8</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- </module>
-% endif
-
-% for c in range(0, nChannels) :
-% if not sincavFirmware or int(fwRev) >= 2437 :
- <module name="Channel${c}">
<redirectedBit name="adcOverflow">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0.WORD_ADC_OV_LATCH</targetRegister>
+ <targetRegister>APP.WORD_ADC_OV_LATCH</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
+
<redirectedRegister name="adcOverflowTime">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0.WORD_ADC_OV_TIME</targetRegister>
+ <targetRegister>APP.WORD_ADC_OV_TIME</targetRegister>
<targetStartIndex>${c}</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="math">
@@ -161,122 +182,230 @@
<parameter name="samplingFreqAdc">/ToControlSystem/Configuration/samplingFrequencyAdc</parameter>
</plugin>
</redirectedRegister>
- </module>
-% else :
- <module name="Channel${c}">
- <redirectedBit name="adcOverflow">
+
+ <redirectedRegister name="attenuation">
+ <targetDevice>(subdevice?type=3regs&dataDelay=1000&device=<par>target</par>&address=<par>rtmType</par>.WORD_ATT_SEL&data=<par>rtmType</par>.WORD_ATT_VAL&status=<par>rtmType</par>.WORD_ATT_STATUS&map=attenuators.map)</targetDevice>
+ <targetRegister>CHANNEL${c}</targetRegister>
+ <plugin name="math"><parameter name="formula">63 - 2*x</parameter></plugin>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+
+ <module name="Calibration">
+
+ <redirectedRegister name="sineTable">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_IQ_SIN</targetRegister>
+ <targetStartIndex>${c*nSinCosTableSize}</targetStartIndex>
+ <numberOfElements>${nSinCosTableSize}</numberOfElements>
+ </redirectedRegister>
+
+ <redirectedRegister name="cosineTable">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_IQ_COS</targetRegister>
+ <targetStartIndex>${c*nSinCosTableSize}</targetStartIndex>
+ <numberOfElements>${nSinCosTableSize}</numberOfElements>
+ </redirectedRegister>
+
+ </module> <!-- Calibration -->
+
+ <module name="Filter">
+
+ <redirectedRegister name="coefficientsValid">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_IIR_COEF_VALID</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="coefficients">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>FD.WORD_IIR_COEF${c}</targetRegister>
+ </redirectedRegister>
+
+ </module> <!-- Filter -->
+
+ <redirectedRegister name="adcFifoDelay">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_ADC_OV</targetRegister>
+ <targetRegister>BSP.WORD_ADC_FIFO_DELAY</targetRegister>
+ <targetStartIndex>${c}</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ </redirectedRegister>
+
+ <redirectedBit name="adcFifoReset">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>BSP.WORD_ADC_FIFO_RESET</targetRegister>
<targetBit>${c}</targetBit>
</redirectedBit>
- </module>
-% endif
-% endfor
+
+ <module name="AUTOTUNE">
+ <variable name="INHIBIT">
+ <type>int32</type>
+ <value>0</value>
+ </variable>
+ <variable name="PIEZO_INHIBIT">
+ <type>int32</type>
+ <value>0</value>
+ </variable>
+ <variable name="SENSITIVITY">
+ <type>float32</type>
+ <value>0</value>
+ </variable>
+ <variable name="SP">
+ <type>float32</type>
+ <value>0</value>
+ </variable>
+ <variable name="PIEZO_SENSITIVITY">
+ <type>float32</type>
+ <value>0</value>
+ </variable>
+ <variable name="DEADSTEPS">
+ <type>int32</type>
+ <value>0</value>
+ </variable>
+ </module> <!-- AUTOTUNE -->
+
+ <variable name="CAV_OUT_OF_OPERATION">
+ <type>int32</type>
+ <value>0</value>
+ </variable>
+
+ </module> <!-- Channel${c} -->
+% endfor <!-- Channels -->
+
+ <!--
+ ################################################################################################################
+ -->
+
+% if sincavFirmware :
+
+ <module name="RawChannel8">
+
+ <redirectedChannel name="raw">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>9</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+
+ </module> <!-- RawChannel8 -->
+
+ <module name="RawChannel9">
+
+ <redirectedChannel name="raw">
+ <targetDevice><par>target</par></targetDevice>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>8</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+
+ </module> <!-- RawChannel9 -->
+
+% endif <!-- sincavFirmware -->
+
+ <!--
+ ################################################################################################################
+ -->
% if not sincavFirmware :
<module name="DownConverter">
+
<redirectedRegister name="temperature">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DWC10/0/WORD_ADC_TEMP</targetRegister>
+ <targetRegister>DWC10.WORD_ADC_TEMP</targetRegister>
<plugin name="math">
<parameter name="formula"> (x*3.3*(2^-24) - 1.28)/0.005
</parameter>
</plugin>
</redirectedRegister>
+
<redirectedRegister name="loPower">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DWC10/0/WORD_ADC_LO</targetRegister>
+ <targetRegister>DWC10.WORD_ADC_LO</targetRegister>
<plugin name="math">
<parameter name="formula"> (x*3.3*(2^-24) - 3.0044)/0.0519
</parameter>
</plugin>
</redirectedRegister>
- </module>
-% else :
-% if int(fwRev) >= 3321 :
+
+ </module> <!-- DownConverter -->
+% endif
+
+ <!--
+ ################################################################################################################
+ -->
+
<module name="FirmwareSEUDetection">
<redirectedRegister name="unrecoverableErrorDetectedRaw">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
<targetStartIndex>2065</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="forceReadOnly"/>
</redirectedRegister>
+
<redirectedRegister name="crcErrorSinceFpgaBoot">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
<targetStartIndex>2066</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="forceReadOnly"/>
</redirectedRegister>
+
<redirectedRegister name="eccFixedFramesSinceFpgaBoot">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
<targetStartIndex>2067</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="forceReadOnly"/>
</redirectedRegister>
- </module>
-
-% endif
-% endif
-% if int(fwRev) < 3017 or ( not sincavFirmware and int(fwRev) < 4149 ) :
- <module name="Configuration">
- <redirectedBit name="BOARD_CONFIG_PRIMARY_DAQ_EN">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0.WORD_DAQ_ENABLE</targetRegister>
- <targetBit>0</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="BOARD_CONFIG_SECONDARY_DAQ_EN">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0.WORD_DAQ_ENABLE</targetRegister>
- <targetBit>1</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedRegister name="BOARD_TIMING_TRG_SEL">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_TIMING_TRG_SEL</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
-% else :
+ </module> <!-- FirmwareSEUDetection -->
+
+ <!--
+ ################################################################################################################
+ -->
+
<module name="Configuration">
+
<redirectedBit name="BOARD_CONFIG_PRIMARY_DAQ_EN">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0.WORD_ENABLE</targetRegister>
+ <targetRegister>DAQ.WORD_ENABLE</targetRegister>
<targetBit>0</targetBit>
<plugin name="forceReadOnly"/>
</redirectedBit>
+
<redirectedBit name="BOARD_CONFIG_SECONDARY_DAQ_EN">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0.WORD_ENABLE</targetRegister>
+ <targetRegister>DAQ.WORD_ENABLE</targetRegister>
<targetBit>1</targetBit>
<plugin name="forceReadOnly"/>
</redirectedBit>
+
<redirectedRegister name="BOARD_TIMING_TRG_SEL">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>TIMING.0/WORD_SOURCE_SEL</targetRegister>
+ <targetRegister>TIMING.WORD_SOURCE_SEL</targetRegister>
<plugin name="forceReadOnly"/>
</redirectedRegister>
-% endif
+
<redirectedRegister name="BOARD_RESET">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_RESET_N</targetRegister>
+ <targetRegister>BSP.WORD_RESET_N</targetRegister>
<plugin name="monostableTrigger">
<parameter name="milliseconds">5</parameter>
<parameter name="active">0</parameter>
<parameter name="inactive">1</parameter>
</plugin>
</redirectedRegister>
+
<redirectedRegister name="fpgaClockError">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_CLK_ERR</targetRegister>
+ <targetRegister>BSP.WORD_CLK_ERR</targetRegister>
</redirectedRegister>
+
<redirectedRegister name="BOARD_CLOCK_FREQUENCY">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_CLK_FREQ</targetRegister>
+ <targetRegister>BSP.WORD_CLK_FREQ</targetRegister>
<numberOfElements>1</numberOfElements>
<targetStartIndex>1</targetStartIndex>
<plugin name="forceReadOnly"/>
@@ -284,282 +413,112 @@
<parameter name="formula">x/1000000</parameter>
</plugin>
</redirectedRegister>
+
<redirectedRegister name="BOARD_VS_CH_ENA">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_VS_CH_ENA</targetRegister>
+ <targetRegister>FD.WORD_VS_CH_ENA</targetRegister>
<plugin name="forceReadOnly"/>
</redirectedRegister>
-% if int(fwRev) != 9999 :
- <redirectedRegister name="FW_BOARD_REV">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
- <plugin name="math">
- <parameter name="formula">floor(x / 65536)</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="FW_MAP_FILE_REV">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
- <plugin name="math">
- <parameter name="formula">x % 65536</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
-% else :
+
<redirectedRegister name="FW_BOARD_VER_MAJOR">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
<plugin name="math">
<parameter name="formula">floor(x / 2^24) % 256</parameter>
</plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
+
<redirectedRegister name="FW_BOARD_VER_MINOR">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
<plugin name="math">
<parameter name="formula">floor(x / 2^16) % 256</parameter>
</plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
+
<redirectedRegister name="FW_BOARD_VER_PATCH">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
<plugin name="math">
<parameter name="formula">floor(x / 2^8) % 256</parameter>
</plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
+
<redirectedRegister name="FW_BOARD_VER_COMMIT">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
<plugin name="math">
<parameter name="formula">x % 256</parameter>
</plugin>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
-% endif
+
% for i in range(0,6) :
<redirectedRegister name="LLL_STATUS_${i}">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
+ <targetRegister>BSP.WORD_LLL_STATUS</targetRegister>
<numberOfElements>1</numberOfElements>
<targetStartIndex>${i}</targetStartIndex>
<plugin name="forceReadOnly"/>
</redirectedRegister>
% endfor
- </module>
+
+ </module> <!-- Configuration -->
+
+ <!--
+ ################################################################################################################
+ -->
+
<module name="Status">
+
<redirectedRegister name="WORD_AMP_LIMIT_PRE_ACTIVE">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_PRE_ACTIVE</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_PRE_ACTIVE</targetRegister>
</redirectedRegister>
- <redirectedRegister name="WORD_AMP_LIMIT_ACTIVE">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_ACTIVE</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="WORD_AMP_LIMIT_TRG_ACTIVE">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG_ACTIVE</targetRegister>
- </redirectedRegister>
- </module>
-% if int(fwRev) != 9999 :
- <module name="Firmware">
- <redirectedRegister name="WORD_REVISION">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_REVISION</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="WORD_REVISION_APP">
+ <redirectedRegister name="WORD_AMP_LIMIT_ACTIVE">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
+ <targetRegister>FD.WORD_AMP_LIMIT_ACTIVE</targetRegister>
</redirectedRegister>
- </module>
-% else :
- <module name="Firmware">
- <constant name="WORD_REVISION">
- <type>uint32</type>
- <value>9999</value>
- </constant>
- <constant name="WORD_REVISION_APP">
- <type>uint32</type>
- <value>9999</value>
- </constant>
- </module>
-% endif
-% for c in range(0, nChannels) :
- <module name="Channel${c}">
- <redirectedRegister name="attenuation">
- <targetDevice>(subdevice?type=3regs&device=<par>target</par>&address=<par>rtmType</par>.0/WORD_ATT_SEL&data=<par>rtmType</par>.0/WORD_ATT_VAL&status=<par>rtmType</par>.0/WORD_ATT_STATUS&map=attenuators.map)</targetDevice>
- <targetRegister>CHANNEL${c}</targetRegister>
- <plugin name="math"><parameter name="formula">63 - 2*x</parameter></plugin>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="prelimiter">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_PRE</targetRegister>
- <targetStartIndex>${c}</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="math">
- <parameter name="formula">x*bitScalingLengthScaled</parameter>
- <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
- <parameter name="enable_push_parameters"/>
- </plugin>
- </redirectedRegister>
- <redirectedRegister name="limiter">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT</targetRegister>
- <targetStartIndex>${c}</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="math">
- <parameter name="formula">x*bitScalingLengthScaled</parameter>
- <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
- <parameter name="enable_push_parameters"/>
- </plugin>
- </redirectedRegister>
- <redirectedRegister name="triggerLimiter">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_AMP_LIMIT_TRG</targetRegister>
- <targetStartIndex>${c}</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="math">
- <parameter name="formula">x*bitScalingLengthScaled</parameter>
- <parameter name="bitScalingLengthScaled">/ToControlSystem/Configuration/bitScalingLengthScaled</parameter>
- <parameter name="enable_push_parameters"/>
- </plugin>
- </redirectedRegister>
- <module name="Calibration">
- <redirectedRegister name="sineTable">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_IQ_SIN</targetRegister>
- <targetStartIndex>${c*nSinCosTableSize}</targetStartIndex>
- <numberOfElements>${nSinCosTableSize}</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="cosineTable">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_IQ_COS</targetRegister>
- <targetStartIndex>${c*nSinCosTableSize}</targetStartIndex>
- <numberOfElements>${nSinCosTableSize}</numberOfElements>
- </redirectedRegister>
- </module>
- <module name="Filter">
- <redirectedRegister name="coefficientsValid">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_IIR_COEF_VALID</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="coefficients">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>FD.0/WORD_IIR_COEF${c}</targetRegister>
- </redirectedRegister>
- </module>
- <redirectedRegister name="adcFifoDelay">
+ <redirectedRegister name="WORD_AMP_LIMIT_TRG_ACTIVE">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_ADC_FIFO_DELAY</targetRegister>
- <targetStartIndex>${c}</targetStartIndex>
- <numberOfElements>1</numberOfElements>
+ <targetRegister>FD.WORD_AMP_LIMIT_TRG_ACTIVE</targetRegister>
</redirectedRegister>
- <redirectedBit name="adcFifoReset">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_ADC_FIFO_RESET</targetRegister>
- <targetBit>${c}</targetBit>
- </redirectedBit>
- <module name="AUTOTUNE">
- <variable name="INHIBIT">
- <type>int32</type>
- <value>0</value>
- </variable>
- <variable name="PIEZO_INHIBIT">
- <type>int32</type>
- <value>0</value>
- </variable>
- <variable name="SENSITIVITY">
- <type>float32</type>
- <value>0</value>
- </variable>
- <variable name="SP">
- <type>float32</type>
- <value>0</value>
- </variable>
- <variable name="PIEZO_SENSITIVITY">
- <type>float32</type>
- <value>0</value>
- </variable>
- <variable name="DEADSTEPS">
- <type>int32</type>
- <value>0</value>
- </variable>
- </module>
- <variable name="CAV_OUT_OF_OPERATION">
- <type>int32</type>
- <value>0</value>
- </variable>
+ </module> <!-- Status -->
- </module>
-% endfor
+ <!--
+ ################################################################################################################
+ -->
-% if not sincavFirmware and int(fwRev) < 4149 :
+% if not sincavFirmware :
<variable name="WORD_DAQ_MUX1">
<value>0</value>
<type>uint8</type>
</variable>
- <redirectedRegister name="timingDividerAdc">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_TIMING_FREQ</targetRegister>
- <targetStartIndex>6</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="daqEnableForRawMode">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_DAQ_ENABLE</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
-
-% elif not sincavFirmware :
- <variable name="WORD_DAQ_MUX1">
- <value>0</value>
- <type>uint8</type>
- </variable>
<variable name="timingDividerAdc">
<type>uint32</type>
<value>0</value>
</variable>
+
<redirectedRegister name="daqEnableForRawMode">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0/WORD_ENABLE</targetRegister>
+ <targetRegister>DAQ.WORD_ENABLE</targetRegister>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>1</numberOfElements>
</redirectedRegister>
-% elif int(fwRev) < 3017 :
-
- <redirectedRegister name="WORD_DAQ_MUX1">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_DAQ_MUX</targetRegister>
- <targetStartIndex>1</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="timingDividerAdc">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/WORD_DAQ_FREQ</targetRegister>
- <targetStartIndex>1</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <variable name="daqEnableForRawMode">
- <type>uint8</type>
- <value>0</value>
- </variable>
-
-% else :
+% else : # sincavFirmware ==>
<redirectedRegister name="WORD_DAQ_MUX1">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0/WORD_MUX_SEL</targetRegister>
+ <targetRegister>DAQ.WORD_MUX_SEL</targetRegister>
<targetStartIndex>1</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="math">
@@ -567,19 +526,21 @@
</plugin>
<plugin name="typeHintModifier"><parameter name="type">uint8</parameter></plugin>
</redirectedRegister>
+
<redirectedRegister name="timingDividerAdc">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0/WORD_STROBE_DIV</targetRegister>
+ <targetRegister>DAQ.WORD_STROBE_DIV</targetRegister>
<targetStartIndex>1</targetStartIndex>
<numberOfElements>1</numberOfElements>
</redirectedRegister>
- <!-- we are abusing this register (which was otherwise not used) and used it for the DAQ length
- FIXME: Instead map directly to the control system variable for all of these registers and aim to remove the
- DaqTriggerMux module in the server? It looks like this part is highly depending on the firmware, and there
- will be permanent differences between sincav/mulcav at least. -->
+
<redirectedRegister name="daqEnableForRawMode">
+ <!-- we are abusing this register (which was otherwise not used) and used it for the DAQ length
+ FIXME: Instead map directly to the control system variable for all of these registers and aim to remove the
+ DaqTriggerMux module in the server? It looks like this part is highly depending on the firmware, and there
+ will be permanent differences between sincav/mulcav at least. -->
<targetDevice><par>target</par></targetDevice>
- <targetRegister>DAQ.0/WORD_SAMPLES</targetRegister>
+ <targetRegister>DAQ.WORD_SAMPLES</targetRegister>
<targetStartIndex>1</targetStartIndex>
<numberOfElements>1</numberOfElements>
<plugin name="math">
@@ -588,106 +549,116 @@
<plugin name="typeHintModifier"><parameter name="type">uint8</parameter></plugin>
</redirectedRegister>
-% endif
+% endif # sincavFirmware
+
+ <!--
+ ################################################################################################################
+ -->
% if not sincavFirmware :
<module name="PartialVectorSum">
<redirectedChannel name="Q">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
<targetChannel>20</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
<plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
</redirectedChannel>
+
<redirectedChannel name="I">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
<targetChannel>21</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
<plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
</redirectedChannel>
- </module>
-% endif
+
+ </module> <!-- PartialVectorSum -->
+
+% endif # not sincavFirmware
<module name="BoardInit">
+
<redirectedRegister name="bootStatus">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>BOARD.0/WORD_BOOT_STATUS</targetRegister>
+ <targetRegister>BSP.WORD_BOOT_STATUS</targetRegister>
</redirectedRegister>
- </module>
- </module>
+ </module> <!-- BoardInit -->
+
+ </module> <!-- Adc -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
<module name="NormalDataMode">
+
% for c in range(0, nChannels) :
+
<module name="Channel${c}">
-% if int(fwRev) < 3017 or ( not sincavFirmware ) :
- <redirectedChannel name="amplitudeUncalibrated">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>amplPhaseDaq</par>_BUF0</targetRegister>
- <targetChannel>${c*2+1}</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="phaseUncalibrated">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>amplPhaseDaq</par>_BUF0</targetRegister>
- <targetChannel>${c*2+0}</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedChannel>
-% else :
+
<redirectedChannel name="amplitudeUncalibrated">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>amplPhaseDaq</par>_BUF0</targetRegister>
- <targetChannel>${c*2+0}</targetChannel>
+ <targetRegister>APP.<par>amplPhaseDaq</par>_BUF0</targetRegister>
+ <targetChannel>${c*2+1 if not sincavFirmware else c*2+0}</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedChannel>
+
<redirectedChannel name="phaseUncalibrated">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>amplPhaseDaq</par>_BUF0</targetRegister>
- <targetChannel>${c*2+1}</targetChannel>
+ <targetRegister>APP.<par>amplPhaseDaq</par>_BUF0</targetRegister>
+ <targetChannel>${c*2+0 if not sincavFirmware else c*2+1}</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
<plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedChannel>
-% endif
- </module>
-% endfor
- </module>
+
+ </module> <!-- Channel${c} -->
+
+% endfor # Channels
+
+ </module> <!-- NormalDataMode -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
<module name="RawDataMode">
+
% for c in range(0, nChannels) :
-% if int(fwRev) < 3017 or ( not sincavFirmware ) :
+
<module name="Channel${c}">
+
<redirectedChannel name="rawData">
<targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>rawDaq</par>_BUF0_RAW</targetRegister>
+ <targetRegister>APP.<par>rawDaq</par>_BUF0_RAW</targetRegister>
+% if not sincavFirmware :
<targetChannel>${c+1 if c % 2 == 0 else c-1}</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLengthRaw}</numberOfElements>
- </redirectedChannel>
- </module>
% else :
- <module name="Channel${c}">
- <redirectedChannel name="rawData">
- <targetDevice><par>target</par></targetDevice>
- <targetRegister>APP.0/<par>rawDaq</par>_BUF0_RAW</targetRegister>
<targetChannel>${c}</targetChannel>
+% endif
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLengthRaw}</numberOfElements>
</redirectedChannel>
- </module>
-% endif
-% endfor
- </module>
+
+ </module> <!-- Channel{$c} -->
+
+% endfor # Channels
+
+ </module> <!-- RawDataMode -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
</logicalNameMap>
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_controller.xlmap b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_controller.xlmap
index 7f385d6..e0ba5a6 100644
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_controller.xlmap
+++ b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/llrfctrl_controller.xlmap
@@ -1,2191 +1,1803 @@
##mako
<%
import math
+
+# Boolean whether a multi-cavity vector modulator is present (RTM at TCK7)
+hasMcavVm = ( INSTANCE_TYPE == InstanceType.mulcavStandAlone or INSTANCE_TYPE == InstanceType.mulcavMaster )
+
+# Boolean whether this is single-cavity firmware.
+isSincav = ( INSTANCE_TYPE == InstanceType.sincav )
+
%>\
<logicalNameMap>
- <module name="ToControlSystem">
+ <!--
+
+ Hints about the structure of this file:
+
+ - double line separators separate the highest module level
+ - single line separators are used only inside the "Controller" module to separate the second level
+ - no "if" or "for" may span across separators (neither single nor double)
+
+
+ The module layout is as follows:
+
+ - Configuration,
+ - BoardInit
+ - SamplingScheme
+ - Controller
+ - Setpoint
+ - VectorSum
+ - Error
+ - FeedForward
+ - FeedBack
+ - Output
+ - VectorModulator
+ - Status
+ - InterlockLatcher (only sincav)
+ - FirmwareSEUDetection
+ - RfOffFastRamp
+ - FastProtection
+ - Board
+ - BeamLoadingCompensation
+ - BeamBasedFeedback (separately for mulcav and sincav)
+ - PiezoInterface
+
+ -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+ <module name="Configuration">
+
+ <variable name="bitScaling">
+ <type>float64</type>
+ <value>0</value>
+ </variable>
- <module name="Configuration">
- <variable name="bitScaling">
- <type>float64</type>
- <value>0</value>
- </variable>
- </module>
+ <variable name="samplingFrequencyController">
+ <type>float64</type>
+ <value>0</value>
+ </variable>
- <module name="BoardInit">
- <redirectedRegister name="bootStatus">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_BOOT_STATUS</targetRegister>
- </redirectedRegister>
- </module>
- <module name="SamplingScheme">
- <redirectedRegister name="timingDividerTables">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>TIMING.0/WORD_DIVIDER_VALUE</targetRegister>
- <targetStartIndex>6</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="timingDividerController">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>DAQ.0/WORD_STROBE_DIV</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- </module>
+% if not isSincav :
+ <variable name="extraPowerScaling">
+ <type>float64</type>
+ <value>1</value>
+ <plugin name="math">
+ <parameter name="formula">bitScaling*bitScaling</parameter>
+ <parameter name="bitScaling">/Configuration/bitScaling</parameter>
+ </plugin>
+ <plugin name="forceReadOnly"/>
+ </variable>
+% endif
+
+ </module> <!-- Configuration -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+ <module name="BoardInit">
+ <redirectedRegister name="bootStatus">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BSP.WORD_BOOT_STATUS</targetRegister>
+ </redirectedRegister>
+ </module> <!-- BoardInit -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+ <module name="SamplingScheme">
- <module name="Controller">
+ <redirectedRegister name="timingDividerTables">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>TIMING.WORD_DIVIDER_VALUE</targetRegister>
+ <targetStartIndex>6</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ </redirectedRegister>
+
+ <redirectedRegister name="timingDividerController">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>DAQ.WORD_STROBE_DIV</targetRegister>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1</numberOfElements>
+ </redirectedRegister>
+
+ </module> <!-- SamplingScheme -->
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+ <module name="Controller">
+
+ <!--
+ ################################################################################################################
+ -->
+ <module name="SetPoint">
- <module name="Board">
-% if int(INTERFACE_REV_CONTROLLER) != 9999:
- <redirectedRegister name="FW_BOARD_REV">
+ <module name="Table">
+ <redirectedRegister name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
- <plugin name="math">
- <parameter name="formula">floor(x / 65536)</parameter>
- </plugin>
+ <targetRegister>CTABLES.AREA_SP_Q</targetRegister>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
- <redirectedRegister name="FW_MAP_FILE_REV">
+ <redirectedRegister name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
- <plugin name="math">
- <parameter name="formula">x % 65536</parameter>
- </plugin>
+ <targetRegister>CTABLES.AREA_SP_I</targetRegister>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
-% else :
- <redirectedRegister name="FW_BOARD_VER_MAJOR">
+ <redirectedBit name="bufferSelectI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
- <plugin name="math">
- <parameter name="formula">floor(x / 2^24) % 256</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="FW_BOARD_VER_MINOR">
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
+ <targetBit>4</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferSelectQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
- <plugin name="math">
- <parameter name="formula">floor(x / 2^16) % 256</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="FW_BOARD_VER_PATCH">
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
+ <targetBit>5</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferCurrentI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
- <plugin name="math">
- <parameter name="formula">floor(x / 2^8) % 256</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="FW_BOARD_VER_COMMIT">
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>4</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferCurrentQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_PRJ_VERSION</targetRegister>
- <plugin name="math">
- <parameter name="formula">x % 256</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
-% endif
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>5</targetBit>
+ </redirectedBit>
+ </module>
-% if INSTANCE_TYPE == InstanceType.sincav or INSTANCE_TYPE == InstanceType.mulcavSlave or INSTANCE_TYPE == InstanceType.monitoring :
- <redirectedRegister name="fpgaClockError">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_CLK_ERR</targetRegister>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
-% else :
- <redirectedRegister name="fpgaClockError_vm">
+ <module name="DAQ">
+ <redirectedChannel name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>UVM.0/WORD_CLK_ERROR</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="fpgaClockError">
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 8 if not isSincav else 3 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_CLK_ERR</targetRegister>
- <plugin name="math">
- <parameter name="formula">x or uvmError</parameter>
- <parameter name="uvmError">/ToControlSystem/Controller/Board/fpgaClockError_vm</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
-% endif
-
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 9 if not isSincav else 2 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
</module>
- <module name="FeedBack">
- <redirectedRegister name="mimoEnable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_ENA</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="smithEnable">
+ </module> <!-- SetPoint -->
+
+ <!--
+ ################################################################################################################
+ -->
+ <module name="VectorSum">
+
+ <module name="Calibration">
+ <redirectedRegister name="sineTable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_ENA</targetRegister>
+ <targetRegister>CTRL.WORD_VS_ROT_IM</targetRegister>
</redirectedRegister>
- <redirectedRegister name="smithDelay">
+ <redirectedRegister name="cosineTable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_DELAY</targetRegister>
+ <targetRegister>CTRL.WORD_VS_ROT_RE</targetRegister>
</redirectedRegister>
</module>
- <module name="Output">
- <module name="Total">
- <redirectedRegister name="limiterEnable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_AMP_LIMIT_ENA</targetRegister>
- </redirectedRegister>
- </module>
- </module>
-
- <module name="VectorModulator">
- <module name="DacOffset">
- <redirectedRegister name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_DAC_OFFSET</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_DAC_OFFSET</targetRegister>
- <targetStartIndex>1</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- </module>
- <redirectedRegister name="qSign">
+ <module name="DAQ">
+ <redirectedChannel name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_Q_SIGN</targetRegister>
- </redirectedRegister>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>0</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>1</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ </module>
-% if int(INTERFACE_REV_CONTROLLER) >= 3298:
- <module name="Predistorter">
- <redirectedRegister name="ENA">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>PREDISTORTER.0.BIT_PREDISTORTER_ENA</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="TABLE_BASE_I">
- <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.0.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
- <targetRegister>TABLE_BASE_I</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="TABLE_BASE_Q">
- <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.0.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
- <targetRegister>TABLE_BASE_Q</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="TABLE_DERIVATIVE_I">
- <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.0.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
- <targetRegister>TABLE_DERIVATIVE_I</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="TABLE_DERIVATIVE_Q">
- <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.0.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
- <targetRegister>TABLE_DERIVATIVE_Q</targetRegister>
- </redirectedRegister>
- </module>
-% endif # firmware revision
+ </module> <!-- VectorSum -->
+ <!--
+ ################################################################################################################
+ -->
+ <module name="Error">
+ <module name="DAQ">
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 2 if not isSincav else 5 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 3 if not isSincav else 4 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
</module>
+ </module> <!-- Error -->
- </module> <!-- ToControlSystem/Controller -->
-
- </module> <!-- ToControlSystem -->
-
- <module name="Controller">
+ <!--
+ ################################################################################################################
+ -->
+ <module name="FeedForward">
+ <redirectedRegister name="enable_actual">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.BIT_FF_ENA</targetRegister>
+ </redirectedRegister>
- <module name="FeedForward">
<module name="Correction">
+
<redirectedRegister name="FF_CORR_ENA">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/BIT_FF_CORR_ENA</targetRegister>
+ <targetRegister>CTRL.BIT_FF_CORR_ENA</targetRegister>
</redirectedRegister>
+
<module name="Total">
<redirectedRegister name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_FF_CORR_Q</targetRegister>
+ <targetRegister>CTABLES.AREA_FF_CORR_Q</targetRegister>
</redirectedRegister>
<redirectedRegister name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_FF_CORR_I</targetRegister>
+ <targetRegister>CTABLES.AREA_FF_CORR_I</targetRegister>
</redirectedRegister>
<redirectedBit name="bufferSelectI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>2</targetBit>
</redirectedBit>
<redirectedBit name="bufferSelectQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>3</targetBit>
</redirectedBit>
- </module>
- </module>
+ <redirectedBit name="bufferCurrentI">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>2</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferCurrentQ">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>3</targetBit>
+ </redirectedBit>
+ </module> <!-- Total (Correction) -->
+
+ </module> <!-- Correction -->
+
<module name="Table">
<redirectedRegister name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_FF_Q</targetRegister>
+ <targetRegister>CTABLES.AREA_FF_Q</targetRegister>
<plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
<redirectedRegister name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_FF_I</targetRegister>
+ <targetRegister>CTABLES.AREA_FF_I</targetRegister>
<plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
<redirectedBit name="bufferSelectI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>0</targetBit>
</redirectedBit>
<redirectedBit name="bufferSelectQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>1</targetBit>
</redirectedBit>
- </module>
- </module>
- <module name="SetPoint">
- <module name="Table">
- <redirectedRegister name="Q">
+ <redirectedBit name="bufferCurrentI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_SP_Q</targetRegister>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="I">
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>0</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferCurrentQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_SP_I</targetRegister>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- <redirectedBit name="bufferSelectI">
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>1</targetBit>
+ </redirectedBit>
+ </module> <!-- Table -->
+
+ <module name="DAQ">
+ <redirectedChannel name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
- <targetBit>4</targetBit>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 13 if not isSincav else 10 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 12 if not isSincav else 11 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ </module> <!-- DAQ -->
+
+ </module> <!-- FeedForward -->
+
+ <!--
+ ################################################################################################################
+ -->
+ <module name="FeedBack">
+
+ <redirectedRegister name="enable_actual">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.BIT_FB_ENA</targetRegister>
+ </redirectedRegister>
+
+% if not isSincav :
+
+ <module name="DisableOn">
+
+ <redirectedBit name="outputAmplitudeLimit">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_CTRL_SAT_FB_OFF_EN</targetRegister>
+ <targetBit>0</targetBit>
</redirectedBit>
- <redirectedBit name="bufferSelectQ">
+
+ <redirectedBit name="ovcSaturation">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
- <targetBit>5</targetBit>
+ <targetRegister>APP.WORD_CTRL_SAT_FB_OFF_EN</targetRegister>
+ <targetBit>1</targetBit>
</redirectedBit>
+
</module>
- </module>
- <module name="FeedBack">
+
+% endif # not isSincav
+
+ <redirectedRegister name="mimoEnable">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.WORD_MIMO_ENA</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="smithEnable">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.WORD_SMITH_ENA</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="smithDelay">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.WORD_SMITH_DELAY</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="limitI">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.WORD_CNTRL_I_LIMIT</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="limitQ">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.WORD_CNTRL_Q_LIMIT</targetRegister>
+ </redirectedRegister>
+
<module name="Gain">
+
<module name="Table">
<redirectedRegister name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_GP_I</targetRegister>
+ <targetRegister>CTABLES.AREA_GP_I</targetRegister>
<plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
<redirectedRegister name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/AREA_GP_Q</targetRegister>
+ <targetRegister>CTABLES.AREA_GP_Q</targetRegister>
<plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
<redirectedBit name="bufferSelectI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>8</targetBit>
</redirectedBit>
<redirectedBit name="bufferSelectQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTABLES.0/BIT_CTL_TABLES_BUF</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF</targetRegister>
<targetBit>9</targetBit>
</redirectedBit>
- </module>
- </module>
- </module>
+ <redirectedBit name="bufferCurrentI">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>8</targetBit>
+ </redirectedBit>
+ <redirectedBit name="bufferCurrentQ">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTABLES.BIT_CTL_TABLES_BUF_ACTUAL</targetRegister>
+ <targetBit>9</targetBit>
+ </redirectedBit>
+ </module> <!-- (Gain) Table -->
- <module name="FeedForward">
- <redirectedRegister name="enable_actual">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/BIT_FF_ENA</targetRegister>
- </redirectedRegister>
- </module>
-
- <module name="FeedBack">
- <redirectedRegister name="enable_actual">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/BIT_FB_ENA</targetRegister>
- </redirectedRegister>
- </module>
+ <module name="DAQ">
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 11 if not isSincav else 6 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 10 if not isSincav else 7 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+
+ </module> <!-- (Gain) DAQ -->
+
+ </module> <!-- Gain -->
- <module name="VectorSum">
- <module name="Calibration">
- <redirectedRegister name="sineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_VS_ROT_IM</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="cosineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_VS_ROT_RE</targetRegister>
- </redirectedRegister>
- </module>
- </module>
-
- <module name="Output">
- <module name="Total">
- <redirectedRegister name="limiter">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_AMP_LIMIT</targetRegister>
- <plugin name="math">
- <parameter name="formula">x*bitScaling</parameter>
- <parameter name="bitScaling">/ToControlSystem/Configuration/bitScaling</parameter>
- <parameter name="enable_push_parameters"/>
- </plugin>
- </redirectedRegister>
- </module>
- </module>
-
- <module name="FeedBack">
- <redirectedRegister name="limitI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_CNTRL_I_LIMIT</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="limitQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_CNTRL_Q_LIMIT</targetRegister>
- </redirectedRegister>
<module name="MimoCoefficients">
<redirectedRegister name="A11">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_A11</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_A11</targetRegister>
</redirectedRegister>
<redirectedRegister name="B11">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_B11</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_B11</targetRegister>
</redirectedRegister>
<redirectedRegister name="A12">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_A12</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_A12</targetRegister>
</redirectedRegister>
<redirectedRegister name="B12">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_B12</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_B12</targetRegister>
</redirectedRegister>
<redirectedRegister name="A21">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_A21</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_A21</targetRegister>
</redirectedRegister>
<redirectedRegister name="B21">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_B21</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_B21</targetRegister>
</redirectedRegister>
<redirectedRegister name="A22">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_A22</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_A22</targetRegister>
</redirectedRegister>
<redirectedRegister name="B22">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_B22</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_B22</targetRegister>
</redirectedRegister>
<redirectedRegister name="valid">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_MIMO_COEF_VALID</targetRegister>
+ <targetRegister>CTRL.WORD_MIMO_COEF_VALID</targetRegister>
</redirectedRegister>
- </module>
+ </module> <!-- MimoCoefficients -->
+
<module name="SmithCoefficients">
<redirectedRegister name="A11">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_A11</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_A11</targetRegister>
</redirectedRegister>
<redirectedRegister name="B11">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_B11</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_B11</targetRegister>
</redirectedRegister>
<redirectedRegister name="A12">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_A12</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_A12</targetRegister>
</redirectedRegister>
<redirectedRegister name="B12">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_B12</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_B12</targetRegister>
</redirectedRegister>
<redirectedRegister name="A21">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_A21</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_A21</targetRegister>
</redirectedRegister>
<redirectedRegister name="B21">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_B21</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_B21</targetRegister>
</redirectedRegister>
<redirectedRegister name="A22">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_A22</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_A22</targetRegister>
</redirectedRegister>
<redirectedRegister name="B22">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_B22</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_B22</targetRegister>
</redirectedRegister>
<redirectedRegister name="valid">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/WORD_SMITH_COEF_VALID</targetRegister>
+ <targetRegister>CTRL.WORD_SMITH_COEF_VALID</targetRegister>
</redirectedRegister>
- </module>
- </module>
-
- <module name="Firmware">
-% if int(INTERFACE_REV_CONTROLLER) != 9999 :
- <redirectedRegister name="WORD_REVISION">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_REVISION</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="WORD_REVISION_APP">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_REVISION</targetRegister>
- </redirectedRegister>
-% else :
- <constant name="WORD_REVISION">
- <type>uint32</type>
- <value>9999</value>
- </constant>
- <constant name="WORD_REVISION_APP">
- <type>uint32</type>
- <value>9999</value>
- </constant>
-% endif
- </module>
+ </module> <!-- SmithCoefficients -->
- </module> <!-- Controller -->
-
-
-% if INSTANCE_TYPE != InstanceType.sincav :
-
- <module name="ToControlSystem">
-
- <module name="Configuration">
- <variable name="extraPowerScaling">
- <type>float64</type>
- <value>1</value>
- <plugin name="math">
- <parameter name="formula">bitScaling*bitScaling</parameter>
- <parameter name="bitScaling">/ToControlSystem/Configuration/bitScaling</parameter>
- </plugin>
- <plugin name="forceReadOnly"/>
- </variable>
- </module>
+ </module> <!-- FeedBack -->
- <module name="Controller">
+ <!--
+ ################################################################################################################
+ -->
+ <module name="Output">
- <module name="Status">
- <redirectedRegister name="actualPulseLength">
+ <module name="Calibration">
+ <redirectedRegister name="sineTable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0.WORD_PULSE_LENGTH</targetRegister>
+ <targetRegister>OVC.WORD_ROT_IM</targetRegister>
</redirectedRegister>
- <redirectedBit name="outputAmplitudeLimit">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>0</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="controllerLimitI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>1</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="controllerLimitQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>2</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="feedForwardSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>3</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="feedForwardSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>4</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="gainSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>5</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="gainSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>6</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="offsetCompensationSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>7</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="offsetCompensationSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>8</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="masterFeedbackLinkNotOK">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>9</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="synchronisationNotOK">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>10</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule1Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>11</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule2Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>12</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule1Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>13</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule2Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>14</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule1Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>15</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule2Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>16</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule1Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>17</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule2Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>18</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="slaveFeedbackLinkNotOK">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>19</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule3Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>20</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule4Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>21</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule3Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>22</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="limitersModule4Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>23</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule3Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>24</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule4Probe">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>25</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule3Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>26</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="triggerLimitersModule4Forward">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>27</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="backplaneInterlockActive">
+ <redirectedRegister name="cosineTable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>31</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedRegister name="saturation">
- <targetDevice>this</targetDevice>
- <targetRegister>/ToControlSystem/Controller/Status/feedForwardSaturationI</targetRegister>
- <plugin name="math">
- <parameter name="formula">x | FFQ | OCI | OCQ | GCI | GCQ </parameter>
- <parameter name="FFQ">/ToControlSystem/Controller/Status/feedForwardSaturationQ</parameter>
- <parameter name="OCI">/ToControlSystem/Controller/Status/offsetCompensationSaturationI</parameter>
- <parameter name="OCQ">/ToControlSystem/Controller/Status/offsetCompensationSaturationQ</parameter>
- <parameter name="GCI">/ToControlSystem/Controller/Status/gainSaturationI</parameter>
- <parameter name="GCQ">/ToControlSystem/Controller/Status/gainSaturationQ</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
+ <targetRegister>OVC.WORD_ROT_RE</targetRegister>
</redirectedRegister>
- </module>
+ </module> <!-- (Output) Calibration -->
- <module name="VectorModulator">
- <redirectedRegister name="delay">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>UVM.0/WORD_DAC_DELAY</targetRegister>
- </redirectedRegister>
- </module>
-
- <module name="Board">
- <redirectedBit name="BOARD_CRYO1_ENA">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_CRYO_MODULE_ENA</targetRegister>
- <targetBit>0</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="BOARD_CRYO2_ENA">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_CRYO_MODULE_ENA</targetRegister>
- <targetBit>1</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedRegister name="BOARD_RESET_VMGTP">
+ <module name="Proportional">
+ <module name="DAQ">
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 4 if not isSincav else 9 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 5 if not isSincav else 8 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ </module> <!-- (Proportional) DAQ -->
+ </module> <!-- Proportional (Output) -->
+
+ <module name="Total">
+
+ <redirectedRegister name="limiterEnable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>UVM.0/WORD_GTP_RESET</targetRegister>
- <plugin name="monostableTrigger">
- <parameter name="milliseconds">5</parameter>
- </plugin>
+ <targetRegister>OUTPUT.WORD_AMP_LIMIT_ENA</targetRegister>
</redirectedRegister>
- <redirectedRegister name="BOARD_RESET_N">
+
+ <redirectedRegister name="limiter">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_RESET_N</targetRegister>
- <plugin name="monostableTrigger">
- <parameter name="milliseconds">5</parameter>
- <parameter name="active">0</parameter>
- <parameter name="inactive">1</parameter>
+ <targetRegister>OUTPUT.WORD_AMP_LIMIT</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x*bitScaling</parameter>
+ <parameter name="bitScaling">/Configuration/bitScaling</parameter>
+ <parameter name="enable_push_parameters"/>
</plugin>
</redirectedRegister>
- <redirectedRegister name="MS_MASTER_MODE">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_MASTER_MODE</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
-% if int(INTERFACE_REV_CONTROLLER) >= 4282 :
- <redirectedBit name="PVS_NORM_WITHIN_CRATE">
- <!-- Note: maybe this register should be removed once the feature is tested and shall be permanently enabled! -->
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PVS_NORM</targetRegister>
- <targetBit>0</targetBit>
- </redirectedBit>
+ <module name="DAQ">
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 6 if not isSincav else 13 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>${ 7 if not isSincav else 12 }</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
+ </redirectedChannel>
+ </module> <!-- (Total) DAQ -->
- <redirectedBit name="PVS_NORM_MASTER_SLAVE">
- <!-- Note: maybe this register should be removed once the feature is tested and shall be permanently enabled! -->
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PVS_NORM</targetRegister>
- <targetBit>1</targetBit>
- </redirectedBit>
-% endif
-
-% if int(INTERFACE_REV_CONTROLLER) >= 4188 :
- <module name="DATA_ALIGNMENT">
- <module name="WITHIN_CRATE">
- <redirectedRegister name="STATUS">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_ALIGN_CAV_STATUS</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="ARRIVAL_TIME">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_ALIGN_CAV_ARR_MON</targetRegister>
- </redirectedRegister>
- </module>
- <module name="MASTER_SLAVE">
- <redirectedRegister name="STATUS">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_ALIGN_MS_STATUS</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="ARRIVAL_TIME">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_ALIGN_MS_ARR_MON</targetRegister>
- </redirectedRegister>
- </module>
- </module>
+ </module> <!-- Total (Output) -->
+
+ </module> <!-- Output -->
+
+ <!--
+ ################################################################################################################
+ -->
+% if isSincav or hasMcavVm :
+ <module name="VectorModulator">
+
+ <redirectedRegister name="attenuation">
+% if hasMcavVm :
+ <targetDevice>VmBoard</targetDevice>
+ <targetRegister>BSP.WORD_ATT_VAL</targetRegister>
% else :
- <redirectedRegister name="MASTER_DELAY">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_VS_SYNC_SET_DELAY</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="SYNCH_PACKAGE_COUNT_FROM_SIS_A">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_VS_SYNC_PRO0_CNT</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- <redirectedRegister name="SYNCH_PACKAGE_COUNT_FROM_SIS_B">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_VS_SYNC_PRO1_CNT</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- <redirectedRegister name="SYNCH_PACKAGE_COUNT_FROM_SLAVE">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_VS_SYNC_MS_CNT</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
+ <targetDevice>(subdevice?type=3regs&dataDelay=1000&device=CtrlBoard&address=${ADCBOARD[0]["RTM_TYPE"]}.WORD_ATT_SEL&data=${ADCBOARD[0]["RTM_TYPE"]}.WORD_ATT_VAL&status=${ADCBOARD[0]["RTM_TYPE"]}.WORD_ATT_STATUS&map=attenuators.map)</targetDevice>
+ <targetRegister>CHANNEL8</targetRegister>
% endif
+ <plugin name="math"><parameter name="formula">63 - 4*x</parameter></plugin>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_RTM_CH0">
+ <module name="DacOffset">
+ <redirectedRegister name="I">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
+ <targetRegister>OUTPUT.WORD_DAC_OFFSET</targetRegister>
<targetStartIndex>0</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_RTM_CH1">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>1</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_RTM_CH2">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>2</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_RTM_CH3">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>3</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_LCAGE1">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>4</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_LCAGE2">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
<numberOfElements>1</numberOfElements>
- <targetStartIndex>5</targetStartIndex>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_LCAGE3">
+ <redirectedRegister name="Q">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
+ <targetRegister>OUTPUT.WORD_DAC_OFFSET</targetRegister>
+ <targetStartIndex>1</targetStartIndex>
<numberOfElements>1</numberOfElements>
- <targetStartIndex>6</targetStartIndex>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_LCAGE4">
+ </module>
+
+ <redirectedRegister name="qSign">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>OUTPUT.WORD_Q_SIGN</targetRegister>
+ </redirectedRegister>
+
+% if hasMcavVm :
+ <redirectedRegister name="delay">
+ <targetDevice>VmBoard</targetDevice>
+ <targetRegister>BSP.WORD_DAC_DELAY</targetRegister>
+ </redirectedRegister>
+% endif
+
+ <module name="Predistorter">
+ <redirectedRegister name="ENA">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>7</targetStartIndex>
+ <targetRegister>PREDISTORTER.BIT_PREDISTORTER_ENA</targetRegister>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_UCAGE1">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>8</targetStartIndex>
+ <redirectedRegister name="TABLE_BASE_I">
+ <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
+ <targetRegister>TABLE_BASE_I</targetRegister>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_UCAGE2">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>9</targetStartIndex>
+ <redirectedRegister name="TABLE_BASE_Q">
+ <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
+ <targetRegister>TABLE_BASE_Q</targetRegister>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_UCAGE3">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>10</targetStartIndex>
+ <redirectedRegister name="TABLE_DERIVATIVE_I">
+ <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
+ <targetRegister>TABLE_DERIVATIVE_I</targetRegister>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_SFP_UCAGE4">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>11</targetStartIndex>
+ <redirectedRegister name="TABLE_DERIVATIVE_Q">
+ <targetDevice>(subdevice?type=2regs&device=CtrlBoard&address=PREDISTORTER.WORD_PREDISTORTER_MEM_SEL&data=PREDISTORTER.AREA_PREDISTORTER_MEM&sleep=10000&map=predistorterTables.map)</targetDevice>
+ <targetRegister>TABLE_DERIVATIVE_Q</targetRegister>
</redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S8">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>12</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S7">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>13</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S5">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>14</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S6">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>15</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S10">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>16</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S9">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>17</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S12">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>18</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC_S11">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>19</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC0">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>20</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC1">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>21</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC2">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>22</targetStartIndex>
- </redirectedRegister>
- <redirectedRegister name="LLL_STATUS_AMC3">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/WORD_LLL_STATUS</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>23</targetStartIndex>
- </redirectedRegister>
-
- </module>
+ </module>
- </module>
+ </module> <!-- VectorModulator -->
+% endif # isSincav or hasMcavVm
+
+ <!--
+ ################################################################################################################
+ -->
+ <module name="Status">
- <module name="BeamLoadingCompensation">
- <redirectedRegister name="ENABLE">
+ <!-- CTABLE double buffering mode/status -->
+ <redirectedRegister name="tableBufferMode">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/BIT_ENA</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_MODE</targetRegister>
</redirectedRegister>
- <redirectedRegister name="CHARGE.SOURCE">
+
+ <redirectedRegister name="tableBufferModeActual">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_CHARGE_SRC</targetRegister>
+ <targetRegister>CTABLES.BIT_CTL_MODE</targetRegister>
+ <plugin name="forceReadOnly"/>
</redirectedRegister>
- <redirectedRegister name="CHARGE.PRECOMP.SOURCE">
+
+ <!-- Pulse length / cuts reporting -->
+% if not isSincav :
+ <redirectedRegister name="actualPulseLength">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_CHARGE_PRED_SRC</targetRegister>
+ <targetRegister>APP.WORD_PULSE_LENGTH</targetRegister>
</redirectedRegister>
- <redirectedRegister name="CHARGE.THRESHOLD">
+
+ <redirectedRegister name="intendedPulseLength">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_CHARGE_THR</targetRegister>
+ <targetRegister>APP.WORD_PULSE_STOP_TIME</targetRegister>
</redirectedRegister>
- <redirectedRegister name="CHARGE.KEEP_VALUE">
+% else :
+ <variable name="intendedPulseLength">
+ <type>uint32</type>
+ <value>0</value>
+ </variable>
+% endif
+
+ <!-- Controller status bit mask -->
+ <redirectedRegister name="controllerStatus">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_CHARGE_KEEP_VAL</targetRegister>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
</redirectedRegister>
- <redirectedRegister name="CHARGE.PRECOMP.SELECT">
+
+ <constant name="bitmaskForInhibitAlgos">
+ <type>uint32</type>
+% if not isSincav :
+ <!-- 1+2+4 => ignore outputAmplitudeLimit, controllerLimitI, controllerLimitQ -->
+ <value>7</value>
+% else :
+ <!-- 2+4+8+16 => ignore FD prelimiter, controller limit I, controller limit Q, output amplitude limit -->
+ <value>30</value>
+% endif
+ </constant>
+
+ <!-- Individual status bits -->
+ <redirectedBit name="outputAmplitudeLimit">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_CHARGE_PRE_SEL</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="CHARGE.SCALE.SELECT">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 0 if not isSincav else 4 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="controllerLimitI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_SCALE_SEL</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="CHARGE.SCALE.SINGLE_VALUE">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 1 if not isSincav else 2 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="controllerLimitQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_SCALE_REG</targetRegister>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="CHARGE.SCALE.PER_BUNCH_SPACING">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 2 if not isSincav else 3 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="feedForwardSaturationI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_SCALE_TAB</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="TABLE.ENA">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 3 if not isSincav else 5 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="feedForwardSaturationQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/BIT_TABLE_ENA</targetRegister>
- </redirectedRegister>
- <redirectedChannel name="TOROID">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 4 if not isSincav else 6 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="gainSaturationI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>19</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="TOROID_BUNCH_NUMBER">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 5 if not isSincav else 9 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="gainSaturationQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>18</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="BPM_CHARGE">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>${ 6 if not isSincav else 10 }</targetBit>
+ </redirectedBit>
+ <redirectedBit name="offsetCompensationSaturationI">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>21</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="BPM_BUNCH_NUMBER">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>7</targetBit>
+ </redirectedBit>
+ <redirectedBit name="offsetCompensationSaturationQ">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>20</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedBit name="ENABLE.TRAIN_1">
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>8</targetBit>
+ </redirectedBit>
+
+% if not isSincav :
+
+ <redirectedBit name="masterFeedbackLinkNotOK">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>0</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>9</targetBit>
</redirectedBit>
- <redirectedBit name="ENABLE.TRAIN_2">
+ <redirectedBit name="synchronisationNotOK">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>1</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>10</targetBit>
</redirectedBit>
- <redirectedBit name="ENABLE.TRAIN_3">
+ <redirectedBit name="limitersModule1Probe">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>2</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>11</targetBit>
</redirectedBit>
- <redirectedBit name="ENABLE.TRAIN_4">
+ <redirectedBit name="limitersModule2Probe">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>3</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>12</targetBit>
</redirectedBit>
- <redirectedBit name="ENABLE.TRAIN_5">
+ <redirectedBit name="limitersModule1Forward">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>4</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>13</targetBit>
</redirectedBit>
- <redirectedBit name="ENABLE.TRAIN_6">
+ <redirectedBit name="limitersModule2Forward">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_TRAIN_ENA</targetRegister>
- <targetBit>5</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>14</targetBit>
</redirectedBit>
- <redirectedRegister name="X2T_BUNCH_DEST_MASK">
+ <redirectedBit name="triggerLimitersModule1Probe">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>X2TSDR.0/WORD_BUNCH_DEST_MASK</targetRegister>
- </redirectedRegister>
- </module>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>15</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule2Probe">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>16</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule1Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>17</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule2Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>18</targetBit>
+ </redirectedBit>
+ <redirectedBit name="slaveFeedbackLinkNotOK">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>19</targetBit>
+ </redirectedBit>
+ <redirectedBit name="limitersModule3Probe">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>20</targetBit>
+ </redirectedBit>
+ <redirectedBit name="limitersModule4Probe">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>21</targetBit>
+ </redirectedBit>
+ <redirectedBit name="limitersModule3Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>22</targetBit>
+ </redirectedBit>
+ <redirectedBit name="limitersModule4Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>23</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule3Probe">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>24</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule4Probe">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>25</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule3Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>26</targetBit>
+ </redirectedBit>
+ <redirectedBit name="triggerLimitersModule4Forward">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>27</targetBit>
+ </redirectedBit>
+ <redirectedBit name="backplaneInterlockActive">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>31</targetBit>
+ </redirectedBit>
+% else : # isSincav ==>
- <module name="BeamBasedFeedback">
-% for ft in range(0,4) :
- <redirectedBit name="ENA_${ft}">
+ <redirectedBit name="limiters">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_ENABLE</targetRegister>
- <targetBit>${ft}</targetBit>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>0</targetBit>
+ <plugin name="forceReadOnly"/>
</redirectedBit>
- <redirectedRegister name="MATRIX.A11_${ft}">
+ <redirectedBit name="prelimiters">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_MAT_A11</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>1</targetBit>
+ <plugin name="forceReadOnly"/>
+ </redirectedBit>
+ <redirectedBit name="fastProtectionActive">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>11</targetBit>
+ <plugin name="forceReadOnly"/>
+ </redirectedBit>
+ <redirectedBit name="interlockLatcher">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_STATUS</targetRegister>
+ <targetBit>12</targetBit>
+ <plugin name="forceReadOnly"/>
+ </redirectedBit>
+
+ <redirectedRegister name="externalInterlock">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>${ADCBOARD[0]["RTM_TYPE"]}.WORD_EXT_INTERLOCK</targetRegister>
+ </redirectedRegister>
+
+% endif
+
+ <!-- Summarised status bits -->
+ <redirectedRegister name="saturation">
+ <targetDevice>this</targetDevice>
+ <targetRegister>/Controller/Status/feedForwardSaturationI</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x | FFQ | OCI | OCQ | GCI | GCQ </parameter>
+ <parameter name="FFQ">/Controller/Status/feedForwardSaturationQ</parameter>
+ <parameter name="OCI">/Controller/Status/offsetCompensationSaturationI</parameter>
+ <parameter name="OCQ">/Controller/Status/offsetCompensationSaturationQ</parameter>
+ <parameter name="GCI">/Controller/Status/gainSaturationI</parameter>
+ <parameter name="GCQ">/Controller/Status/gainSaturationQ</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
- <redirectedRegister name="MATRIX.A12_${ft}">
+
+ </module> <!-- Status -->
+
+ <!--
+ ################################################################################################################
+ -->
+% if isSincav :
+
+ <module name="InterlockLatcher">
+
+ <redirectedRegister name="ilockLatchEnable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_MAT_A12</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ <targetRegister>APP.WORD_INTERLOCK_LATCHER_ENA</targetRegister>
</redirectedRegister>
- <redirectedRegister name="MATRIX.A21_${ft}">
+
+ <redirectedRegister name="ilockLatchStatus">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_MAT_A21</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ <targetRegister>APP.WORD_INTERLOCK_LATCHER_STATUS</targetRegister>
</redirectedRegister>
- <redirectedRegister name="MATRIX.A22_${ft}">
+
+ <redirectedRegister name="ilockLatchReset">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_MAT_A22</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ <targetRegister>APP.WORD_INTERLOCK_LATCHER_RESET</targetRegister>
</redirectedRegister>
- <redirectedRegister name="AMPL.LIMIT_${ft}">
+
+ </module> <!-- InterlockLatcher -->
+
+% endif # isSincav
+
+ <!--
+ ################################################################################################################
+ -->
+
+ <module name="FirmwareSEUDetection">
+ <redirectedRegister name="unrecoverableErrorDetectedRaw">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_AMP_LIMIT</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
+ <targetStartIndex>2065</targetStartIndex>
<numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="math">
- <parameter name="formula">x*bitScaling</parameter>
- <parameter name="bitScaling">/ToControlSystem/Configuration/bitScaling</parameter>
- <parameter name="enable_push_parameters"/>
- </plugin>
+ <plugin name="forceReadOnly"/>
</redirectedRegister>
- <redirectedRegister name="PHASE.LIMIT_${ft}">
+ <redirectedRegister name="crcErrorSinceFpgaBoot">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_PHA_LIMIT</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
+ <targetStartIndex>2066</targetStartIndex>
<numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
- <plugin name="math">
- <parameter name="formula">x*131072*2./360.</parameter>
- </plugin>
+ <plugin name="forceReadOnly"/>
</redirectedRegister>
- <redirectedRegister name="BAM_SP_${ft}">
+ <redirectedRegister name="eccFixedFramesSinceFpgaBoot">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_BAM_SP</targetRegister>
+ <targetRegister>BSP.AREA_BOOT</targetRegister>
+ <targetStartIndex>2067</targetStartIndex>
<numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="forceReadOnly"/>
</redirectedRegister>
- <redirectedRegister name="GAIN_${ft}">
+ </module>
+
+ <!--
+ ################################################################################################################
+ -->
+
+% if not isSincav :
+
+ <module name="RfOffFastRamp">
+ <redirectedRegister name="enable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_GAIN</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
+ <targetRegister>OUTPUT.WORD_RF_GATE_MODE</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="stepsize">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>OUTPUT.WORD_RF_GATE_STEP</targetRegister>
<plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
</redirectedRegister>
-% if int(INTERFACE_REV_CONTROLLER) >= 4188 :
- <redirectedRegister name="BCM_SP_${ft}">
+ <redirectedRegister name="useHardwareRfGate">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_BCM_SP</targetRegister>
- <numberOfElements>1</numberOfElements>
- <targetStartIndex>${ft}</targetStartIndex>
+ <targetRegister>APP.WORD_RTM_RF_GATE_ENA</targetRegister>
</redirectedRegister>
-% endif
-% endfor
+ </module>
+
+% endif # isSincav
+
+ <!--
+ ################################################################################################################
+ -->
+% if isSincav :
+
+ <!-- This is used for the fast protection only -->
+ <module name="PulseShape">
+ <variable name="delay">
+ <type>float64</type>
+ <value>0</value>
+ </variable>
+ <variable name="fillingDuration">
+ <type>float64</type>
+ <value>0</value>
+ </variable>
+ <variable name="flattopDuration">
+ <type>float64</type>
+ <value>0</value>
+ </variable>
+ </module>
-% if int(INTERFACE_REV_CONTROLLER) >= 4188 :
- <redirectedRegister name="CHARGE_DELAY">
+% endif # isSincav
+
+ <!--
+ ################################################################################################################
+ -->
+
+% if isSincav :
+ <module name="FastProtection">
+
+ <redirectedRegister name="ENA">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_CHARGE_DELAY</targetRegister>
+ <targetRegister>APP.WORD_PROT_ENA_N</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">not(x)</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
- <redirectedRegister name="CHARGE_THRESHOLD">
+
+ <redirectedRegister name="LIMIT_HIGH">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_CHARGE_THR</targetRegister>
+ <targetRegister>APP.WORD_PROT_PLEVA</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x*65536</parameter>
+ </plugin>
</redirectedRegister>
- <redirectedRegister name="CHARGE_GATE_MODE">
+
+ <redirectedRegister name="LIMIT_LOW">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBF.0/WORD_CHARGE_GATE_MODE</targetRegister>
+ <targetRegister>APP.WORD_PROT_PLEVB</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x*65536</parameter>
+ </plugin>
</redirectedRegister>
-% endif
- <redirectedChannel name="OUT.I">
+ <redirectedRegister name="SLOPE">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>3</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="OUT.Q">
+ <targetRegister>APP.WORD_PROT_PLEVS</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x*65536</parameter>
+ </plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="START">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>2</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="IN.I">
+ <targetRegister>APP.WORD_PROT_T0</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">(x + delay + filling) * fs</parameter>
+ <parameter name="delay">/Controller/PulseShape/delay</parameter>
+ <parameter name="filling">/Controller/PulseShape/fillingDuration</parameter>
+ <parameter name="fs">/Configuration/samplingFrequencyController</parameter>
+ </plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="STOP">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>17</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="IN.Q">
+ <targetRegister>APP.WORD_PROT_T1</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">(x + delay + filling + flattop) * fs</parameter>
+ <parameter name="delay">/Controller/PulseShape/delay</parameter>
+ <parameter name="filling">/Controller/PulseShape/fillingDuration</parameter>
+ <parameter name="flattop">/Controller/PulseShape/flattopDuration</parameter>
+ <parameter name="fs">/Configuration/samplingFrequencyController</parameter>
+ </plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="THRESHOLD">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>16</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="BEAM_ACTIVE">
+ <targetRegister>APP.WORD_PROT_FL_ENA</targetRegister>
+ </redirectedRegister>
+
+ <redirectedChannel name="LEVEL">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>26</targetChannel>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>14</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
</redirectedChannel>
- <redirectedChannel name="BAM">
+
+ <redirectedChannel name="VREFL">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>23</targetChannel>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>15</targetChannel>
<targetStartIndex>0</targetStartIndex>
<numberOfElements>${pulseLength}</numberOfElements>
</redirectedChannel>
- <redirectedChannel name="BAM_BUNCH_NUMBER">
+
+ </module> <!-- FastProtection -->
+
+% endif # isSincav
+
+ <!--
+ ################################################################################################################
+ -->
+ <module name="Board">
+
+ <redirectedRegister name="FW_BOARD_VER_MAJOR">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>22</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="BCM">
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">floor(x / 2^24) % 256</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
+ </redirectedRegister>
+
+ <redirectedRegister name="FW_BOARD_VER_MINOR">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>29</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- </module>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">floor(x / 2^16) % 256</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
+ </redirectedRegister>
- <module name="PiezoInterface">
-% for M in CRYOMODULES :
- <module name="CryoModule${M}">
-% for C in range(1, NR_OF_CAVITIES+1) :
- <module name="Cavity${C}">
- <redirectedChannel name="PIEZO_SENSE">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <!-- Channel numbering is different in FW and SW, need to swap every pair of 16 bit channels -->
- <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 0}</targetChannel>
- <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 0}</targetChannel> -->
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1984</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="PIEZO_ACTUATOR">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 8}</targetChannel>
- <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 8}</targetChannel> -->
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1984</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="PIEZO_CURRENT">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 16}</targetChannel>
- <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 16}</targetChannel> -->
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1984</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="PIEZO_VOLTAGE">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 24}</targetChannel>
- <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 24}</targetChannel> -->
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1984</numberOfElements>
- </redirectedChannel>
- </module>
-% endfor # cavities
- </module>
-% endfor # cryomodules
-% if int(INTERFACE_REV_CONTROLLER) >= 4307 :
- <module name="HighVoltage">
-% for C in range(0, 8) :
- <redirectedChannel name="Channel${C}">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ1_BUF0</targetRegister>
- <targetChannel>${math.floor(C/2)*2 + ((C+1)%2) + 64}</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1984</numberOfElements>
- </redirectedChannel>
-% endfor # high voltage channels
- </module>
-% endif
- </module>
-
- </module> <!-- ToControlSystem -->
-
- <module name="Controller">
+ <redirectedRegister name="FW_BOARD_VER_PATCH">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">floor(x / 2^8) % 256</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
+ </redirectedRegister>
- <variable name="ilockLatchEnable">
- <value>0</value>
- <type>integer</type>
- </variable>
- <variable name="ilockLatchStatus">
- <value>0</value>
- <type>integer</type>
- </variable>
- <variable name="ilockLatchReset">
- <value>0</value>
- <type>integer</type>
- </variable>
-
- <module name="VectorSum">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>0</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>1</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Output">
- <module name="Proportional">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>4</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>5</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Total">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>6</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>7</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="FeedBack">
- <module name="Gain">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>10</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>11</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="SetPoint">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>8</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>9</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="FeedForward">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>12</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>13</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Error">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>2</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>3</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Status">
- <redirectedRegister name="controllerStatus">
+ <redirectedRegister name="FW_BOARD_VER_COMMIT">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <plugin name="forceReadOnly"/>
+ <targetRegister>BSP.WORD_PRJ_VERSION</targetRegister>
+ <plugin name="math">
+ <parameter name="formula">x % 256</parameter>
+ </plugin>
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
- <constant name="bitmaskForInhibitAlgos">
- <type>uint32</type>
- <value>7</value> <!-- 1+2+4 => ignore outputAmplitudeLimit, controllerLimitI, controllerLimitQ -->
- </constant>
- <redirectedRegister name="intendedPulseLength">
+
+ <redirectedRegister name="fpgaClockError">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0.WORD_PULSE_STOP_TIME</targetRegister>
+ <targetRegister>BSP.WORD_CLK_ERR</targetRegister>
+% if hasMcavVm :
+ <plugin name="math">
+ <parameter name="formula">x or uvmError</parameter>
+ <parameter name="uvmError">/Controller/Board/fpgaClockError_vm</parameter>
+ </plugin>
+% endif
+ <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
</redirectedRegister>
- </module> <!-- Status -->
-
- <module name="VectorModulator">
- <redirectedRegister name="attenuation">
+
+% if hasMcavVm :
+ <redirectedRegister name="fpgaClockError_vm">
+ <targetDevice>VmBoard</targetDevice>
+ <targetRegister>BSP.WORD_CLK_ERROR</targetRegister>
+ </redirectedRegister>
+% endif
+
+% if not isSincav :
+ <redirectedBit name="BOARD_CRYO1_ENA">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>UVM.0.WORD_ATT_VAL</targetRegister>
- <plugin name="math"><parameter name="formula">63 - 4*x</parameter></plugin>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ <targetRegister>APP.WORD_CRYO_MODULE_ENA</targetRegister>
+ <targetBit>0</targetBit>
+ <plugin name="forceReadOnly"/>
+ </redirectedBit>
+
+ <redirectedBit name="BOARD_CRYO2_ENA">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_CRYO_MODULE_ENA</targetRegister>
+ <targetBit>1</targetBit>
+ <plugin name="forceReadOnly"/>
+ </redirectedBit>
+
+% if hasMcavVm :
+ <redirectedRegister name="BOARD_RESET_VMGTP">
+ <targetDevice>VmBoard</targetDevice>
+ <targetRegister>BSP.WORD_GTP_RESET</targetRegister>
+ <plugin name="monostableTrigger">
+ <parameter name="milliseconds">5</parameter>
+ </plugin>
</redirectedRegister>
- </module>
-
- <module name="BeamLoadingCompensation">
- <module name="PulseShape">
- <redirectedRegister name="pulseStopAbsolute">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PULSE_STOP_TIME</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="beamStartAbsolute">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_BEAM_START_TIME</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="beamStopAbsolute">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_BEAM_STOP_TIME</targetRegister>
- </redirectedRegister>
- </module>
- <module name="Rotation">
- <redirectedRegister name="cosineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_ROT_I</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="sineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/WORD_ROT_Q</targetRegister>
- </redirectedRegister>
- </module>
- <redirectedRegister name="userTableI">
+% endif
+
+ <redirectedRegister name="BOARD_RESET_N">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/AREA_I</targetRegister>
+ <targetRegister>BSP.WORD_RESET_N</targetRegister>
+ <plugin name="monostableTrigger">
+ <parameter name="milliseconds">5</parameter>
+ <parameter name="active">0</parameter>
+ <parameter name="inactive">1</parameter>
+ </plugin>
</redirectedRegister>
- <redirectedRegister name="userTableQ">
+
+ <redirectedRegister name="MS_MASTER_MODE">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/AREA_Q</targetRegister>
+ <targetRegister>APP.WORD_MASTER_MODE</targetRegister>
+ <plugin name="forceReadOnly"/>
</redirectedRegister>
- <redirectedBit name="swapTableI">
+
+ <redirectedBit name="PVS_NORM_WITHIN_CRATE">
+ <!-- Note: maybe this register should be removed once the feature is tested and shall be permanently enabled! -->
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/BIT_TABLE_BUF_CTRL</targetRegister>
+ <targetRegister>APP.WORD_PVS_NORM</targetRegister>
<targetBit>0</targetBit>
</redirectedBit>
- <redirectedBit name="swapTableQ">
+
+ <redirectedBit name="PVS_NORM_MASTER_SLAVE">
+ <!-- Note: maybe this register should be removed once the feature is tested and shall be permanently enabled! -->
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BLC.0/BIT_TABLE_BUF_CTRL</targetRegister>
+ <targetRegister>APP.WORD_PVS_NORM</targetRegister>
<targetBit>1</targetBit>
</redirectedBit>
- </module>
-
- </module> <!-- Controller -->
-
-% if int(INTERFACE_REV_CONTROLLER) >= 3323 :
+
+ <module name="DATA_ALIGNMENT">
+ <module name="WITHIN_CRATE">
+ <redirectedRegister name="STATUS">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_ALIGN_CAV_STATUS</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="ARRIVAL_TIME">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_ALIGN_CAV_ARR_MON</targetRegister>
+ </redirectedRegister>
+ </module>
+ <module name="MASTER_SLAVE">
+ <redirectedRegister name="STATUS">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_ALIGN_MS_STATUS</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="ARRIVAL_TIME">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_ALIGN_MS_ARR_MON</targetRegister>
+ </redirectedRegister>
+ </module>
+ </module>
- <module name="ToControlSystem">
-
- <module name="Controller">
+<%
+mapLLL = [
+ "RTM_CH0", "RTM_CH1", "RTM_CH2", "RTM_CH3",
+ "SFP_LCAGE1", "SFP_LCAGE2", "SFP_LCAGE3", "SFP_LCAGE4",
+ "SFP_UCAGE1", "SFP_UCAGE2", "SFP_UCAGE3", "SFP_UCAGE4",
+ "AMC_S8", "AMC_S7", "AMC_S5", "AMC_S6", "AMC_S10", "AMC_S9", "AMC_S12", "AMC_S11",
+ "AMC0", "AMC1", "AMC2", "AMC3",
+ ]
+%>
+% for index, name in enumerate(mapLLL) :
+ <redirectedRegister name="LLL_STATUS_${name}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BSP.WORD_LLL_STATUS</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${index}</targetStartIndex>
+ </redirectedRegister>
+% endfor
- <module name="FirmwareSEUDetection">
- <redirectedRegister name="unrecoverableErrorDetectedRaw">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
- <targetStartIndex>2065</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- <redirectedRegister name="crcErrorSinceFpgaBoot">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
- <targetStartIndex>2066</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- <redirectedRegister name="eccFixedFramesSinceFpgaBoot">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BOARD.0/AREA_BOOT</targetRegister>
- <targetStartIndex>2067</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- </module>
+% endif # not isSincav
- <module name="RfOffFastRamp">
- <redirectedRegister name="enable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_RF_GATE_MODE</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="stepsize">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_RF_GATE_STEP</targetRegister>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="useHardwareRfGate">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_RTM_RF_GATE_ENA</targetRegister>
- </redirectedRegister>
- </module>
+ </module> <!-- Board -->
- </module> <!-- Controller -->
- </module> <!-- ToControlSystem -->
+ </module> <!-- Controller -->
-% endif # firmware revision
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
-% elif INSTANCE_TYPE == InstanceType.sincav :
+% if not isSincav :
- <module name="Controller">
+ <module name="BeamLoadingCompensation">
- <redirectedRegister name="ilockLatchEnable">
+ <redirectedRegister name="ENABLE">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0.WORD_INTERLOCK_LATCHER_ENA</targetRegister>
+ <targetRegister>BLC.BIT_ENA</targetRegister>
</redirectedRegister>
- <redirectedRegister name="ilockLatchStatus">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0.WORD_INTERLOCK_LATCHER_STATUS</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="ilockLatchReset">
+
+ <redirectedRegister name="TABLE.ENA">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0.WORD_INTERLOCK_LATCHER_RESET</targetRegister>
+ <targetRegister>BLC.BIT_TABLE_ENA</targetRegister>
</redirectedRegister>
-%% The fw revision for this switch was 3076 before, but for the HZB firmware at least 3017 already has the new names.
-%% This applies to all switchs with that revision.
-% if int(INTERFACE_REV_CONTROLLER) < 3017 :
-
- <module name="VectorSum">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>0</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>1</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Output">
- <module name="Proportional">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>12</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>13</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Total">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>4</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>5</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="FeedBack">
- <module name="Gain">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>10</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>11</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="SetPoint">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>8</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>9</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="FeedForward">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>6</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>7</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Error">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>2</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>3</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="SamplingScheme">
- <redirectedRegister name="timingDividerTables">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_TIMING_FREQ</targetRegister>
- <targetStartIndex>5</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="timingDividerController">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_DAQ_FREQ</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- </module>
-
-
-% elif int(INTERFACE_REV_CONTROLLER) >= 3017 :
-
- <module name="VectorSum">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>1</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>0</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Output">
- <module name="Proportional">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>9</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>8</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Total">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>13</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>12</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="FeedBack">
- <module name="Gain">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>7</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>6</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
- </module>
-
- <module name="SetPoint">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>3</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>2</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="FeedForward">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>11</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>10</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="Error">
- <module name="DAQ">
- <redirectedChannel name="Q">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>5</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- <redirectedChannel name="I">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>4</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- <plugin name="typeHintModifier"><parameter name="type">float32</parameter></plugin>
- </redirectedChannel>
- </module>
- </module>
-
- <module name="SamplingScheme">
- <redirectedRegister name="timingDividerTables">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>TIMING.0/WORD_DIVIDER_VALUE</targetRegister>
- <targetStartIndex>6</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- <redirectedRegister name="timingDividerController">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>DAQ.0/WORD_STROBE_DIV</targetRegister>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>1</numberOfElements>
- </redirectedRegister>
- </module>
-
-% endif # firmware revision
-
- <module name="Status">
+% for train in range(0,6) :
+ <redirectedBit name="ENABLE.TRAIN_${train+1}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_TRAIN_ENA</targetRegister>
+ <targetBit>${train}</targetBit>
+ </redirectedBit>
+% endfor
- <redirectedRegister name="controllerStatus">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <plugin name="forceReadOnly"/>
- </redirectedRegister>
- <constant name="bitmaskForInhibitAlgos">
- <type>uint32</type>
- <value>30</value> <!-- 2+4+8+16 => ignore FD prelimiter, controller limit I, controller limit Q, output amplitude limit -->
- </constant>
- <variable name="intendedPulseLength">
- <type>uint32</type>
- <value>0</value>
- </variable>
- </module>
+ <redirectedRegister name="X2T_BUNCH_DEST_MASK">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>X2TSDR.WORD_BUNCH_DEST_MASK</targetRegister>
+ </redirectedRegister>
- <module name="VectorModulator">
+ <redirectedRegister name="CHARGE.SOURCE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_SRC</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.PRECOMP.SOURCE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_PRED_SRC</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.THRESHOLD">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_THR</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.KEEP_VALUE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_KEEP_VAL</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.KEEP_PRE_VALUE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_KEEP_PRE_VAL</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.PRECOMP.SELECT">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_CHARGE_PRE_SEL</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.SCALE.SELECT">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_SCALE_SEL</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.SCALE.SINGLE_VALUE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_SCALE_REG</targetRegister>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE.SCALE.PER_BUNCH_SPACING">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_SCALE_TAB</targetRegister>
+ </redirectedRegister>
- <redirectedRegister name="attenuation">
- <targetDevice>(subdevice?type=3regs&device=CtrlBoard&address=${ADCBOARD[0]["RTM_TYPE"]}.0/WORD_ATT_SEL&data=${ADCBOARD[0]["RTM_TYPE"]}.0/WORD_ATT_VAL&status=${ADCBOARD[0]["RTM_TYPE"]}.0/WORD_ATT_STATUS&map=attenuators.map)</targetDevice>
- <targetRegister>CHANNEL8</targetRegister>
- <plugin name="math"><parameter name="formula">63 - 4*x</parameter></plugin>
- <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
- </redirectedRegister>
- </module>
-
- </module> <!-- Controller -->
+ <module name="Limiter">
- <module name="ToControlSystem">
-
- <module name="Configuration">
- <variable name="samplingFrequencyController">
- <type>float64</type>
- <value>0</value>
- </variable>
- </module>
- <module name="Controller">
- <module name="PulseShape">
- <variable name="delay">
- <type>float64</type>
- <value>0</value>
- </variable>
- <variable name="fillingDuration">
- <type>float64</type>
- <value>0</value>
- </variable>
- <variable name="flattopDuration">
- <type>float64</type>
- <value>0</value>
- </variable>
- </module>
+ <module name="Amplitude">
- <module name="FastProtection">
- <redirectedRegister name="ENA">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_ENA_N</targetRegister>
- <plugin name="math">
- <parameter name="formula">not(x)</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedRegister name="LIMIT_HIGH">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_PLEVA</targetRegister>
- <plugin name="math">
- <parameter name="formula">x*65536</parameter>
- </plugin>
- </redirectedRegister>
- <redirectedRegister name="LIMIT_LOW">
+ <redirectedBit name="enable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_PLEVB</targetRegister>
- <plugin name="math">
- <parameter name="formula">x*65536</parameter>
- </plugin>
- </redirectedRegister>
- <redirectedRegister name="SLOPE">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_PLEVS</targetRegister>
- <plugin name="math">
- <parameter name="formula">x*65536</parameter>
- </plugin>
- </redirectedRegister>
+ <targetRegister>BLC.WORD_LIMIT_EN</targetRegister>
+ <targetBit>0</targetBit>
+ </redirectedBit>
- <!-- This does not yet work, see DeviceAccess #186. Below follow the registers needed for the FastProtection
- ApplicationModule which is a work around.
- <redirectedRegister name="START">
+ <redirectedBit name="status">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_T0</targetRegister>
- <plugin name="math">
- <parameter name="formula">(x + delay + filling) * fs</parameter>
- <parameter name="delay">/ToControlSystem/Controller/PulseShape/delay</parameter>
- <parameter name="filling">/ToControlSystem/Controller/PulseShape/fillingDuration</parameter>
- <parameter name="fs">/ToControlSystem/Configuration/samplingFrequencyController</parameter>
- </plugin>
- </redirectedRegister>
- <redirectedRegister name="STOP">
+ <targetRegister>BLC.WORD_LIMIT_STATUS</targetRegister>
+ <targetBit>0</targetBit>
+ </redirectedBit>
+
+ <redirectedRegister name="max">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_T1</targetRegister>
+ <targetRegister>BLC.WORD_AMP_LIMIT</targetRegister>
<plugin name="math">
- <parameter name="formula">(x + delay + filling + flattop) * fs</parameter>
- <parameter name="delay">/ToControlSystem/Controller/PulseShape/delay</parameter>
- <parameter name="filling">/ToControlSystem/Controller/PulseShape/fillingDuration</parameter>
- <parameter name="flattop">/ToControlSystem/Controller/PulseShape/flattopDuration</parameter>
- <parameter name="fs">/ToControlSystem/Configuration/samplingFrequencyController</parameter>
+ <parameter name="formula">x*bitScaling</parameter>
+ <parameter name="bitScaling">/Configuration/bitScaling</parameter>
+ <parameter name="enable_push_parameters"/>
</plugin>
</redirectedRegister>
- -->
- <redirectedRegister name="WORD_PROT_T0">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_T0</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="WORD_PROT_T1">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_T1</targetRegister>
- </redirectedRegister>
-
- <redirectedRegister name="THRESHOLD">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_PROT_FL_ENA</targetRegister>
- </redirectedRegister>
- <redirectedChannel name="LEVEL">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>14</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
- <redirectedChannel name="VREFL">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/DAQ0_BUF0</targetRegister>
- <targetChannel>15</targetChannel>
- <targetStartIndex>0</targetStartIndex>
- <numberOfElements>${pulseLength}</numberOfElements>
- </redirectedChannel>
</module>
- <module name="Status">
- <redirectedBit name="limiters">
+ <module name="Phase">
+
+ <redirectedBit name="enable">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>0</targetBit>
- <plugin name="forceReadOnly"/>
+ <targetRegister>BLC.WORD_LIMIT_EN</targetRegister>
+ <targetBit>1</targetBit>
</redirectedBit>
- <redirectedBit name="prelimiters">
+
+ <redirectedBit name="statusMax">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
+ <targetRegister>BLC.WORD_LIMIT_STATUS</targetRegister>
<targetBit>1</targetBit>
- <plugin name="forceReadOnly"/>
</redirectedBit>
- <redirectedBit name="controllerLimitI">
+
+ <redirectedBit name="statusMin">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
+ <targetRegister>BLC.WORD_LIMIT_STATUS</targetRegister>
<targetBit>2</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="controllerLimitQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>3</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="outputAmplitudeLimit">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>4</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="feedForwardSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>5</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="feedForwardSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>6</targetBit>
- <plugin name="forceReadOnly"/>
</redirectedBit>
- <redirectedBit name="offsetCompensationSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>7</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="offsetCompensationSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>8</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="gainSaturationI">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>9</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="gainSaturationQ">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>10</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedRegister name="saturation">
- <targetDevice>this</targetDevice>
- <targetRegister>/ToControlSystem/Controller/Status/feedForwardSaturationI</targetRegister>
- <plugin name="forceReadOnly"/>
- <plugin name="math">
- <parameter name="formula">x | FFQ | OCI | GCI | GCQ</parameter>
- <parameter name="FFQ">/ToControlSystem/Controller/Status/feedForwardSaturationQ</parameter>
- <parameter name="OCI">/ToControlSystem/Controller/Status/offsetCompensationSaturationI</parameter>
- <parameter name="OCQ">/ToControlSystem/Controller/Status/offsetCompensationSaturationQ</parameter>
- <parameter name="GCI">/ToControlSystem/Controller/Status/gainSaturationI</parameter>
- <parameter name="GCQ">/ToControlSystem/Controller/Status/gainSaturationQ</parameter>
- </plugin>
- <plugin name="typeHintModifier"><parameter name="type">int32</parameter></plugin>
- </redirectedRegister>
- <redirectedBit name="fastProtectionActive">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>11</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedBit name="interlockLatcher">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>APP.0/WORD_STATUS</targetRegister>
- <targetBit>12</targetBit>
- <plugin name="forceReadOnly"/>
- </redirectedBit>
- <redirectedRegister name="externalInterlock">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>${ADCBOARD[0]["RTM_TYPE"]}.0/WORD_EXT_INTERLOCK</targetRegister>
- </redirectedRegister>
- </module>
- </module> <!-- ToControlSystem/Controller-->
-
-% if HAS_BEAM_BASED_FEEDBACK :
- <module name="BeamBasedFeedback">
- <redirectedRegister name="ENA_0">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BBFSC_ENA</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="BAM_THRESHOLD">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BAM_THR</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="BAM_SP_0">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BAM_SP</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="KP_I">
+ <redirectedRegister name="maxCosine">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BAM_KP_I</targetRegister>
+ <targetRegister>BLC.WORD_COS_PHA_MAX</targetRegister>
</redirectedRegister>
- <redirectedRegister name="KP_Q">
+ <redirectedRegister name="maxSine">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BAM_KP_Q</targetRegister>
+ <targetRegister>BLC.WORD_SIN_PHA_MAX</targetRegister>
</redirectedRegister>
- <redirectedRegister name="BUNCH_SPACE">
+
+ <redirectedRegister name="minCosine">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>BBFSC.0/WORD_BUNCH_SPACE</targetRegister>
+ <targetRegister>BLC.WORD_COS_PHA_MIN</targetRegister>
</redirectedRegister>
- <redirectedRegister name="SPC.ENA">
+ <redirectedRegister name="minSine">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>CTRL.0/BIT_SP_CORR_ENA</targetRegister>
+ <targetRegister>BLC.WORD_SIN_PHA_MIN</targetRegister>
</redirectedRegister>
+
</module>
-% endif BBF
- </module> <!-- ToControlSystem -->
+ </module>
-% endif # server type
+ <module name="PulseShape">
+ <redirectedRegister name="pulseStopAbsolute">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_PULSE_STOP_TIME</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="beamStartAbsolute">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_BEAM_START_TIME</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="beamStopAbsolute">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.WORD_BEAM_STOP_TIME</targetRegister>
+ </redirectedRegister>
+ </module>
-%% This fw revision switch seems to be an exception, 3017 has not yet the new interface!
-% if int(INTERFACE_REV_CONTROLLER) < 3076 :
+ <module name="Rotation">
+ <redirectedRegister name="cosineTable">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_ROT_I</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="sineTable">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.WORD_ROT_Q</targetRegister>
+ </redirectedRegister>
+ </module>
- <module name="Controller">
+ <redirectedRegister name="userTableI">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.AREA_I</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="userTableQ">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.AREA_Q</targetRegister>
+ </redirectedRegister>
+ <redirectedBit name="swapTableI">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.BIT_TABLE_BUF_CTRL</targetRegister>
+ <targetBit>0</targetBit>
+ </redirectedBit>
+ <redirectedBit name="swapTableQ">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BLC.BIT_TABLE_BUF_CTRL</targetRegister>
+ <targetBit>1</targetBit>
+ </redirectedBit>
<module name="Output">
- <module name="Calibration">
- <redirectedRegister name="sineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_ROT_IM</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="cosineTable">
- <targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OUTPUT.0/WORD_ROT_RE</targetRegister>
- </redirectedRegister>
- </module>
+
+ <redirectedChannel name="I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>16</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+
+ <redirectedChannel name="Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>15</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+
</module>
- </module>
+ <redirectedChannel name="TOROID">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>19</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="TOROID_BUNCH_NUMBER">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>18</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BPM_CHARGE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>21</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BPM_BUNCH_NUMBER">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>20</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
-% else : # firmware revision
+ </module> <!-- BeamLoadingCompensation -->
- <module name="Controller">
+% endif # not isSincav
- <module name="Output">
- <module name="Calibration">
- <redirectedRegister name="sineTable">
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+% if not isSincav :
+
+ <module name="BeamBasedFeedback">
+% for ft in range(0,4) :
+ <redirectedBit name="ENA_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_ENABLE</targetRegister>
+ <targetBit>${ft}</targetBit>
+ </redirectedBit>
+ <redirectedRegister name="MATRIX.A11_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_MAT_A11</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="MATRIX.A12_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_MAT_A12</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="MATRIX.A21_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_MAT_A21</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="MATRIX.A22_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_MAT_A22</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="AMPL.LIMIT_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_AMP_LIMIT</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="math">
+ <parameter name="formula">x*bitScaling</parameter>
+ <parameter name="bitScaling">/Configuration/bitScaling</parameter>
+ <parameter name="enable_push_parameters"/>
+ </plugin>
+ </redirectedRegister>
+ <redirectedRegister name="PHASE.LIMIT_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_PHA_LIMIT</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="math">
+ <parameter name="formula">x*131072*2./360.</parameter>
+ </plugin>
+ </redirectedRegister>
+ <redirectedRegister name="BAM_SP_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_BAM_SP</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ </redirectedRegister>
+ <redirectedRegister name="GAIN_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_GAIN</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ <plugin name="typeHintModifier"><parameter name="type">float64</parameter></plugin>
+ </redirectedRegister>
+ <redirectedRegister name="BCM_SP_${ft}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_BCM_SP</targetRegister>
+ <numberOfElements>1</numberOfElements>
+ <targetStartIndex>${ft}</targetStartIndex>
+ </redirectedRegister>
+% endfor
+
+ <redirectedRegister name="CHARGE_DELAY">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_CHARGE_DELAY</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE_THRESHOLD">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_CHARGE_THR</targetRegister>
+ </redirectedRegister>
+ <redirectedRegister name="CHARGE_GATE_MODE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBF.WORD_CHARGE_GATE_MODE</targetRegister>
+ </redirectedRegister>
+
+ <redirectedChannel name="OUT.I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>3</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="OUT.Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>2</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="IN.I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>17</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="IN.Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>16</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BEAM_ACTIVE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>26</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BAM">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>23</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BAM_BUNCH_NUMBER">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>22</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="BCM">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ0_BUF0</targetRegister>
+ <targetChannel>29</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>${pulseLength}</numberOfElements>
+ </redirectedChannel>
+ </module> <!-- BeamBasedFeedback -->
+
+% endif # not isSincav
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+% if isSincav and HAS_BEAM_BASED_FEEDBACK :
+
+ <module name="BeamBasedFeedback">
+
+ <redirectedRegister name="ENA_0">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BBFSC_ENA</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="BAM_THRESHOLD">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BAM_THR</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="BAM_SP_0">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BAM_SP</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="KP_I">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BAM_KP_I</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="KP_Q">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BAM_KP_Q</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="BUNCH_SPACE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>BBFSC.WORD_BUNCH_SPACE</targetRegister>
+ </redirectedRegister>
+
+ <redirectedRegister name="SPC.ENA">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>CTRL.BIT_SP_CORR_ENA</targetRegister>
+ </redirectedRegister>
+
+ </module> <!-- BeamBasedFeedback -->
+
+% endif # isSincav and HAS_BEAM_BASED_FEEDBACK
+
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
+
+% if not isSincav :
+
+ <module name="PiezoInterface">
+
+% for M in CRYOMODULES :
+ <module name="CryoModule${M}">
+% for C in range(1, NR_OF_CAVITIES+1) :
+ <module name="Cavity${C}">
+ <redirectedChannel name="PIEZO_SENSE">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OVC.0/WORD_ROT_IM</targetRegister>
- </redirectedRegister>
- <redirectedRegister name="cosineTable">
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <!-- Channel numbering is different in FW and SW, need to swap every pair of 16 bit channels -->
+ <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 0}</targetChannel>
+ <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 0}</targetChannel> -->
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1984</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="PIEZO_ACTUATOR">
<targetDevice>CtrlBoard</targetDevice>
- <targetRegister>OVC.0/WORD_ROT_RE</targetRegister>
- </redirectedRegister>
- </module>
- </module>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 8}</targetChannel>
+ <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 8}</targetChannel> -->
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1984</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="PIEZO_CURRENT">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 16}</targetChannel>
+ <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 16}</targetChannel> -->
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1984</numberOfElements>
+ </redirectedChannel>
+ <redirectedChannel name="PIEZO_VOLTAGE">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>${((M-1) % 2)*32 + ( math.floor((C-1)/2)*2 + (C%2) ) + 24}</targetChannel>
+ <!-- original mapping without swap: <targetChannel>${((M-1) % 2)*32 + (C-1) + 24}</targetChannel> -->
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1984</numberOfElements>
+ </redirectedChannel>
+ </module> <!-- Cavity${C} -->
+% endfor # cavities
+ </module> <!-- CryoModule${M} -->
+% endfor # cryomodules
+
+ <module name="HighVoltage">
+% for C in range(0, 8) :
+ <redirectedChannel name="Channel${C}">
+ <targetDevice>CtrlBoard</targetDevice>
+ <targetRegister>APP.DAQ1_BUF0</targetRegister>
+ <targetChannel>${math.floor(C/2)*2 + ((C+1)%2) + 64}</targetChannel>
+ <targetStartIndex>0</targetStartIndex>
+ <numberOfElements>1984</numberOfElements>
+ </redirectedChannel>
+% endfor # high voltage channels
+ </module> <!-- HighVoltage -->
+
+ </module> <!-- PiezoInterface -->
- </module>
+% endif # not isSincav
-% endif # firmware revision
+ <!--
+ ##################################################################################################################
+ ##################################################################################################################
+ -->
</logicalNameMap>
diff --git a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/sincav_sis8300ku_regae_r4401.mapp b/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/sincav_sis8300ku_regae_r4401.mapp
deleted file mode 100644
index 26b88d3..0000000
--- a/llrfctrl6-epics/templates/iocBoot/iocChimeraTKApp/sincav_sis8300ku_regae_r4401.mapp
+++ /dev/null
@@ -1,601 +0,0 @@
-@MAPFILE_REVISION 4401
-APP.0.WORD_FIRMWARE 1 0 4 1 32 0 0 RO
-APP.0.WORD_REVISION 1 4 4 1 32 0 0 RO
-APP.0.WORD_TIMESTAMP 1 8 4 1 32 0 0 RO
-APP.0.WORD_USER 1 12 4 1 32 0 0 RW
-APP.0.WORD_STATUS 1 32 4 1 32 0 0 RW
-APP.0.WORD_ADC_OV_TIME 10 40 40 1 18 0 0 RO
-APP.0.WORD_ADC_OV_LATCH 1 104 4 1 10 0 0 RO
-APP.0.MISC_TIMING 128 2048 512 1 32 0 0 RW
-TIMING.0.WORD_ENABLE 1 2048 4 1 8 0 0 RW
-TIMING.0.WORD_SOURCE_SEL 8 2080 32 1 8 0 0 RW
-TIMING.0.WORD_SYNC_SEL 8 2112 32 1 8 0 0 RW
-TIMING.0.WORD_DIVIDER_VALUE 8 2144 32 1 32 0 0 RW
-TIMING.0.WORD_TRIGGER_CNT 8 2176 32 1 32 0 0 RO
-TIMING.0.WORD_EXT_TRIGGER_CNT 8 2208 32 1 32 0 0 RO
-TIMING.0.WORD_DELAY_ENABLE 8 2240 32 1 1 0 0 RW
-TIMING.0.WORD_DELAY_VALUE 8 2272 32 1 32 0 0 RW
-TIMING.0.WORD_MANUAL_TRG 8 2304 32 1 1 0 0 RW
-APP.0.MISC_DAQ 6144 32768 24576 1 32 0 0 RW
-DAQ.0.WORD_FIRMWARE 1 32768 4 1 32 0 0 RO
-DAQ.0.WORD_REVISION 1 32772 4 1 32 0 0 RO
-DAQ.0.WORD_CAPABILITIES 1 32776 4 1 32 0 0 RO
-DAQ.0.WORD_ENABLE 1 32780 4 1 3 0 0 RW
-DAQ.0.WORD_MUX_SEL 3 32784 12 1 8 0 0 RW
-DAQ.0.WORD_STROBE_DIV 3 32796 12 1 32 0 0 RW
-DAQ.0.WORD_STROBE_COUNT 3 32808 12 1 32 0 0 RO
-DAQ.0.WORD_SAMPLES 3 32820 12 1 32 0 0 RW
-DAQ.0.WORD_DUB_BUF_ENA 3 32832 12 1 1 0 0 RW
-DAQ.0.WORD_DUB_BUF_CURR 3 32844 12 1 1 0 0 RO
-DAQ.0.WORD_DUB_BUF_PNUM 3 32856 12 1 32 0 0 RO
-DAQ.0.WORD_FIFO_STATUS 3 32868 12 1 32 0 0 RO
-DAQ.0.WORD_SENT_BURST_CNT 3 32880 12 1 32 0 0 RO
-DAQ.0.WORD_TRG_DELAY_VAL 3 32892 12 1 32 0 0 RW
-DAQ.0.WORD_TRG_DELAY_ENA 3 32904 12 1 1 0 0 RW
-DAQ.0.WORD_TRG_CNT_BUF0 3 32916 12 1 16 0 0 RO
-DAQ.0.WORD_TRG_CNT_BUF1 3 32928 12 1 16 0 0 RO
-DAQ.0.WORD_TIMESTAMP_RST 3 32940 12 1 1 0 0 RW
-DAQ.0.AREA_DAQ_TIMES_0 1024 36864 4096 1 32 0 0 RO
-DAQ.0.AREA_DAQ_TIMES_1 1024 40960 4096 1 32 0 0 RO
-DAQ.0.AREA_DAQ_TIMES_2 1024 49152 4096 1 32 0 0 RO
-APP.0.WORD_SW_TRG 1 144 4 1 1 0 0 RW
-APP.0.WORD_X2_MACROPULSE_NR 2 440 8 1 32 0 0 RO
-APP.0.WORD_X2_TIMESTAMP 2 448 8 1 32 0 0 RO
-APP.0.WORD_MLVDS_I 1 512 4 1 8 0 0 RO
-APP.0.WORD_MLVDS_O 1 516 4 1 8 0 0 RW
-APP.0.WORD_MLVDS_OE 1 520 4 1 8 0 0 RW
-APP.0.WORD_MLVDS_IDELAY_VAL 12 544 48 1 6 0 0 RW
-APP.0.WORD_MLVDS_TRG_OE 1 592 4 1 8 0 0 RW
-APP.0.BIT_DAC_MEM_ENA 1 1184 4 1 1 0 0 RW
-APP.0.WORD_DAC_MEM_MODE 1 1188 4 1 2 0 0 RW
-APP.0.AREA_DAC_I_MEM 1024 4096 4096 1 16 0 1 RW
-APP.0.AREA_DAC_Q_MEM 1024 8192 4096 1 16 0 1 RW
-APP.0.WORD_PROT_PLEVA 1 1200 4 1 18 0 1 RW
-APP.0.WORD_PROT_PLEVB 1 1204 4 1 18 0 1 RW
-APP.0.WORD_PROT_PLEVS 1 1208 4 1 18 0 1 RW
-APP.0.WORD_PROT_T0 1 1212 4 1 18 0 0 RW
-APP.0.WORD_PROT_T1 1 1216 4 1 18 0 0 RW
-APP.0.WORD_PROT_FL_ENA 1 1220 4 1 18 0 0 RW
-APP.0.WORD_PROT_ENA_N 1 1224 4 1 1 0 0 RW
-APP.0.VAR_C_RTM_TYPE 1024 1044480 4096 1 32 0 0 RW
-DWC8VM1.0.WORD_FIRMWARE 1 1044480 4 1 32 0 0 RO
-DWC8VM1.0.WORD_REVISION 1 1044484 4 1 32 0 0 RO
-DWC8VM1.0.WORD_RF_PERMIT 1 1044512 4 1 1 0 0 RW
-DWC8VM1.0.WORD_ATT_SEL 1 1044516 4 1 10 0 0 RW
-DWC8VM1.0.WORD_ATT_VAL 1 1044520 4 1 6 0 0 RW
-DWC8VM1.0.WORD_ATT_STATUS 1 1044524 4 1 1 0 0 RO
-DWC8VM1.0.WORD_ADC_STATUS 1 1044544 4 1 4 0 0 RO
-DWC8VM1.0.WORD_ADC_A 1 1044548 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_B 1 1044552 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_C 1 1044556 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_D 1 1044560 4 1 25 0 1 RO
-DWC8VM1.0.WORD_ADC_RD_ENA 1 1044564 4 1 4 0 0 RW
-DWC8VM1.0.WORD_DACAB 1 1044576 4 1 12 0 0 RW
-DWC8VM1.0.WORD_DAC_STATUS 1 1044580 4 1 4 0 0 RO
-DWC8VM1.0.WORD_DAC 2 1044584 8 1 12 0 0 RW
-DWC8VM1.0.WORD_HYT271_TEMP 1 1044608 4 1 14 0 0 RO
-DWC8VM1.0.WORD_HYT271_HUMI 1 1044612 4 1 14 0 0 RO
-DWC8VM1.0.WORD_HYT271_RD_ENA 1 1044616 4 1 1 0 0 RW
-DWC8VM1.0.WORD_EXT_INTERLOCK 1 1044620 4 1 1 0 0 RO
-APP.0.EXT_DCM 2097152 8388608 8388608 1 32 0 0 RW
-DCM.0.WORD_FIRMWARE_DCM 1 8388608 4 1 32 0 0 RO
-DCM.0.WORD_VERSION_DCM 1 8388612 4 1 32 0 0 RO
-DCM.0.WORD_DCM_AVG_AMP 1 8388616 4 1 18 0 1 RO
-DCM.0.WORD_DCM_AVG_CNT 1 8388620 4 1 16 0 0 RO
-DCM.0.WORD_DCM_AMP_SCA 10 8388624 40 1 18 0 1 RW
-DCM.0.WORD_DCM_PHASE_OFS 10 8388664 40 1 18 0 1 RW
-DCM.0.WORD_DCM_IQ_AVG_POINTS 1 8388704 4 1 4 0 0 RW
-DCM.0.WORD_DCM_A0 10 8388708 40 1 18 0 1 RO
-DCM.0.WORD_DCM_P0 10 8388748 40 1 18 0 1 RO
-DCM.0.WORD_DCM_DIV_A0 10 8388788 40 1 18 0 1 RO
-DCM.0.WORD_DCM_MUL_A0 10 8388828 40 1 18 0 1 RO
-DCM.0.WORD_DCM_ROT_RE 10 8388868 40 1 18 0 1 RO
-DCM.0.WORD_DCM_ROT_IM 10 8388908 40 1 18 0 1 RO
-DCM.0.WORD_DCM_LIMIT_A 10 8388948 40 1 16 0 0 RW
-DCM.0.WORD_DCM_LIMIT_P 10 8388988 40 1 18 0 1 RW
-DCM.0.WORD_DCM_LIMIT_A_ST 1 8389028 4 1 10 0 0 RO
-DCM.0.WORD_DCM_LIMIT_P_ST 1 8389032 4 1 10 0 0 RO
-DCM.0.WORD_DCM_RX_ERR_CNT 1 8389088 4 1 8 0 0 RW
-DCM.0.WORD_LLL_II_ERR_CNT 1 8389092 4 1 8 0 0 RW
-DCM.0.APP_TMCB_DCM2 1048576 12582912 4194304 1 32 0 0 RW
-TMCB_DCM2.0.WORD_FIRMWARE 1 12582912 4 1 32 0 0 RO
-TMCB_DCM2.0.WORD_REVISION 1 12582916 4 1 32 0 0 RO
-TMCB_DCM2.0.WORD_TIMESTAMP 1 12582920 4 1 32 0 0 RO
-TMCB_DCM2.0.WORD_RESET_DCM_N 1 12582924 4 1 1 0 0 RW
-TMCB_DCM2.0.WORD_TEMP 4 12582928 16 1 16 0 0 RO
-TMCB_DCM2.0.WORD_TEC 4 12582944 16 1 14 0 0 RW
-TMCB_DCM2.0.WORD_DET_ENA_N 1 12582964 4 1 1 0 0 RW
-TMCB_DCM2.0.WORD_DCM_MODE_A 1 12582968 4 1 8 0 0 RW
-TMCB_DCM2.0.WORD_DCM_MODE_B 1 12582972 4 1 8 0 0 RW
-TMCB_DCM2.0.WORD_ATT_A 8 12582976 32 1 6 0 0 RW
-TMCB_DCM2.0.WORD_ATT_B 8 12583008 32 1 6 0 0 RW
-TMCB_DCM2.0.WORD_ATT_STATUS 1 12583176 4 1 2 0 0 RO
-TMCB_DCM2.0.WORD_REF_ON_A 1 12583040 4 1 8 0 0 RW
-TMCB_DCM2.0.WORD_REF_ON_B 1 12583044 4 1 8 0 0 RW
-TMCB_DCM2.0.WORD_MASTER_TRG_SEL 1 12583048 4 1 1 0 0 RW
-TMCB_DCM2.0.WORD_AMP_REF 1 12583052 4 1 32 0 0 RO
-TMCB_DCM2.0.WORD_AMP_REF_CNT 1 12583056 4 1 16 0 0 RO
-TMCB_DCM2.0.WORD_TIMING_CNT 4 12583104 16 1 32 0 0 RW
-TMCB_DCM2.0.WORD_HYT271_1_HUMI 1 12583152 4 1 14 0 0 RO
-TMCB_DCM2.0.WORD_HYT271_1_TEMP 1 12583156 4 1 14 0 0 RO
-TMCB_DCM2.0.WORD_HYT271_2_HUMI 1 12583160 4 1 14 0 0 RO
-TMCB_DCM2.0.WORD_HYT271_2_TEMP 1 12583164 4 1 14 0 0 RO
-TMCB_DCM2.0.WORD_LLL_CRC_ERR_CNT 2 12583168 8 1 16 0 0 RO
-TMCB_DCM2.0.WORD_GPIO_TEST_MODE 1 12583192 4 1 1 0 0 RW
-TMCB_DCM2.0.WORD_GPIO_TEST_O 1 12583196 4 1 20 0 0 RW
-TMCB_DCM2.0.WORD_GPIO_TEST_OE 1 12583200 4 1 20 0 0 RW
-TMCB_DCM2.0.WORD_GPIO_TEST_I 1 12583204 4 1 20 0 0 RO
-TMCB_DCM2.0.FMC_TC4 256 12583936 1024 1 32 0 0 RW
-TC4.0.WORD_FIRMWARE 1 12583936 4 1 32 0 0 RO
-TC4.0.WORD_REVISION 1 12583940 4 1 32 0 0 RO
-TC4.0.WORD_TEC_ENA 1 12583944 4 1 4 0 0 RW
-TC4.0.WORD_TEC_SETP 4 12583948 16 1 16 0 0 RW
-TC4.0.WORD_TEC_SETP_BUSY 1 12583964 4 1 1 0 0 RO
-TC4.0.WORD_TEC_TEMP 4 12583968 16 1 12 0 0 RO
-TC4.0.WORD_TEC_ITEC 4 12583984 16 1 12 0 0 RO
-TC4.0.WORD_TEC_OVT_N 1 12584000 4 1 4 0 0 RO
-TC4.0.WORD_TEC_UDT_N 1 12584004 4 1 4 0 0 RO
-TC4.0.WORD_LM75A_TEMP 1 12584008 4 1 9 0 0 RO
-TC4.0.WORD_HYT221_HUMI 1 12584012 4 1 14 0 0 RO
-TC4.0.WORD_HYT221_TEMP 1 12584016 4 1 14 0 0 RO
-TC4.0.WORD_3V3_ENA 1 12584020 4 1 1 0 0 RW
-TC4.0.WORD_REF_ENA 1 12584024 4 1 1 0 0 RW
-TC4.0.WORD_5V_ENA 1 12584028 4 1 1 0 0 RW
-TC4.0.WORD_5V_PGOOD 1 12584032 4 1 1 0 0 RO
-TC4.0.WORD_3V3_PGOOD 1 12584036 4 1 1 0 0 RO
-TC4.0.WORD_EXT_GPIO_O 1 12584040 4 1 3 0 0 RW
-TC4.0.WORD_EXT_GPIO_I 1 12584044 4 1 3 0 0 RO
-TC4.0.WORD_EXT_GPIO_DIR 1 12584048 4 1 3 0 0 RW
-TC4.0.WORD_CUR_MON_ENA 1 12584052 4 1 1 0 0 RW
-TC4.0.WORD_CUR_MON_OVLOAD_N 1 12584056 4 1 1 0 0 RO
-TC4.0.WORD_TC4_RESET_N 1 12584060 4 1 3 0 0 RW
-TC4.0.WORD_TIMER 1 12584064 4 1 32 0 0 RW
-TMCB_DCM2.0.BOARD_TMCB2 65536 12582912 262144 1 32 0 0 RW
-TMCB2.0.WORD_FIRMWARE 1 12845056 4 1 32 0 0 RO
-TMCB2.0.WORD_REVISION 1 12845060 4 1 32 0 0 RO
-TMCB2.0.WORD_TIMESTAMP 1 12845064 4 1 32 0 0 RO
-TMCB2.0.WORD_STATUS 1 12845068 4 1 32 0 0 RO
-TMCB2.0.WORD_USER 1 12845120 4 1 32 0 0 RW
-TMCB2.0.WORD_CLK_FREQ 4 12845256 16 1 32 0 0 RO
-TMCB2.0.WORD_LLL_STATUS 4 12845272 16 1 32 0 0 RO
-TMCB2.0.WORD_LLL_II_ERR_CNT 2 12845288 8 1 8 0 0 RW
-TMCB2.0.WORD_DAC1_RESET 1 12845304 4 1 1 0 0 RW
-TMCB2.0.WORD_DAC2_RESET 1 12845308 4 1 1 0 0 RW
-TMCB2.0.WORD_DAC3_RESET 1 12845312 4 1 1 0 0 RW
-TMCB2.0.AREA_TMCB2_APP 65536 12582912 262144 1 32 0 0 RW
-TMCB2.0.AREA_BOOT 16384 12910592 65536 1 32 0 0 RW
-APP.0.LLRF_FD 16384 8323072 65536 1 32 0 0 RW
-FD.0.WORD_FIRMWARE 1 8323072 4 1 32 0 0 RO
-FD.0.WORD_REVISION 1 8323084 4 1 32 0 0 RO
-FD.0.WORD_IQ_COS 40 8325120 160 1 18 16 1 RW
-FD.0.WORD_IQ_SIN 40 8327168 160 1 18 16 1 RW
-FD.0.WORD_IQ_SYNC_MODE 1 8323200 4 1 1 0 0 RW
-FD.0.WORD_DEC_FACTOR 8 8323760 32 1 16 0 0 RW
-FD.0.WORD_DEC_PARAM_EN 1 8323800 4 1 8 0 0 RW
-FD.0.WORD_DEC_MODE 1 8323804 4 1 8 0 0 RW
-FD.0.WORD_IIR_COEF0 5 8331264 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF1 5 8331296 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF2 5 8331328 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF3 5 8331360 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF4 5 8331392 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF5 5 8331424 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF6 5 8331456 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF7 5 8331488 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF8 5 8331520 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF9 5 8331552 20 1 25 16 1 RW
-FD.0.WORD_IIR_COEF_VALID 1 8331584 4 1 1 0 0 RW
-FD.0.WORD_ROT_CH_ENA 1 8323580 4 1 8 0 0 RW
-FD.0.WORD_VS_SHIFT 1 8323584 4 1 3 0 0 RW
-FD.0.WORD_VS_CH_ENA 1 8323588 4 1 8 0 0 RW
-FD.0.WORD_AMP_LIMIT 8 8323596 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_ACTIVE 1 8323592 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_DISABLE 1 8323680 4 1 8 0 0 RW
-FD.0.WORD_AMP_LIMIT_PRE 8 8323640 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_PRE_ACTIVE 1 8323636 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_TRG 8 8323684 32 1 18 0 1 RW
-FD.0.WORD_AMP_LIMIT_TRG_ACTIVE 1 8323724 4 1 8 0 0 RO
-FD.0.WORD_AMP_LIMIT_TRG_DISABLE 1 8323728 4 1 8 0 0 RW
-APP.0.LLRF_CTRL 16384 8257536 65536 1 32 0 0 RW
-CTRL.0.WORD_FIRMWARE 1 8257536 4 1 32 0 0 RO
-CTRL.0.WORD_REVISION 1 8257540 4 1 32 0 0 RO
-CTRL.0.WORD_CAPABILITIES 1 8257544 4 1 32 0 0 RO
-CTRL.0.WORD_PROPERTIES 1 8257548 4 1 32 0 0 RO
-CTRL.0.WORD_STATUS 1 8257552 4 1 32 0 0 RO
-CTRL.0.WORD_VS_ROT_RE 1 8257556 4 1 18 16 1 RW
-CTRL.0.WORD_VS_ROT_IM 1 8257560 4 1 18 16 1 RW
-CTRL.0.BIT_SP_CORR_ENA 1 8257564 4 1 1 0 0 RW
-CTRL.0.BIT_ERR_CORR_ENA 1 8257568 4 1 1 0 0 RW
-CTRL.0.BIT_FB_ENA 1 8257572 4 1 1 0 0 RW
-CTRL.0.BIT_FB_INT_ENA 1 8257576 4 1 1 0 0 RW
-CTRL.0.BIT_FF_ENA 1 8257580 4 1 1 0 0 RW
-CTRL.0.BIT_FF_CORR_ENA 1 8257584 4 1 1 0 0 RW
-CTRL.0.WORD_MIMO_A11 2 8257588 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A12 2 8257596 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A21 2 8257604 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_A22 2 8257612 8 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B11 3 8257620 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B12 3 8257632 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B21 3 8257644 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_B22 3 8257656 12 1 18 16 1 RW
-CTRL.0.WORD_MIMO_ENA 1 8257668 4 1 1 0 0 RW
-CTRL.0.WORD_MIMO_COEF_VALID 1 8257672 4 1 1 0 0 RW
-CTRL.0.WORD_CNTRL_I_LIMIT 1 8257676 4 1 18 0 1 RW
-CTRL.0.WORD_CNTRL_Q_LIMIT 1 8257680 4 1 18 0 1 RW
-CTRL.0.WORD_SMITH_A11 2 8257684 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A12 2 8257692 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A21 2 8257700 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_A22 2 8257708 8 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B11 3 8257716 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B12 3 8257728 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B21 3 8257740 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_B22 3 8257752 12 1 18 16 1 RW
-CTRL.0.WORD_SMITH_COEF_VALID 1 8257764 4 1 1 0 0 RW
-CTRL.0.WORD_SMITH_ENA 1 8257768 4 1 1 0 0 RW
-CTRL.0.WORD_SMITH_DELAY 1 8257772 4 1 18 0 0 RW
-CTRL.0.WORD_MIMO_O4_A11_MSB 4 8257776 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A11_LSB 4 8257792 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A12_MSB 4 8257808 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A12_LSB 4 8257824 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A21_MSB 4 8257840 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A21_LSB 4 8257856 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_A22_MSB 4 8257872 16 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_A22_LSB 4 8257888 16 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B11_MSB 5 8257904 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B11_LSB 5 8257924 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B12_MSB 5 8257944 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B12_LSB 5 8257964 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B21_MSB 5 8257984 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B21_LSB 5 8258004 20 1 32 0 0 RW
-CTRL.0.WORD_MIMO_O4_B22_MSB 5 8258024 20 1 3 0 0 RW
-CTRL.0.WORD_MIMO_O4_B22_LSB 5 8258044 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A11_MSB 4 8258064 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A11_LSB 4 8258080 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A12_MSB 4 8258096 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A12_LSB 4 8258112 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A21_MSB 4 8258128 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A21_LSB 4 8258144 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_A22_MSB 4 8258160 16 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_A22_LSB 4 8258176 16 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B11_MSB 5 8258192 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B11_LSB 5 8258212 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B12_MSB 5 8258232 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B12_LSB 5 8258252 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B21_MSB 5 8258272 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B21_LSB 5 8258292 20 1 32 0 0 RW
-CTRL.0.WORD_SMITH_O4_B22_MSB 5 8258312 20 1 3 0 0 RW
-CTRL.0.WORD_SMITH_O4_B22_LSB 5 8258332 20 1 32 0 0 RW
-APP.0.LLRF_OVC 64 8192000 256 1 32 0 0 RW
-OVC.0.WORD_FIRMWARE 1 8192000 4 1 32 0 0 RO
-OVC.0.WORD_REVISION 1 8192004 4 1 32 0 0 RO
-OVC.0.WORD_STATUS 1 8192012 4 1 2 0 0 RO
-OVC.0.WORD_ROT_RE 1 8192016 4 1 18 16 1 RW
-OVC.0.WORD_ROT_IM 1 8192020 4 1 18 16 1 RW
-OVC.0.WORD_GAIN_CORR 1 8192024 4 1 18 16 1 RW
-APP.0.LLRF_PREDISTORTER 49152 8388608 196608 1 32 0 0 RW
-PREDISTORTER.0.WORD_FIRMWARE 1 8388608 4 1 32 0 0 RO
-PREDISTORTER.0.WORD_REVISION 1 8388612 4 1 32 0 0 RO
-PREDISTORTER.0.WORD_CAPABILITIES 2 8388616 8 1 32 0 0 RO
-PREDISTORTER.0.BIT_PREDISTORTER_ENA 1 8388640 4 1 1 0 0 RW
-PREDISTORTER.0.WORD_PREDISTORTER_A2 1 8388644 4 1 25 0 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_RE 1 8388648 4 1 25 15 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_IM 1 8388652 4 1 25 15 1 RO
-PREDISTORTER.0.WORD_PREDISTORTER_MEM_SEL 1 8388656 4 1 6 0 0 RW
-PREDISTORTER.0.AREA_PREDISTORTER_MEM 1024 8392704 4096 1 25 0 1 RW
-APP.0.LLRF_OUTPUT 64 8194048 256 1 32 0 0 RW
-OUTPUT.0.WORD_FIRMWARE 1 8194048 4 1 32 0 0 RO
-OUTPUT.0.WORD_REVISION 1 8194052 4 1 32 0 0 RO
-OUTPUT.0.WORD_CAPABILITIES 1 8194056 4 1 32 0 0 RO
-OUTPUT.0.WORD_STATUS 1 8194064 4 1 4 0 0 RO
-OUTPUT.0.WORD_Q_SIGN 1 8194068 4 1 1 0 0 RW
-OUTPUT.0.WORD_DAC_OFFSET 2 8194080 8 1 18 0 1 RW
-OUTPUT.0.WORD_AMP_LIMIT 1 8194092 4 1 18 0 0 RW
-OUTPUT.0.WORD_AMP_LIMIT_ENA 1 8194096 4 1 1 0 0 RW
-OUTPUT.0.WORD_RF_GATE_MODE 1 8194104 4 1 1 0 0 RW
-OUTPUT.0.WORD_RF_GATE_STEP 1 8194108 4 1 18 16 1 RW
-APP.0.LLRF_CTABLES 262144 1048576 1048576 1 32 0 0 RW
-CTABLES.0.WORD_FIRMWARE 1 1048576 4 1 32 0 0 RO
-CTABLES.0.WORD_REVISION 1 1048580 4 1 32 0 0 RO
-CTABLES.0.WORD_CAPABILITIES 1 1048584 4 1 32 0 0 RO
-CTABLES.0.BIT_CTL_TABLES_BUF 1 1048588 4 1 14 0 0 RW
-CTABLES.0.AREA_FF_I 2048 1056768 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_Q 2048 1064960 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_CORR_I 2048 1073152 8192 1 18 0 1 RW
-CTABLES.0.AREA_FF_CORR_Q 2048 1081344 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_I 2048 1089536 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_Q 2048 1097728 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_CORR_I 2048 1105920 8192 1 18 0 1 RW
-CTABLES.0.AREA_SP_CORR_Q 2048 1114112 8192 1 18 0 1 RW
-CTABLES.0.AREA_GP_I 2048 1122304 8192 1 18 10 1 RW
-CTABLES.0.AREA_GP_Q 2048 1130496 8192 1 18 10 1 RW
-CTABLES.0.AREA_GC_I 1 1138688 4 1 18 0 1 RW
-CTABLES.0.AREA_GC_Q 1 1146880 4 1 18 0 1 RW
-CTABLES.0.AREA_GI_I 1 1155072 4 1 18 0 1 RW
-CTABLES.0.AREA_GI_Q 1 1163264 4 1 18 0 1 RW
-APP.0.LLRF_BBFSC 30 65536 120 1 32 0 0 RW
-BBFSC.0.WORD_FIRMWARE 1 65536 4 1 32 0 0 RO
-BBFSC.0.WORD_REVISION 1 65540 4 1 32 0 0 RO
-BBFSC.0.WORD_CAPABILITIES 1 65544 4 1 32 0 0 RO
-BBFSC.0.WORD_BBFSC_ENA 1 65548 4 1 1 0 0 RW
-BBFSC.0.WORD_BUNCH_SPACE 1 65552 4 1 8 0 0 RW
-BBFSC.0.WORD_BAM_THR 1 65556 4 1 18 0 1 RW
-BBFSC.0.WORD_BAM_SP 1 65560 4 1 18 0 1 RW
-BBFSC.0.WORD_BAM_KP_I 1 65564 4 1 18 10 1 RW
-BBFSC.0.WORD_BAM_KP_Q 1 65568 4 1 18 10 1 RW
-BBFSC.0.WORD_EMU_ENA 1 65572 4 1 1 0 0 RW
-BBFSC.0.WORD_EMU_TRG 1 65576 4 1 1 0 0 RW
-BBFSC.0.WORD_EMU_BUNCH_QTY 1 65580 4 1 8 0 0 RW
-BBFSC.0.WORD_EMU_BUNCH_SPACE 1 65584 4 1 8 0 0 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_0 1 65588 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_1 1 65592 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_2 1 65596 4 1 18 0 1 RW
-BBFSC.0.WORD_EMU_ARRIVAL_TIME_3 1 65600 4 1 18 0 1 RW
-BBFSC.0.WORD_DBG_ENA 1 65604 4 1 1 0 0 RW
-BBFSC.0.WORD_DBG_TRG 1 65608 4 1 1 0 0 RW
-BBFSC.0.WORD_DBG_BUNCH_INDEX 1 65612 4 1 8 0 0 RW
-BBFSC.0.WORD_ONLINE_BAM_ARRIVAL_TIME 1 65616 4 1 18 0 1 RO
-BBFSC.0.WORD_ONLINE_SP_CORR_I 1 65620 4 1 18 0 1 RO
-BBFSC.0.WORD_ONLINE_SP_CORR_Q 1 65624 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_BAM_ARRIVAL_TIME 1 65628 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_SP_CORR_I 1 65632 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_PRE_SP_CORR_Q 1 65636 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_BAM_ARRIVAL_TIME 1 65640 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_SP_CORR_I 1 65644 4 1 18 0 1 RO
-BBFSC.0.WORD_TRIGED_POST_SP_CORR_Q 1 65648 4 1 18 0 1 RO
-BBFSC.0.WORD_LLL_BAM_CRC_ERR_CNT 1 65652 4 1 16 0 0 RO
-APP.0.WORD_INTERLOCK_LATCHER_ENA 1 1228 4 1 1 0 0 RW
-APP.0.WORD_INTERLOCK_LATCHER_RESET 1 1232 4 1 1 0 0 RW
-APP.0.WORD_INTERLOCK_LATCHER_STATUS 1 1236 4 1 4 0 0 RO
-APP.0.WORD_LATCHED_LIMITERS 1 1240 4 1 8 0 0 RO
-APP.0.WORD_LLL_TX_HEADER 1 1244 4 1 16 0 0 RW
-APP.0.WORD_LLL_TX_CNT 1 1252 4 1 16 0 0 RO
-APP.0.WORD_PIEZO_FOR_SEL 1 1256 4 1 3 0 0 RW
-APP.0.WORD_PIEZO_PRO_SEL 1 1260 4 1 3 0 0 RW
-APP.0.WORD_PIEZO_REF_SEL 1 1264 4 1 3 0 0 RW
-APP.0.ALG_PIEZOFB 16384 8126464 65536 1 32 0 0 RW
-PIEZOFB.0.WORD_FIRMWARE_PIEZOFB 1 8126464 4 1 32 0 0 RO
-PIEZOFB.0.WORD_VERSION_PIEZOFB 1 8126468 4 1 32 0 0 RO
-PIEZOFB.0.WORD_TIMESTAMP_PIEZOFB 1 8126472 4 1 32 0 0 RO
-PIEZOFB.0.WORD_FB_ENA 1 8126476 4 1 0 0 0 RW
-PIEZOFB.0.WORD_FB_PGAIN 1 8126480 0 1 25 0 1 RW
-PIEZOFB.0.WORD_FB_LIMIT 1 8126512 4 1 18 0 1 RW
-PIEZOFB.0.WORD_FB_IIR_A 3 8126516 12 1 32 0 1 RW
-PIEZOFB.0.WORD_FB_IIR_B 3 8126532 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_ENA 1 8126552 4 1 0 0 0 RW
-PIEZOFB.0.WORD_ANC_LIMIT 1 8126556 4 1 25 0 0 RW
-PIEZOFB.0.AREA_ANC_MI 1 8126592 0 1 25 0 1 RW
-PIEZOFB.0.AREA_ANC_PHA 1 8126720 0 1 16 0 0 RW
-PIEZOFB.0.AREA_ANC_DELAY 1 8126848 0 1 16 0 0 RW
-PIEZOFB.0.WORD_SOURCE_SEL 1 8127072 4 1 2 0 0 RW
-PIEZOFB.0.WORD_FB_IGAIN 1 8127076 0 1 25 0 1 RW
-PIEZOFB.0.WORD_FB_SP 1 8127112 0 1 18 0 1 RW
-PIEZOFB.0.WORD_DEC_COEFF 1 8127148 4 1 18 0 1 RW
-PIEZOFB.0.WORD_DEC_SHIFT 1 8127152 4 1 6 0 0 RW
-PIEZOFB.0.WORD_DEC_ENA 1 8127160 4 1 1 0 0 RW
-PIEZOFB.0.WORD_TIMING_DIV 1 8127168 4 1 16 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_ENA 1 8127172 4 1 1 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_A 3 8127176 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_IN_B 3 8127192 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_ENA 1 8127208 4 1 1 0 0 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_A 3 8127224 12 1 32 0 1 RW
-PIEZOFB.0.WORD_ANC_IIR_OUT_B 3 8127240 12 1 32 0 1 RW
-PIEZOFB.0.WORD_FB_LGAIN 1 8127256 0 1 25 0 1 RW
-PIEZOFB.0.WORD_LFD_FB_ENA 1 8127296 4 1 0 0 1 RW
-APP.0.ALG_QLDET 16384 7929856 65536 1 32 0 0 RW
-QLDET.0.WORD_FIRMWARE_QLDET 1 7929856 4 1 32 0 0 RO
-QLDET.0.WORD_VERSION_QLDET 1 7929860 4 1 32 0 0 RO
-QLDET.0.WORD_TIMESTAMP_QLDET 1 7929864 4 1 32 0 0 RO
-QLDET.0.WORD_QLDET_COEFF_REA 8 7929888 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMA 8 7929920 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_REB 8 7929952 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMB 8 7929984 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_IMP 8 7930016 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF_REP 8 7930048 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_COEFF 8 7930080 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_IN_A 8 7930112 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_IN_B 8 7930144 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_OUT_A 8 7930176 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_IIR_OUT_B 8 7930208 32 1 25 0 1 RW
-QLDET.0.WORD_QLDET_DT 1 7930240 4 1 32 0 1 RW
-QLDET.0.WORD_QLDET_DBG_SEL 1 7930272 4 1 6 0 0 RW
-QLDET.0.AREA_QLDET_HBW_BASE 2048 7938048 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_HBW_DELTA 2048 7946240 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_DET_BASE 2048 7954432 8192 1 32 0 1 RW
-QLDET.0.AREA_QLDET_DET_DELTA 2048 7962624 8192 1 32 0 1 RW
-APP.0.AREA_PIEZO0 16384 8060928 65536 1 18 0 0 RO
-APP.0.AREA_PIEZO1 16384 7995392 65536 1 18 0 0 RO
-APP.0.WORD_REFL_REL_LATCH 1 1268 4 1 1 0 0 RW
-APP.0.WORD_REFL_LATCH_CNT 1 1272 4 1 8 0 0 RW
-APP.0.WORD_RF_OFF_TIME 1 1276 4 1 18 0 0 RO
-APP.0.LLRF_DECA 128 1280 512 1 32 0 0 RW
-DECA.0.WORD_CAPABILITIES 1 1280 4 1 32 0 0 RO
-DECA.0.WORD_REVISION 1 1284 4 1 32 0 0 RO
-DECA.0.BIT_OUTPUT_ENA 1 1288 4 1 1 0 0 RW
-DECA.0.BIT_PROCESSOR_INPUT_ENA 1 1292 4 1 1 0 0 RW
-DECA.0.BIT_DETUNING_CALCULATION_ENA 1 1296 4 1 1 0 0 RW
-DECA.0.BIT_PROCESSOR_RST 1 1300 4 1 1 0 0 RW
-DECA.0.BIT_PROCESSOR_HALT 1 1304 4 1 1 0 0 RW
-DECA.0.WORD_EXTERNAL_BW 16 1308 64 1 17 0 0 RW
-DECA.0.WORD_BEAM_MULTIPLIER 16 1372 64 1 17 0 0 RW
-DECA.0.WORD_DETUNING_RANGE_SCALE 16 1436 64 1 5 0 0 RW
-DECA.0.WORD_QUENCH_DETECTED 1 1500 4 1 16 0 0 RO
-DECA.0.WORD_QUENCH_RST 1 1504 4 1 16 0 0 RW
-DECA.0.WORD_QUENCH_BW_THRE 16 1508 64 1 18 0 0 RW
-DECA.0.WORD_QUENCH_AMP_THRE 16 1572 64 1 18 0 0 RW
-DECA.0.WORD_CACHED_MEM_ADDR 1 1636 4 1 16 0 0 RW
-DECA.0.WORD_CACHED_MEM_DATA 1 1640 4 1 32 0 0 RW
-DECA.0.AREA_UNCACHED_MEM_DATA 256 1644 1024 1 32 0 0 RW
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF0 16384 0 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ0_BUF0_0 1 0 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_1 1 2 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_2 1 4 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_3 1 6 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_4 1 8 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_5 1 10 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_6 1 12 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_7 1 14 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_8 1 16 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_9 1 18 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_10 1 20 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_11 1 22 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_12 1 24 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_13 1 26 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_14 1 28 2 13 16 0 1 RO
-APP.0.SEQUENCE_DAQ0_BUF0_15 1 30 2 13 16 0 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ0_BUF1 16384 1048576 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ0_BUF1_0 1 1048576 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_1 1 1048578 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_2 1 1048580 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_3 1 1048582 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_4 1 1048584 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_5 1 1048586 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_6 1 1048588 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_7 1 1048590 2 13 16 8 1 RO
-APP.0.SEQUENCE_DAQ0_BUF1_8 1 1048592 2 13 16 -2 1 RO
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-APP.0.SEQUENCE_DAQ0_BUF1_12 1 1048600 2 13 16 -2 1 RO
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-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0 16384 4194304 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF0_0 1 4194304 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_1 1 4194306 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_2 1 4194308 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_3 1 4194310 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_4 1 4194312 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_5 1 4194314 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF0_6 1 4194316 2 13 16 -2 1 RO
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-APP.0.SEQUENCE_DAQ1_BUF1_0 1 5242880 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_1 1 5242882 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_2 1 5242884 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_3 1 5242886 2 13 16 -2 1 RO
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-APP.0.SEQUENCE_DAQ1_BUF1_12 1 5242904 2 13 16 -2 1 RO
-APP.0.SEQUENCE_DAQ1_BUF1_13 1 5242906 2 13 16 -2 1 RO
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-APP.0.SEQUENCE_DAQ1_BUF1_15 1 5242910 2 13 16 -2 1 RO
-APP.0.AREA_MULTIPLEXED_SEQUENCE_DAQ1_BUF0_RAW 16384 4194304 65536 13 32 0 0 RO
-APP.0.SEQUENCE_DAQ1_BUF0_RAW_0 1 4194304 2 13 16 0 1 RO
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-APP.0.SEQUENCE_DAQ1_BUF1_RAW_3 1 5242886 2 13 16 0 1 RO
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-BOARD.0.WORD_FIRMWARE 1 0 4 0 32 0 0 RO
-BOARD.0.WORD_REVISION 1 4 4 0 32 0 0 RO
-BOARD.0.WORD_TIMESTAMP 1 8 4 0 32 0 0 RO
-BOARD.0.WORD_USER 1 16 4 0 32 0 0 RW
-BOARD.0.WORD_BOOT_STATUS 1 20 4 0 1 0 0 RW
-BOARD.0.WORD_RESET_N 1 24 4 0 1 0 0 RW
-BOARD.0.WORD_CLK_FREQ 8 32 32 0 32 0 0 RW
-BOARD.0.WORD_CLK_SEL 1 64 4 0 2 0 0 RW
-BOARD.0.WORD_CLK_ERR 1 68 4 0 1 0 0 RO
-BOARD.0.WORD_CLK_MUX 6 96 24 0 2 0 0 RW
-BOARD.0.WORD_CLK_RST 1 128 4 0 1 0 0 RW
-BOARD.0.WORD_CLK_PHASE_INCDEC 1 132 4 0 1 0 0 RW
-BOARD.0.WORD_SPI_DIV_SEL 1 136 4 0 2 0 0 RW
-BOARD.0.WORD_SPI_DIV_BUSY 1 140 4 0 1 0 0 RO
-BOARD.0.AREA_SPI_DIV 128 4096 512 0 8 0 0 RW
-BOARD.0.AREA_PLL 512 16384 2048 0 8 0 0 RW
-BOARD.0.AREA_PLL_CONF 512 12288 2048 0 24 0 0 RW
-BOARD.0.WORD_PLL_CONF_STR 1 160 4 0 2 0 0 RW
-BOARD.0.WORD_PLL_CONF_RST 1 164 4 0 1 0 0 RW
-BOARD.0.WORD_LLL_STATUS 6 192 24 0 32 0 0 RW
-BOARD.0.WORD_LLL_LOOPBACK 6 224 24 0 3 0 0 RW
-BOARD.0.WORD_ADC_ENA 1 256 4 0 1 0 0 RW
-BOARD.0.WORD_ADC_OV 1 260 4 0 10 0 0 RO
-BOARD.0.WORD_ADC_FIFO_RESET 1 264 4 0 10 0 0 RW
-BOARD.0.WORD_ADC_FIFO_DELAY 10 320 40 0 8 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_SEL 1 464 4 0 8 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_INC 1 468 4 0 1 0 0 RW
-BOARD.0.WORD_ADC_IDELAY_CNT 5 592 20 0 9 0 0 RO
-BOARD.0.WORD_ADC_REVERT_CLK 1 656 4 0 5 0 0 RW
-BOARD.0.WORD_SPI_ADC_SEL 1 288 4 0 3 0 0 RW
-BOARD.0.WORD_SPI_ADC_BUSY 1 292 4 0 1 0 0 RO
-BOARD.0.AREA_SPI_ADC 256 8192 1024 0 8 0 0 RW
-BOARD.0.WORD_DAC_ENA 1 384 4 0 1 0 0 RW
-BOARD.0.WORD_DAC_IDELAY_INC 1 388 4 0 1 0 0 RW
-BOARD.0.WORD_DAC_IDELAY_CNT 1 392 4 0 9 0 0 RO
-BOARD.0.AREA_BOOT 16384 65536 65536 0 32 0 0 RW
-BOARD.0.WORD_RJ45_IN 1 560 4 0 3 0 0 RO
-BOARD.0.WORD_RJ45_OUT 1 564 4 0 3 0 0 RW
-BOARD.0.AREA_DMA 67108864 0 268435456 13 32 0 0 RO
--
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