Commit 9c023eb7 authored by Joshua Supra's avatar Joshua Supra
Browse files

.

parent 0304e479
......@@ -15,12 +15,13 @@
#include "pilc2_functions/pilc2_network.h"
#include "pilc2_functions/pilc2_axi_gpio.h"
#include "pilc2_functions/pilc2_continous_counter.h"
#include "pilc2_functions/pilc2_counter_module.h"
#include "pilc2_functions/pilc2_adc.h"
#include "pilc2_functions/pilc2_IO_mux.h"
//#include "pilc2_functions/pilc2_encoder.h"
#include "pilc2_functions/pilc2_logic.h"
#include "pilc2_functions/pilc2_fifoser.h"
......@@ -44,6 +45,7 @@ int main (int argc, char *argv[]){
STOP = false;
signal(SIGINT, sigint_handler);
/* Initialize the SPI communication and the FPGA register space
* access */
initpilc2(IOCards);
......@@ -52,24 +54,6 @@ int main (int argc, char *argv[]){
* */
IOMuxAutoConfig(IOCards);
/*setIOConfig(0, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(1, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(2, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(3, 1, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_OUT);
setIOConfig(4, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(5, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(6, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(7, 1, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_OUT);
setIOConfig(8, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(9, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(10, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(11, 1, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_OUT);
setIOConfig(12, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(13, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(14, 0, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_IN);
setIOConfig(15, 1, IO_MUX_CFG_LOGIC, IOCARD_NIMTTL_TTL_OUT); */
InitIOCards(IOCards);
zmq_recive_data[1] = malloc (sizeof(zmq_data));
......@@ -79,6 +63,9 @@ int main (int argc, char *argv[]){
zmq_recive_data[0]->data = (unsigned int *) malloc (256*sizeof(int));
//zmq_recive_data[0]->NrOfBytes = (unsigned int *) malloc (sizeof(unsigned int));
/* Reset all modules */
PiLC2CounterEnableCounter();
setFifoSerCfg(0);
init_network();
......@@ -86,48 +73,23 @@ int main (int argc, char *argv[]){
/**************************************************************************
* TEST Functions
**************************************************************************/
WriteFPGA(0x2C00,0);
WriteFPGA(0x100,0);
WriteFPGA(0x140,0);
for(int i = 0; i< 16;i++){
WriteFPGA(0x2C00+0xA+i,0);
}
/**Seralizer config**/
/* WriteFPGA(0x2C00+0xA+0,1);
WriteFPGA(0x2C00+0xA+1,1);
WriteFPGA(0x2C00+0xA+2,1);
WriteFPGA(0x2C00+0xA+3,1);
WriteFPGA(0x2C00+0xA+4,8);
WriteFPGA(0x2C00+0xA+6,7);
WriteFPGA(0x2C00+0xA+8,2);
WriteFPGA(0x2C00+0xA+9,2);
WriteFPGA(0x2C00+0xA+10,8);
WriteFPGA(0x2C00+0xA+12,8);
WriteFPGA(0x2C00+0xA+14,8);*/
/*for(int i = 0; i< 16;i++){
setFifoSerChCfg(i,0);
}
for (int i = 0; i< 15; i++){
WriteFPGA(0x2C00+0xA+i,1);
setFifoSerChCfg(i,1);
}
WriteFPGA(0x2C00,1);
WriteFPGA(0x100,1);
WriteFPGA(0x140,1);
*/
/**************************************************************************
* TEST Functions
**************************************************************************/
while (1) {
/* if (initContCounterDone == 1) {
pthread_create(&thread_continous_counter, NULL, timed_counter_copy, NULL);
}*/
while (1) {
NrOfBytesReceived[0] = zmq_recv (client_responder,
zmq_recive_data[0]->data, 1023, ZMQ_DONTWAIT);
......@@ -145,7 +107,6 @@ int main (int argc, char *argv[]){
}
while (1) {
// NrOfBytesReceived[0] = -1;
NrOfBytesReceived[1] = zmq_recv (gui_responder,
zmq_recive_data[1]->data, 1023, ZMQ_DONTWAIT);
zmq_recive_data[1]->socket = gui_responder;
......@@ -172,7 +133,6 @@ int main (int argc, char *argv[]){
}
//pthread_join(thread_continous_counter, NULL);
pthread_join(thread_network[0], NULL);
pthread_join(thread_network[1], NULL);
pthread_join(thread_led_update, NULL);
......@@ -183,7 +143,7 @@ int main (int argc, char *argv[]){
break;
}
}
//free(zmq_recive_data[0]->NrOfBytes);
free(zmq_recive_data[0]->data);
free(zmq_recive_data[0]);
pthread_mutex_destroy(&lock);
......@@ -224,12 +184,14 @@ void *network(void *args){
case 0x3: status = BurstNetworktoReg(zmq_rec_data);break;
case 0x4: status = FunctionCall(zmq_rec_data);break;
}
//printf("2\n");
//printf("status: %d\n", status);
if (status != 0){
SendBuffer = (char *)malloc(2*sizeof(char));
SendBuffer[0] = status ;
SendBuffer[1] = 0x00;
nbytes = 2;
zmq_send (zmq_rec_data->socket, SendBuffer, nbytes, 0);
free(SendBuffer);
}
pthread_exit(NULL);
......
......@@ -21,7 +21,9 @@ DEPENDENCIES= \
pilc2_pt100.h \
pilc2_thermo.h \
pilc2_encoder.h \
pilc2_logic.h
pilc2_logic.h \
pilc2_fifoser.h
OBJ= \
pilc2_SPI_func.o \
pilc2_register_func.o \
......@@ -42,7 +44,8 @@ OBJ= \
pilc2_pt100.o \
pilc2_thermo.o \
pilc2_encoder.o \
pilc2_logic.o
pilc2_logic.o \
pilc2_fifoser.o
all: $(OBJ)
ar vrcs $(TARGETLIB) $(OBJ)
......
......@@ -13,6 +13,7 @@
#include "pilc2_register_func.h"
#include "pilc2_IO_GPIOs.h"
#include "pilc2_SPI_func.h"
#include "pilc2_fifoser.h"
#include <stdio.h>
......@@ -69,13 +70,13 @@ unsigned int getIOMuxCfg(char channel) {
void IOMuxAutoConfig(IOCardStruct *IOCard) {
int IsConfig = 0;
FILE *fp;
int buffer[64];
int buffer[80];
/* Check if a valid config is available on the PiLC2 */
if ((fp = fopen("/home/suprajos/pilc2/pilc2server/iocfg", "rb"))) {
fread(buffer,64*sizeof(int),4,fp);
fread(buffer,80*sizeof(int),4,fp);
fclose(fp);
......@@ -88,18 +89,25 @@ void IOMuxAutoConfig(IOCardStruct *IOCard) {
/* Write the config to the IO mux depending on the inserted card. If no
* config is available and inserted card is type NIM TTL it will be
* configured as TTL input for the counter moduel */
* configured as TTL input for the counter module */
for(int i = 0; i<16; i++){
switch(IOCard[i].TypeID) {
case NIM_TTL: if (IsConfig == 1) {
setIOConfig(i,buffer[4*i+1],buffer[4*i+2],buffer[4*i+3]);
setIOConfig(i,buffer[5*i+1],buffer[5*i+2],buffer[5*i+3]);
} else {
setIODDR(0x1<<i, PILC_IO_INPUT);
WriteFPGA(SPI_CS_MUX_OFFSET, i);
WriteIOCard(IOCARD_NIMTTL_WSTATUS, IOCARD_NIMTTL_TTL_IN);
setIOMuxCfg(i, IO_MUX_CFG_CTR);
if (i < 15) {
setIODDR(0x1<<i, PILC_IO_INPUT);
WriteFPGA(SPI_CS_MUX_OFFSET, i);
WriteIOCard(IOCARD_NIMTTL_WSTATUS, IOCARD_NIMTTL_TTL_IN);
setIOMuxCfg(i, IO_MUX_CFG_CTR);
}else {
setIODDR(0x1<<i, PILC_IO_OUTPUT);
WriteFPGA(SPI_CS_MUX_OFFSET, i);
WriteIOCard(IOCARD_NIMTTL_WSTATUS, IOCARD_NIMTTL_TTL_OUT);
setIOMuxCfg(i, IO_MUX_CFG_CTR);
}
}
break;
......@@ -128,5 +136,12 @@ void IOMuxAutoConfig(IOCardStruct *IOCard) {
default: setIODDR(0x1<<i, PILC_IO_INPUT);
setIOMuxCfg(i, IO_MUX_CFG_CTR);break;
}
if (IsConfig == 1 && buffer[5*i+4] == 1) {
setFifoSerChCfg(i, buffer[5*i+2]);
} else {
setFifoSerChCfg(i, 0);
}
}
}
......@@ -45,14 +45,7 @@
*
*****************************************************************************/
int initContCounter(void) {
reenable = 1;
error_count = 0;
sum_data_sets = 0;
current_ram_address = 0;
/* Reset the BRAM controller */
PiLC2BRAMControllerResetController();
......@@ -61,6 +54,11 @@ int initContCounter(void) {
if (initContCounterDone) return 0;
sum_data_sets = 0;
current_ram_address = 0;
reenable = 1;
error_count = 0;
uiod_cdma = "/dev/uio4";
uiod_axitimer = "/dev/uio5";
......@@ -113,8 +111,6 @@ int initContCounter(void) {
*
*****************************************************************************/
int deinitContCounter(void){
printf("sum of data sets: %d \n",sum_data_sets/(number_of_used_counter+2));
pthread_join(thread_continous_counter, NULL );
......
......@@ -14,181 +14,6 @@
#include "pilc2_register_func.h"
/************************** Function Definitions *****************************/
/*****************************************************************************/
/**
*
* Initialisation function of the PiLC2 counter module. A call of this function
* will initialize the number of counter used, if configured the internal gate
* generation DDS and the if set the internal gate counter.
*
*
* @param NrOfCounter number of used counter in the PiLC2
* @param config the counter module mode of operation
* @param internal_gate_counter is the number of gates to be counted
* @param int_gate_gen_dds tuning word for the internal gate generator DDS
*
* @return None
*
* @note None.
*
******************************************************************************/
void initPiLC2CounterModule(char NrOfCounter, unsigned int config,
unsigned int internal_gate_counter){
int free_run_mask = 0x8;
/* Set global number of used counter */
number_of_used_counter = NrOfCounter;
/* Disable the counter */
PiLC2CounterDisableCounter();
/* Set the number of used counter */
PiLC2CounterSetNrOfCounter(NrOfCounter);
/* when free run is disabled set the internal gate counter setpoint */
if ( !(config & free_run_mask)) {
PiLC2CounterSetIntGateCounter(internal_gate_counter);
nrofgates = internal_gate_counter;
}
/* update gate setpoint register, number of used counter and internal
* gate generator DDS */
PiLC2CounterLoadCounter();
/* Load the nuber of counter into internal register and set runmode */
PiLC2CounterConfig(config);
/* set the init counter module flag to one */
CounterModuleInitDone = 1;
}
/*****************************************************************************/
/**
*
* Write a value into the PiLC2 counter module config register.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterConfig(unsigned int config){
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, config);
}
/*****************************************************************************/
/**
*
* This function loads the gate threshold value set by the function
* PiLC2CounterSetIntGateCounter(char int_gate_counter) into the internal gate
* threshold register.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterLoadCounter(void){
unsigned int reg;
unsigned int mask = 0x4;
/* save the value of the control register */
reg = ReadFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET);
/* update the gate counter, number of used counter and internal gate
* generator DDS into. */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, reg|mask);
/* reset the load bit */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, reg&~mask);
}
/*****************************************************************************/
/**
*
* Use this function to reset the PiLC2 counter module. All Registers will be
* initialized to 0.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterResetCounter(void){
/* Set the PiLC2 counter module control register to all zeros */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, 0);
/* Set the PiLC2 counter module internal gate counter to zero */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_INTGATECTR_OFFSET, 0);
/* Set the PiLC2 counter module number of counter to zero */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_NROFCTR_OFFSET, 0);
/* Set the PiLC2 counter module internal gate dds tuning word to zero */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_INTGATEDDS_OFFSET, 0);
}
/*****************************************************************************/
/**
*
* Set the setpoint for internal gate counting mode.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterSetIntGateCounter(unsigned int int_gate_counter){
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_INTGATECTR_OFFSET,
int_gate_counter);
}
/*****************************************************************************/
/**
*
* Set the tuning word for the internal gate generator DDS.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterSetIntGateDDS(unsigned int int_gate_gen_dds){
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_INTGATEDDS_OFFSET,
int_gate_gen_dds);
}
/*****************************************************************************/
/**
*
* This function sets the number of used counter in the PiLC2.
*
*
* @return None
*
* @note None.
*
******************************************************************************/
void PiLC2CounterSetNrOfCounter(char NrOfCounter){
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_NROFCTR_OFFSET, NrOfCounter);
}
/*****************************************************************************/
/**
......@@ -202,14 +27,9 @@ void PiLC2CounterSetNrOfCounter(char NrOfCounter){
*
******************************************************************************/
void PiLC2CounterEnableCounter(void){
unsigned int reg;
unsigned int mask = 0x1;
/* save the value of the control register */
reg = ReadFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET);
/* only reset the counter enable bit */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, reg|mask);
/* only set the counter enable bit */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, 1);
}
......@@ -226,33 +46,8 @@ void PiLC2CounterEnableCounter(void){
*
******************************************************************************/
void PiLC2CounterDisableCounter(void){
unsigned int reg;
unsigned int mask = 0x1;
/* save the value of the control register */
reg = ReadFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET);
/* only reset the counter enable bit */
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, reg&~mask);
WriteFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET, 0);
}
/*****************************************************************************/
/**
*
* This function disables the PiLC2 counter module by setting the counter enable
* bit to 0.
*
*
* @return The status of the counter module control register
*
* @note None.
*
******************************************************************************/
unsigned int PiLC2CounterGetStatus(void){
unsigned int value;
/* save the value of the control register */
value = ReadFPGA(PILC2_CTR_MOD_OFFSET+PILC2_CTR_MOD_CTRLREG_OFFSET);
return value;
}
......@@ -38,25 +38,7 @@
/************************** Function Prototypes ******************************/
void initPiLC2CounterModule(char NrOfCounter, unsigned int config,
unsigned int internal_gate_counter);
void PiLC2CounterConfig(unsigned int config);
void PiLC2CounterSetNrOfCounter(char NrOfCounter);
void PiLC2CounterEnableCounter(void);
void PiLC2CounterDisableCounter(void);
void PiLC2CounterResetCounter(void);
void PiLC2CounterSetIntGateDDS(unsigned int int_gate_gen_dds);
void PiLC2CounterSetIntGateCounter(unsigned int int_gate_counter);
void PiLC2CounterLoadCounter(void);
unsigned int PiLC2CounterGetStatus(void);
/**missing**/
/*
*/
/***********/
int CounterModuleInitDone;
int nrofgates;
char number_of_used_counter;
#endif
......@@ -22,6 +22,7 @@
#include "pilc2_continous_counter.h"
#include "pilc2_IO_mux.h"
#include "pilc2_logic.h"
#include "pilc2_fifoser.h"
#include <sys/types.h>
#include <sys/socket.h>
......@@ -87,8 +88,6 @@ int FunctionCall(zmq_data *zmq_data_struct){
switch (FunctionNumber){
case CONTINOUS_COUNTER_INIT: initContCounter();break;
case COUNTER_MODULE_INIT: initPiLC2CounterModule(funcArg[0],funcArg[1],
funcArg[2]);break;
case COUNTER_MODULE_ENABLE: PiLC2CounterEnableCounter();break;
case GET_NR_OF_DATA :value = GetNrOfData(zmq_data_struct);break;
case GET_DATA:value = PiLC2GetRamData(funcArg[0],funcArg[1],zmq_data_struct->socket);break;
......@@ -222,6 +221,7 @@ int NetworktoReg(zmq_data *zmq_data_struct){
unsigned int addr32 = zmq_data_struct->data[1];
//check if address is in range
status = CheckValidBaseAddr(addr32);
printf("status: %d\n", status);
if (status != 0) {
return status;
}
......@@ -275,6 +275,8 @@ int RegtoNetwork(zmq_data *zmq_data_struct){
* returns: 0 if OK, returns -1 if address is out of range
*/
int CheckValidBaseAddr(unsigned int addr){
//printf("addr: %d\n", addr);
//printf("size: %d\n", (PILC_REG_SIZE >> 2));
if (addr > (PILC_REG_SIZE >> 2)){
return ERR_OUT_OF_BONDS;
}
......@@ -559,7 +561,7 @@ void WriteIOConfig(unsigned int *data) {
fp = fopen("/home/suprajos/pilc2/pilc2server/iocfg", "wb");
fwrite(data,64*sizeof(int),1,fp);
fwrite(data,80*sizeof(int),1,fp);
fclose(fp);
......@@ -568,8 +570,16 @@ void WriteIOConfig(unsigned int *data) {
for (int i = 0; i < 16; i++) {
if (IOCards[i].TypeID == NIM_TTL) {
setIOConfig(i,data[4*i+1],data[4*i+2],data[4*i+3]);
setIOConfig(i,data[5*i+1],data[5*i+2],data[5*i+3]);
//printf("%d, %d, %d, %d, %d\n",i,data[5*i+1],data[5*i+2],data[5*i+3],data[5*i+4]);
}
if (data[5*i+4] == 1) {
setFifoSerChCfg(i, data[5*i+2]);
//printf("%d %d \n", i, data[5*i+2]);
} else {
setFifoSerChCfg(i, 0);
}
}
InitIOCards(IOCards);
......
#include "various.h"
#include "pilc2_counter_module.h"
#include <main.h>
#include <pthread.h>
#include <stdio.h>
void get_mem(void* virtual_address) {
unsigned int *p = virtual_address;
int offset;
for (offset = 0; offset < 4 ; offset++) {
printf("%d ", p[offset]);
}
printf("\n");
}
void memdump(void* virtual_address, int byte_count) {
char *p = virtual_address;
int offset;
int return_counter = 0;
for (offset = 0; offset < byte_count ; offset++) {
printf("%02x", p[offset]);
if (offset % 4 == 3) { printf(" \n"); return_counter ++;}
}
printf("\n");
}
void memdump_sorted(void* virtual_address, int byte_count) {
unsigned int *p = virtual_address;
int offset;
int return_counter = 0;
for (offset = 0; offset < byte_count ; offset++) {
printf("%d ", p[offset]);