Commit 73eadebf authored by Joshua Supra's avatar Joshua Supra
Browse files

added fifo ser

parent d6db817e
/******************************************************************************/
/**
*
* @file pilc2_fifoser.c
*
* This file contains the implementation of the driver for the PiLC2 fifo
* serializer module.
*
*******************************************************************************/
/***************************** Include Files **********************************/
#include "pilc2_register_func.h"
#include "pilc2_fifoser.h"
/******************************************************************************/
/**
*
* Set the run mode for the fifo serializer. Writing 0 to the config resets the
* module. Wrting 1 to the config enables the module to read data from the
* addressed IO modules and write the data into the fifo.
*
* @param config - Run mode config
*
* @return 0
*
*
*******************************************************************************/
int setFifoSerCfg(unsigned int config)
{
WriteFPGA(PILC_FIFOSER_OFFSET+PILC_FIFOSER_CTRL_REG, config);
return 0;
}
int setFifoSerChCfg(unsigned int channel, unsigned int config)
{
WriteFPGA(PILC_FIFOSER_OFFSET+PILC_FIFOSER_CH_OFFSET+channel, config);
return 0;
}
/******************************************************************************/
/**
*
* @file pilc2_fifoser.h
*
* This file contains the functions declariation for the PiLC fifo serializer
* used to format inconiming data from the IOs and write it to the PL BRAM.
*
*******************************************************************************/
/*************************** Constant Definitions *****************************/
#define PILC_FIFOSER_OFFSET (0xB000>>2)
#define PILC_FIFOSER_CH_OFFSET 0xA
#define PILC_FIFOSER_CTRL_REG 0x00
#define PILC_FIFOSER_CFG_0 0x0
#define PILC_FIFOSER_CFG_1 0x1
#define PILC_FIFOSER_CFG_2 0x2
#define PILC_FIFOSER_CFG_3 0x3
#define PILC_FIFOSER_CFG_4 0x4
#define PILC_FIFOSER_CFG_5 0x5
#define PILC_FIFOSER_CFG_6 0x6
#define PILC_FIFOSER_CFG_7 0x7
#define PILC_FIFOSER_CFG_8 0x8
#define PILC_FIFOSER_CFG_9 0x9
#define PILC_FIFOSER_CFG_10 0xA
#define PILC_FIFOSER_CFG_11 0xB
#define PILC_FIFOSER_CFG_12 0xC
#define PILC_FIFOSER_CFG_13 0xD
#define PILC_FIFOSER_CFG_14 0xE
#define PILC_FIFOSER_CFG_15 0xF
#define FIFOSER_CTR 0x1
#define FIFOSER_ADC 0x2
#define FIFOSER_PT100 0x4
#define FIFOSER_DADC 0x7
#define FIFOSER_THERMO 0x8
#define FIFOSER_ENCODER 0x9
/*************************** Function Prototypes ******************************/
int setFifoSerCfg(unsigned int config);
int setFifoSerChCfg(unsigned int channel, unsigned int config);
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