Commit 0304e479 authored by Joshua Supra's avatar Joshua Supra
Browse files

fixed bus error bug when reading data from ram

parent 52a1e3ff
......@@ -86,7 +86,36 @@ int main (int argc, char *argv[]){
/**************************************************************************
* TEST Functions
**************************************************************************/
WriteFPGA(0x2C00,0);
WriteFPGA(0x100,0);
WriteFPGA(0x140,0);
for(int i = 0; i< 16;i++){
WriteFPGA(0x2C00+0xA+i,0);
}
/**Seralizer config**/
/* WriteFPGA(0x2C00+0xA+0,1);
WriteFPGA(0x2C00+0xA+1,1);
WriteFPGA(0x2C00+0xA+2,1);
WriteFPGA(0x2C00+0xA+3,1);
WriteFPGA(0x2C00+0xA+4,8);
WriteFPGA(0x2C00+0xA+6,7);
WriteFPGA(0x2C00+0xA+8,2);
WriteFPGA(0x2C00+0xA+9,2);
WriteFPGA(0x2C00+0xA+10,8);
WriteFPGA(0x2C00+0xA+12,8);
WriteFPGA(0x2C00+0xA+14,8);*/
for (int i = 0; i< 15; i++){
WriteFPGA(0x2C00+0xA+i,1);
}
WriteFPGA(0x2C00,1);
WriteFPGA(0x100,1);
WriteFPGA(0x140,1);
/**************************************************************************
......@@ -94,6 +123,10 @@ int main (int argc, char *argv[]){
**************************************************************************/
while (1) {
/* if (initContCounterDone == 1) {
pthread_create(&thread_continous_counter, NULL, timed_counter_copy, NULL);
}*/
while (1) {
NrOfBytesReceived[0] = zmq_recv (client_responder,
......@@ -139,6 +172,7 @@ int main (int argc, char *argv[]){
}
//pthread_join(thread_continous_counter, NULL);
pthread_join(thread_network[0], NULL);
pthread_join(thread_network[1], NULL);
pthread_join(thread_led_update, NULL);
......
......@@ -126,7 +126,6 @@ void setIODDR(unsigned int channel, unsigned int config) {
WriteFPGA(PILC_IO_GPIOS_OFFSET+PILC_IODDR_CFG_REG, IODDRCfg|channel);
}
}
......@@ -203,7 +202,6 @@ int GetIOCardStatus(IOCardStruct *IOCard)
mask = mask<<1;
}
return 0;
}
......@@ -275,7 +273,6 @@ int GetIOCardRegister(IOCardStruct *IOCard)
*******************************************************************************/
int setIOConfig(unsigned int channel, unsigned int direction,
unsigned int function, unsigned int level) {
setIOMuxCfg(channel, function);
WriteFPGA(SPI_CS_MUX_OFFSET, channel);
WriteIOCard(IOCARD_NIMTTL_WSTATUS, level);
......
......@@ -46,18 +46,12 @@
*****************************************************************************/
int initContCounter(void) {
uiod_cdma = "/dev/uio4";
uiod_axitimer = "/dev/uio5";
reenable = 1;
error_count = 0;
sum_data_sets = 0;
current_ram_address = 0;
/* Memory map reserved PS RAM into register space */
ps_mem_dest_base_addr = (unsigned int*)mmap(NULL, PS_RAM_MAX_SIZE,
PROT_READ | PROT_WRITE, MAP_PRIVATE, Reg_Space,
PS_RAM_DESTIONATION_ADDRESS);
/* Reset the BRAM controller */
PiLC2BRAMControllerResetController();
......@@ -65,6 +59,11 @@ int initContCounter(void) {
/* Enable BRAM controller */
PiLC2BRAMControllerEnWBRAM();
if (initContCounterDone) return 0;
uiod_cdma = "/dev/uio4";
uiod_axitimer = "/dev/uio5";
/*-----------------------------------------------------------------------*/
/* Initalize timer Device */
axitimer_fd = PiLC2TimerInit(uiod_axitimer, &axitimer_ptr);
......
......@@ -21,6 +21,7 @@
#include "pilc2_cdma.h"
#include "pilc2_continous_counter.h"
#include "pilc2_IO_mux.h"
#include "pilc2_logic.h"
#include <sys/types.h>
#include <sys/socket.h>
......@@ -98,6 +99,7 @@ int FunctionCall(zmq_data *zmq_data_struct){
case SPI_WRITE: PiLC2WSPI(funcArg[0],funcArg[1],funcArg[2]);break;
case SPI_READ: value = PiLC2RSPI(funcArg[0],funcArg[1],zmq_data_struct->socket);break;
case SET_IO_CFG: WriteIOConfig(funcArg);break;
case SET_LOGIC_CFG: setLogicCfg(funcArg[0], funcArg[1]) ;break;
}
if(value == 1){
//echo the command
......@@ -344,8 +346,20 @@ int PiLC2GetRamData(unsigned int RAMBaseAddress, unsigned int numofdata, void *s
{
pthread_mutex_lock(&lock);
unsigned int *pointer;
pointer = (unsigned int *)malloc(numofdata*sizeof(int));
/* Send RAM data according to the number of register */
zmq_send(socket, ps_mem_dest_base_addr+RAMBaseAddress, numofdata*4, 0);
//zmq_send(socket, pointer, numofdata*4, 0);
//zmq_send(socket, pointer, numofdata*4, 0);
for (int i= 0; i<numofdata; i++){
//printf("%.8x\n", *(ps_mem_dest_base_addr+RAMBaseAddress+i));
pointer[i] = *(ps_mem_dest_base_addr+RAMBaseAddress+i);
}
zmq_send(socket, pointer, numofdata*4, 0);
read_ram_base_addr = read_ram_base_addr +numofdata*4;
......@@ -357,6 +371,8 @@ int PiLC2GetRamData(unsigned int RAMBaseAddress, unsigned int numofdata, void *s
last_valid_ram_addr = 0x00000000;
}
free(pointer);
pthread_mutex_unlock(&lock);
return 0;
......
......@@ -23,6 +23,7 @@
#define SPI_WRITE 0xA
#define SPI_READ 0xB
#define SET_IO_CFG 0xC
#define SET_LOGIC_CFG 0xD
typedef struct {
void *socket;
......
......@@ -9,6 +9,11 @@
int InitFPGA(void){
Reg_Space = open("/dev/mem", O_RDWR);
PiLC_Reg_base_addr= mmap(0, PILC_REG_SIZE , PROT_READ | PROT_WRITE, MAP_SHARED, Reg_Space, PILC_REG_START_ADDR );
/* Memory map reserved PS RAM into register space */
ps_mem_dest_base_addr = (unsigned int*)mmap(NULL, PS_RAM_MAX_SIZE,
PROT_READ | PROT_WRITE, MAP_PRIVATE, Reg_Space,
PS_RAM_DESTIONATION_ADDRESS);
return 0;
}
......
......@@ -3,7 +3,7 @@
#define PILC_REG_START_ADDR 0x80000000
#define PILC_REG_END_ADDR 0x8000AFFF
#define PILC_REG_END_ADDR 0x8000BFFF
#define PILC_REG_SIZE ( PILC_REG_END_ADDR - PILC_REG_START_ADDR )
......@@ -12,6 +12,7 @@
#define SPI_CS_MUX_OFFSET (0x200>>2) //0x100/4
unsigned int *PiLC_Reg_base_addr;
unsigned int* ps_mem_dest_base_addr;
unsigned int Reg_Space;
int InitFPGA(void);
......@@ -53,6 +54,12 @@ void ReadFPGABurst(unsigned int data[], unsigned int addr_start,
#define MAXLINE 15
#define PS_RAM_DESTIONATION_ADDRESS 0x60000000
#define PS_RAM_MAX_SIZE 0x10000000
//#define MAX_MEMORY 0x0FFFFFFF
#define MAX_MEMORY 0x10000000
float get_XADC_data (char *input_device);
float StatsforNerds (char Number);
......
......@@ -8,7 +8,7 @@ int error_count ;
unsigned int* cdma_control_register;
unsigned int* bram_source_address;
unsigned int* ps_mem_dest_base_addr;
void memdump_sorted(void* virtual_address, int byte_count);
void memdump_sorted_error(void* virtual_address, int byte_count);
......@@ -23,6 +23,4 @@ pthread_mutex_t lock;
#define NUMBER_OF_USED_COUNTER 5
#define NUMBER_OF_GATES 25
#define BRAM_SOURCE_ADRESS 0xE0000000
#define PS_RAM_DESTIONATION_ADDRESS 0x60000000
#define PS_RAM_MAX_SIZE 0x0FFFFFFF
#define MAX_MEMORY 0x0FFFFFFF
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