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Created date
docs: document Tcl procedures
!21
· created
Jul 27, 2022
by
Lukasz Butkowski
Merged
4
updated
Oct 19, 2022
fix(addr): reduce hierarchy; fix INTERCONNECT addresses
!20
· created
Jul 27, 2022
by
Lukasz Butkowski
Merged
2
updated
Jul 29, 2022
fix: ghdl now fails when an assertion of severity 'error' or 'failure' is thrown
!19
· created
Jul 23, 2022
by
Lukasz Butkowski
Merged
updated
Jul 23, 2022
feat: add appguru tool
!18
· created
Jul 13, 2022
by
Lukasz Butkowski
Merged
updated
Jul 23, 2022
Support of underscore and real in VHDL config file parsing
!17
· created
Jul 08, 2022
by
Lukasz Butkowski
Closed
updated
Jul 08, 2022
Added support of real type and '_' character in VHDL configuration parser
!16
· created
Jun 21, 2022
by
Lukasz Butkowski
Merged
Approved
updated
Jun 23, 2022
vitis tool with bare metal application handling
!15
· created
Jun 02, 2022
by
Lukasz Butkowski
Merged
updated
Jun 02, 2022
Draft: feat(addr): get list of DesyRDL files from .txt file
!14
· created
May 23, 2022
by
Lukasz Butkowski
Closed
1
updated
Oct 19, 2022
feat(tool): modelsim support added
!13
· created
May 18, 2022
by
Lukasz Butkowski
Merged
updated
May 18, 2022
Draft: Fwfwk sw
!12
· created
Apr 08, 2022
by
Lukasz Butkowski
Closed
updated
Apr 08, 2022
fix: call DesyRDL with empty PYTHON* env
!11
· created
Mar 31, 2022
by
Lukasz Butkowski
Merged
updated
Mar 31, 2022
fix(addr): use a single folder for all access channels
!10
· created
Dec 09, 2021
by
Lukasz Butkowski
Merged
updated
Dec 09, 2021
Merge 'desyrdl' branch
!9
· created
Dec 07, 2021
by
Lukasz Butkowski
master
Merged
updated
Dec 07, 2021
WIP: [addr] Call DesyRDL to generate mapfiles and VHDL
!8
· created
Jul 28, 2021
by
Lukasz Butkowski
desyrdl
Closed
updated
Oct 18, 2021
fixed bug that makes project creation to crash on successive calls
!7
· created
Jul 27, 2021
by
Lukasz Butkowski
master
Bugfix
Merged
updated
Aug 02, 2021
Simplify tool backend
!6
· created
Jun 29, 2021
by
Lukasz Butkowski
master
Refactoring
Merged
updated
Jul 05, 2021
Refactored duplicated code in SrcModule function calls traversing
!5
· created
Jun 09, 2021
by
Lukasz Butkowski
master
Refactoring
Merged
1
1
Approved
updated
Jun 09, 2021
Refactoring: Added argument parse utility routines
!4
· created
Jun 07, 2021
by
Lukasz Butkowski
master
Refactoring
Merged
4
Approved
updated
Jul 27, 2021
Makefile: Allow passing a TCLSH variable
!3
· created
Mar 17, 2021
by
Lukasz Butkowski
master
Closed
3
updated
May 19, 2021
WIP: Generate register infrastructure from SystemRDL
!2
· created
Mar 10, 2021
by
Lukasz Butkowski
master
Closed
updated
Jun 14, 2024
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