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CALICE AHCAL DIF2 firmware

mini-tlu, working as beam interface for CALICE AHCAL prototype

Wing-LDA, all FPGAs and MARS module

FPGAs of the wing-LDA in separate directory

BSP for DAMC-FMC2ZUP board

Example project for DAMC-FMC2ZUP card.

This is a clone of files prepared by DRS4 authors

Example project to test desyrdl with examples

Generate VHDL and .map files from SystemRDL input

BSP module for SIS8300KU AMC board with xDMA implementation along with DesyRDL library

Data Acquisition Module that is used to sample signals and create AXI.4 Full packages (Manager).

Generic Timing Module. Creates triggers, strobes for the application.