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Main VHDL library

Generate VHDL and .map files from SystemRDL input

Example project to test desyrdl with examples

This is a clone of files prepared by DRS4 authors

Example project for DRTM-AD84 rtm. By default with FMC1Z7IO BSP.

A simplified version of the UNIO FMC board support package.

Motion Control project that will be used on PETRA IV photon beamlines. The target hardware is the DAMC-MOTCTRL board communicating with ZMX+ Phytron Motor Driver Card over optical links.

Test Project for the RFSoC 4x2 Kit.

Application Module for DRTM-AD84 Rear Transition Module

DRTM-DS8VM1 board support package.

Application Module for DRTM-DWC10 Rear Transition Module