Explore projects
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Verification Projects for components under desy_vhdl library
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Example project to test desyrdl with examples
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BSP for the DAMC-FMC1Z7IO board
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FPGA Firmware / Yocto / meta-desy-util
BSD 3-Clause "New" or "Revised" LicenseUpdated -
Decoder module for the timing information from timers.
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A simplified version of the UNIO FMC board support package.
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Project to generate and maintain common FwkLinux package feed, mirrors and pr/hash services.
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Application Module for DRTM-VM2HF and DRTM-VM2LF Rear Transition Modules
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DRTM-DWC8VM1 rtm support package repo.
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BSP for DAMC-FMC2ZUP board
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