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Verification Projects for components under desy_vhdl library

Example project to test desyrdl with examples

The main firmware framework project

Decoder module for the timing information from timers.

BSP for DAMC-FMC2ZUP board

Application Module for DRTM-VM2HF and DRTM-VM2LF Rear Transition Modules

Windows distributive of Dioptas software

Generic Timing Module. Creates triggers, strobes for the application.

Data Acquisition Module that is used to sample signals and create AXI.4 Full packages (Manager).

Example project for DRTM-AD84 rtm. By default with FMC1Z7IO BSP.

Application Module for DRTM-AD84 Rear Transition Module