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Uses xDMA implementation version of SIS8300KU BSP with quick start.

Main VHDL library

Generate VHDL and .map files from SystemRDL input

Test Project for the RFSoC 4x2 Kit.

BSP module for SIS8300KU AMC board with xDMA implementation along with DesyRDL library

BSP for the DAMC-FMC1Z7IO board

Data Acquisition Module that is used to sample signals and create AXI.4 Full packages (Manager).

Application Module for DRTM-AD84 Rear Transition Module

FPGAs of the wing-LDA in separate directory

Generic Timing Module. Creates triggers, strobes for the application.

CALICE AHCAL DIF2 firmware