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FPGA Firmware / Tools / DesyRDL
Apache License 2.0Generate VHDL and .map files from SystemRDL input
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mini-tlu, working as beam interface for CALICE AHCAL prototype
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Generic Timing Module. Creates triggers, strobes for the application.
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Application Module for DRTM-VM2HF and DRTM-VM2LF Rear Transition Modules
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Application Module for DRTM-AD84 Rear Transition Module
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DRTM-DWC8VM1 rtm support package repo.
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A simplified version of the UNIO FMC board support package.
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Ultrasat Camera / corel_tsfpga
BSD 3-Clause "New" or "Revised" LicenseExtension to the tsfpga and hdl_registers development platforms for the corel package.
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Decoder module for the timing information from timers.
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DRTM-PZT4 board support module
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