diff --git a/Python/components/fpga_comp.py b/Python/components/fpga_comp.py index 3e684ff8ba370f8f4284038f8f35a1ec8c3dcf56..fa108773e67da639cc7fb44ee69a5819c0ea02d5 100644 --- a/Python/components/fpga_comp.py +++ b/Python/components/fpga_comp.py @@ -552,39 +552,39 @@ class Arria10(object): return json.loads(string) def runNumber(self): - status, val = mem.read( self.dev , 0x00050180 ) + status, val = mem.read( self.dev , 0x00050020 ) return ( val & 0xFF00 ) >> 8 | ( val & 0x00FF ) << 8 def triggerTag(self): - status, val = mem.read( self.dev , 0x000501C0 ) + status, val = mem.read( self.dev , 0x00050040 ) return ( val & 0xFF00 ) >> 8 | ( val & 0x00FF ) << 8 def clockUp(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x800 ) >> 11 def ttdUp(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x1000 ) >> 12 def triggerType(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x1E000 ) >> 13 def triggerCounter(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x1FFE0000 ) >> 17 def rxReady(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x1 ) >> 0 def txReady(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x2 ) >> 1 def b2linkReady(self): - status, val = mem.read( self.dev , 0x00050120 ) + status, val = mem.read( self.dev , 0x00050000 ) return ( val & 0x4 ) >> 2 def resynchronizeLink(self):