diff --git a/Pcie40Libraries/pcie40_b2slc.cpp b/Pcie40Libraries/pcie40_b2slc.cpp
index 9bd12a711b571f8a08f35795aa40f469ee8065de..04688e8ac535b53d9105d6f41ee5601fcdec59c8 100644
--- a/Pcie40Libraries/pcie40_b2slc.cpp
+++ b/Pcie40Libraries/pcie40_b2slc.cpp
@@ -72,7 +72,7 @@ int pcie40_waitRead( int dev , int ch , int length ) {
     printf( "Timeout\n" ) ;
     return -1 ;
   } 
-  return ret ; 
+  return 0 ; 
 }
 
 int pcie40_readData( int dev , int ch , std::vector< int > & result , int length ) {
@@ -181,12 +181,12 @@ unsigned long pcie40_readfee32( int dev , int ch , int adr ) {
   if ( ret != 0 ) return -1 ;
 
   // Wait for the result to come back
-  ret = pcie40_waitRead( dev , ch , 4 ) ;
+  ret = pcie40_waitRead( dev , ch , 56 ) ;
   if ( ret != 0 ) return -1 ;
 
   // Read the value 
   std::vector< int > result ;
-  ret = pcie40_readData( dev , ch , result , 56 ) ;
+  ret = pcie40_readData( dev , ch , result , 6 ) ;
 
   int t_ret1 = result.at(0);
   int t_ret2 = result.at(1);
diff --git a/Pcie40Libraries/pcie40_b2slc.h b/Pcie40Libraries/pcie40_b2slc.h
index d2a17bf33b82e4f7cac16105cd211c5165e9b2bc..416e5a1bbe7968639a6d6736f436e4d562b84821 100644
--- a/Pcie40Libraries/pcie40_b2slc.h
+++ b/Pcie40Libraries/pcie40_b2slc.h
@@ -15,7 +15,7 @@
 #define SLC_RFIFO_ADD 0x00060000
 
 // Functions to read/write registers and stream files to Front End
-
+extern "C" { 
 int pcie40_readfee8(int dev, int ch, int adr);
 
 int pcie40_writefee8(int dev, int ch, int adr, int val);
@@ -27,6 +27,6 @@ int pcie40_writefee32(int dev, int ch, int adr, int val);
 int pcie40_writestream(int dev, int ch, char *filename);
 
 int pcie40_writebytestream(int dev, int ch, int len, const char *bytes);
-
+}
 #endif // PCIE40_B2SLC_H
 
diff --git a/Scripts/b2slc.py b/Scripts/b2slc.py
index ff718ea7e102c439e379fc7d46e70802d9b4809c..c1209771b5cba8f271eb5b6e0f9a3e70b2dc65bd 100644
--- a/Scripts/b2slc.py
+++ b/Scripts/b2slc.py
@@ -23,7 +23,6 @@ if ( args.read ):
     if result == -1: print "Error Value = ", result 
     else: print 'Read value {0} (address = {1})'.format(result,args.address)
 else:
-    print args.address, args.write
     if args.type == '32b':
         result = lli.pcie40_writefee32( 0 , args.channel , args.address , args.write )
     else: