diff --git a/Scripts/CRC.py b/Scripts/CRC.py
deleted file mode 100644
index 3299bf2ed7c0ca12e715e4a60e1d11445669a74b..0000000000000000000000000000000000000000
--- a/Scripts/CRC.py
+++ /dev/null
@@ -1,34 +0,0 @@
-def crc8_update( crc , data ):
- t = data ^ crc
- n0 = ( ( t & 0b100000 ) >> 5 ) ^ ( ( t & 0b10000 ) >> 4 ) ^ ( ( t & 0b100 ) >> 2 ) ^ ( ( t & 0b1 ) )
- n1 = ( ( t & 0b1000000 ) >> 6 ) ^ ( ( t & 0b100000 ) >> 5 ) ^ ( ( t & 0b1000 ) >> 3 ) ^ ( ( t & 0b10 ) >> 1 )
- n2 = ( ( t & 0b10000000 ) >> 7 ) ^ ( ( t & 0b1000000 ) >> 6 ) ^ ( ( t & 0b100000 ) >> 5 ) ^ ( ( t & 0b1 ) )
- n3 = ( ( t & 0b10000000 ) >> 7 ) ^ ( ( t & 0b1000000 ) >> 6 ) ^ ( ( t & 0b100000 ) >> 5 ) ^ ( ( t & 0b10000 ) >> 4 ) ^ ( ( t & 0b100 ) >> 2 ) ^ ( ( t & 0b10 ) >> 1 ) ^ ( ( t & 0b1 ) )
- n4 = ( ( t & 0b10000000 ) >> 7 ) ^ ( ( t & 0b1000000 ) >> 6 ) ^ ( ( t & 0b100000 ) >> 5 ) ^ ( ( t & 0b1000 ) >> 3 ) ^ ( ( t & 0b100 ) >> 2 ) ^ ( ( t & 0b10 ) >> 1 )
- n5 = ( ( t & 0b10000000 ) >> 7 ) ^ ( ( t & 0b1000000 ) >> 6 ) ^ ( ( t & 0b10000 ) >> 4 ) ^ ( ( t & 0b1000 ) >> 3 ) ^ ( ( t & 0b100 ) >> 2 )
- n6 = ( ( t & 0b10000000 ) >> 7 ) ^ ( ( t & 0b1000 ) >> 3 ) ^ ( ( t & 0b100 ) >> 2 ) ^ ( ( t & 0b1 ) )
- n7 = ( ( t & 0b10000 ) >> 4 ) ^ ( ( t & 0b1000 ) >> 3 ) ^ ( ( t & 0b10 ) >> 1 )
- n = n0 | ( n1 << 1 ) | ( n2 << 2 ) | ( n3 << 3 ) | ( n4 << 4 ) | ( n5 << 5 ) | ( n6 << 6 ) | ( n7 << 7 )
- return n
-
-crc = 0
-crc = crc8_update( crc , 0x00 )
-crc = crc8_update( crc , 0x00 )
-crc = crc8_update( crc , 0x01 )
-crc = crc8_update( crc , 0xf1 )
-crc = crc8_update( crc , 0x00 )
-crc = crc8_update( crc , 0x00 )
-crc = crc8_update( crc , 0x1d )
-crc = crc8_update( crc , 0x10 )
-crc = crc8_update( crc , 0x20 )
-crc = crc8_update( crc , 0x00 )
-crc = crc8_update( crc , 0x1d )
-crc = crc8_update( crc , 0x10 )
-crc = crc8_update( crc , 0x20 )
-crc = crc8_update( crc , 0x00 )
-
-print 'CRC = {0:04x}'.format(crc)
-
-
-
-
diff --git a/Scripts/config_PLLs.py b/Scripts/config_PLLs.py
deleted file mode 100755
index c6ec7ce3d38281e8c84cb8a87340775fc8a47246..0000000000000000000000000000000000000000
--- a/Scripts/config_PLLs.py
+++ /dev/null
@@ -1,177 +0,0 @@
-"""
- config_PLLs.py -- module to initialize the internal and external PLLs
-
- Author
- JPC : 17/04/2018
- JPC : 18/09/18 passed number of card as parameter
-
-
-
-"""
-import time
-import os
-import pathtocomponents
-import sys
-
-
-from fpga_comp import Arria10
-from si534x_comp import Si534x
-from xcvr_comp import xcvr
-
-
-def main():
- if (len(sys.argv) != 2):
- print "Missing argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot = 0 or 2"
- exit()
- elif (sys.argv[1] == "0"):
- print
- print "===== Target board = 0"
- dev = 0
- elif (sys.argv[1] == "2"):
- print
- print "===== Target board = 2"
- dev = 2
- else:
- print "Wrong argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot = 0 or 2"
- exit()
-
- # Program PLLs
- devices = \
- {1: "SI5345_U23",
- 2: "SI5345_U48",
- 3: "SI5344_U54"
- }
- ports = \
- {1: [0, 1, 2, 3],
- 2: [0, 1, 3, 4, 8],
- 3: [0, 1]
- }
- # EJ os.chdir("../../../FC0/devices_lli/components")
- os.chdir("../Python/components")
- # print os.getcwd()
-
- # Modif 17-01-2019 EJ EP changement des 3 fichiers programmation PLL
- #files = \
- #{1: "../data/Si5345-RevD-JIT1_40_jitter1_input0_40MHz-Registers.txt",
- #2: "../data/Si5345-RevD-JIT2_40_jitter2_input0_40MHz-Registers.txt",
- #3: "../data/Si5344-RevD-TFC_40-Registers.txt"
- #}
-
- files = \
- {1: "../data/Si5345-RevB-JIT1_255-JIT1_240_jitter1_input1_255MHz_new-Registers.txt",
- 2: "../data/Si5345-RevB-JIT2_255-JIT2_240_jitter2_input1_255MHz_new-Registers.txt",
- 3: "../data/Si5344-RevB-TFC_127-Registers.txt"
- }
- expected_frequency = \
- {1: ["40.0789 MHz", "240.4734 MHz", "Undefined", "40.0789 MHz"],
- 2: ["40.0789 MHz", "240.4734 MHz", "Undefined", "40.0789 MHz"],
- 3: ["40.0789 MHz", "Undefined", "Undefined", "Undefined"]
- }
-
- freq = {"SI5344_U54": {
- 0: "tfc_refclk",
- 1: "sys_clk_40"},
- "SI5345_U23": {
- 0: "gbt_refclk0",
- 1: "gbt_refclk1",
- 2: "gbt_refclk2",
- 3: "gbt_refclk3"},
- "SI5345_U48": {
- 0: "gbt_refclk4",
- 1: "gbt_refclk5",
- 3: "gbt_refclk6",
- 4: "gbt_refclk7",
- 8: "sys_clk_240"},
- "SI53344": {
- 0: "ext_refclk0",
- 1: "ext_refclk1",
- 2: "ext_refclk2",
- 3: "ext_refclk3",
- 4: "ext_refclk4",
- 5: "ext_refclk5",
- 6: "ext_refclk6",
- 7: "ext_refclk7",
- 8: "ext_sys_clk"},
- "SI5340": {
- 0: "oscillator or face plate clock"}
- }
-
- #dev = 0 # Creates a list of objects with the 3 PLLs
- add = 0x68
- pll = [Si534x(dev, bus, add) for bus in devices.keys()]
- print
-
- # Set reset for transceivers
- print "===== Setting GBT reset"
- fpga = Arria10(0)
- fpga.init_reset_gbt()
- print
- time.sleep(5)
-
- for i in devices.keys(): # programs the 3 PLLs
- print "===== Programming PLL ", devices[i], "====="
- pll[i - 1].program_with_file(files[i], devices[i]) # i-1 because list index starts with 0
- print "..... wait to stabilize"
- time.sleep(7)
- for input in range(0, 4):
- pll[i-1].enable_los(input)
- pll[i-1].enable_oof(input)
- for j in range(0,4):
- status, loss_of_signal = pll[i - 1].read_loss_of_signal(j)
- print "..... Input ", j," :",
- if loss_of_signal == True:
- print "Loss of signal, ",
- else:
- print "Input clock present, ",
- status, oof = pll[i - 1].read_out_of_frequency(j)
- if oof == True:
- print "Out of frequency"
- else:
- print "Nominal frequency", "(", expected_frequency[i][j],")"
- print
- status, val = pll[i-1].read_run_mode()
- print "..... PLL mode =", val
- status, val = pll[i - 1].read_loss_of_lock() # i-1 because list index starts with 0
- print ".....",devices[i],
- if val == True:
- print "Loss of lock"
- else:
- print "Locked"
- print
-
- # Measure clocks
-
- for key, value in sorted(freq.iteritems()): # scan frequencies
- print "===== Measuring frequencies generated by device ", key, "====="
- for port in value.keys():
- status, frequency_read = fpga.read_pll_port_frequency(key, port)
- print " Port ", port, " : ", frequency_read, "(", value[port], ")"
-
- # Calibrate all fPLLs
- print "===== Calibrating fPLLs ====="
- trans = xcvr(dev)
- trans.calibrate_pll_all()
- print "..... fPLL calibrations done"
- print
-
- # Calibrate all PHYs
- print "===== Calibrating PHYs ====="
- trans.calibrate_phy_all()
- print "..... PHY calibrations done"
- print
-
- # Clear reset for transceivers
- print "===== Clearing GBT reset"
- fpga.clear_reset_gbt()
- print
-
-
-
-
-
-
-
-if __name__ == "__main__":
- main()
diff --git a/Scripts/pll_status.py b/Scripts/pll_status.py
deleted file mode 100755
index 245938249eb4ce693b2f31d80bdd5e70ba1e94be..0000000000000000000000000000000000000000
--- a/Scripts/pll_status.py
+++ /dev/null
@@ -1,467 +0,0 @@
-#!/usr/bin/python
-"""
- pll_status.py -- module to display pll status
-
- Author
- JPC : 02/10/2018
- Eric Jules: 01/12/2018, adapt for Belle II
-"""
-import time
-import os
-import subprocess
-import sys
-import pathtocomponents
-import curses
-
-
-from fpga_comp import Arria10
-from si534x_comp import Si534x
-from xcvr_comp import xcvr
-from eepromat24c_comp import EepromAT24C
-import addresses_comp as const
-
-def pll_window(pll, device, fpga, freq, conf, win):
-
- # SI5345_1 monitoring
- # inputs
- line = 3
- for j in range(0, 4):
- status, loss_of_signal = pll.read_loss_of_signal(j)
- win.addstr(line, 1, "Input " + str(j) + " : ",curses.A_BOLD)
- if conf[j] != "Not used":
- if loss_of_signal == True:
- win.addstr(line, 12,"Loss of signal ", RED)
- else:
- win.addstr(line, 12,"Input clock present", GREEN)
- status, oof = pll.read_out_of_frequency(j)
- if oof == True:
- win.addstr(line + 1, 12,"Out of frequency ", RED)
- else:
- win.addstr(line + 1, 12,"Nominal frequency ", GREEN)
- status, loss_of_signal_flg = pll.read_loss_of_signal_flg(j)
- if loss_of_signal_flg == True:
- win.addstr(line, 32, "LOS seen ", RED)
- else:
- win.addstr(line, 32, "No LOS since " + str(round(time.time() - start_time, 1)) + " seconds", GREEN)
- status, oof_flg = pll.read_out_of_frequency_flg(j)
- if oof_flg == True:
- win.addstr(line + 1, 32,"OOF seen ", RED)
- else:
- win.addstr(line + 1, 32, "No OOF since " + str(round(time.time() - start_time, 1)) + " seconds", GREEN)
- win.addstr(" "+conf[j])
- line = line + 2
- else:
- win.addstr(" Not used")
- line = line + 1
- # Measure frequencies
- line = line + 1
- for port in freq.keys():
- status, frequency_read = fpga.read_pll_port_frequency(device, port)
- #win.addstr(11 + line, 1, "Port = " + str(port) + " : " + str(frequency_read), WHITE)
- win.addstr(line, 1, "Output "+ str(port)+ " : ",curses.A_BOLD)
- win.addstr(str(frequency_read)+" Hz (" + freq[port] +")")
- line = line +1
- # internal state machine
- line = line + 1
- status, val = pll.read_run_mode()
- win.addstr(line, 1, "PLL mode : ", curses.A_BOLD)
- if val == "Normal":
- win.addstr(val, GREEN)
- else:
- win.addstr(val, RED)
- # check lock
- line = line + 1
- status, val = pll.read_loss_of_lock()
- win.addstr(line, 1, "PLL status: ", curses.A_BOLD)
- if val == True:
- win.addstr("Loss of lock", RED)
- else:
- win.addstr("Locked", GREEN)
- # check sticky bit
- status, val = pll.read_loss_of_lock_flg()
- if val == True:
- win.addstr(line, 32, "LOL seen", RED)
- else:
- win.addstr(line, 32, "No LOL since " + str(round(time.time() - start_time, 1)) + " seconds", GREEN)
- win.refresh()
- # Read masks values
- # y_max, x_max = win.getmaxyx()
- # line = 8
- # col = x_max / 3
- # win.addstr(line, col, "INTR flag values:",curses.A_BOLD)
- # line = line + 1
- # masks = pll.read_mask_values()
- # for mask in sorted(masks.keys()):
- # win.addstr(line, col, mask + " : " + str(masks[mask]))
- # line = line + 1
- # if line == y_max - 1:
- # line = 8
- # col = col + x_max / 3
- win.refresh()
-
-def fanout_window(fpga, win):
- status, frequency_read = fpga.read_pll_port_frequency("SI5340", 0)
- win.addstr(2, 1, "Face plate clock : ",curses.A_BOLD)
- if frequency_read < 127000000 or frequency_read > 128000000:
- win.addstr(str(frequency_read/1000)+" kHz", RED)
- win.addstr(" Warning : frequency out of range", YELLOW)
- else:
- win.addstr(str(frequency_read) + " Hz", GREEN)
- win.refresh()
-
-def program_plls(plls, devices, files, win):
-
- win.move(4,1)
- win.clrtobot()
- win.box()
- line = 4
-
- for i in plls.keys(): # programs the 3 PLLs
- (status, part_number) = plls[i].read_part_number()
- (status, revision) = plls[i].read_device_revision()
- win.addstr(line, 1, "===== Hard resetting PLL "+str(devices[i])+" =====")
- plls[i].hard_reset()
- win.addstr(line + 1, 1, "..... Done")
- win.addstr(line + 2, 1, "===== Programming PLL ")
- win.addstr(line + 3, 1, "..... Configuration file is " + files[i])
- win.addstr(line + 4, 1, "..... Part number detected is : " + hex(part_number))
- win.addstr(line + 5, 1, "..... Device revision detected is : Rev. " + revision)
- win.refresh()
- plls[i].si534x_programming(files[i])
- win.addstr(line + 6, 1, "..... Done")
- for input in range(0, 4):
- plls[i].enable_los(input)
- plls[i].enable_oof(input)
- win.refresh()
- line = line + 9
- win.addstr(30, 1, "..... wait to stabilize")
- win.refresh()
- time.sleep(7)
- win.addstr(31, 1, "..... ready")
- line = 32
- for i in plls.keys():
- plls[i].clear_lol_flg_bit()
- plls[i].clear_los_oof_flg_reg()
- # dic = plls[i].clear_los_oof_flg_reg()
- # for mes in dic:
- # win.addstr(line, 1, mes + dic[mes])
- # line = line + 1
- start_time = time.time()
- win.refresh()
-
-def draw_menu(stdscr, dev):
-
- os.chdir("../Python/components")
-
- # Creates xcvr object
- trans = xcvr(dev)
-
- # Creates Arria10 object
- fpga = Arria10(dev)
-
- # Creates pll objects
- pll_si5345_1 = Si534x(dev, 1, 0x68)
- pll_si5345_2 = Si534x(dev, 2, 0x68)
- pll_si5344 = Si534x(dev, 3, 0x68)
- plls = \
- {1: pll_si5345_1,
- 2: pll_si5345_2,
- 3: pll_si5344
- }
- devices = \
- {1: "SI5345_U23",
- 2: "SI5345_U48",
- 3: "SI5344_U54"
- }
- ### Files for configuration for FTSW clock
- files1b = \
- {1: "../data/Si5345-1-BII_FTSW-Registers.txt",
- 2: "../data/Si5345-2-BII_FTSW-Registers.txt",
- 3: "../data/Si5344-BII_FTSW-Registers.txt"
- }
- conf1 = \
- {1: ["Expected frequency = 127.216 MHz", "Not used", "Not used", "Not used"],
- 2: ["Expected frequency = 127.216 MHz", "Not used", "Not used", "Not used"],
- 3: ["Expected frequency = 127.216 MHz", "Not used", "Not used", "Not used"]
- }
- # Modif EJ EP 17-01-2019 changement 2 premiers fichiers programmation pll
- ### Files for configuration for oscillator clock
- files2b = \
- {1: "../data/Si5345-1-BII_FPGA-Registers.txt",
- 2: "../data/Si5345-2-BII_FPGA-Registers.txt",
- 3: "../data/Si5344-BII_OSCI-Registers.txt"
- }
- # Modif EJ EP 17-01-2019 changement 2 premiers fichiers programmation pll
- conf2 = \
- {1: ["Not used", "Expected frequency = 127.216 MHz", "Not used", "Not used"],
- 2: ["Not used", "Expected frequency = 127.216 MHz", "Not used", "Not used"],
- 3: ["Expected frequency = 127.216 MHz", "Not used", "Not used", "Not used"]
- }
- freq = \
- {1: {
- 0: "gbt_refclk0",
- 1: "gbt_refclk1",
- 2: "gbt_refclk2",
- 3: "gbt_refclk3"},
- 2: {
- 0: "gbt_refclk4",
- 1: "gbt_refclk5",
- 3: "gbt_refclk6",
- 4: "gbt_refclk7",
- 8: "sys_clk_240"},
- 3: {
- 0: "tfc_refclk",
- 1: "sys_clk_240"}
- }
-
- # Choose default pll files
- files = files1b
- conf = conf1
-
-
- k = 0
-
- global start_time
- start_time = time.time()
-
- #curses.resizeterm(61, 200)
-
- # Clear and refresh the screen for a blank canvas
- stdscr.clear()
- stdscr.refresh()
-
- # Start colors in curses
- curses.start_color()
- curses.init_pair(1, curses.COLOR_WHITE, curses.COLOR_BLACK)
- curses.init_pair(2, curses.COLOR_CYAN, curses.COLOR_BLACK)
- curses.init_pair(3, curses.COLOR_RED, curses.COLOR_BLACK)
- curses.init_pair(4, curses.COLOR_GREEN, curses.COLOR_BLACK)
- curses.init_pair(5, curses.COLOR_YELLOW, curses.COLOR_BLACK)
- global WHITE
- global CYAN
- global RED
- global GREEN
- global YELLOW
- WHITE = curses.color_pair(1)
- CYAN = curses.color_pair(2)
- RED = curses.color_pair(3)
- GREEN = curses.color_pair(4)
- YELLOW = curses.color_pair(5)
-
- # define 4 windows proportional to max screen size
-
- y_max, x_max = stdscr.getmaxyx()
-
- win1 = stdscr.subwin(y_max-9, x_max/2, 0, 0)
- win1.box()
- win1.addstr(1, 1, "Command window", CYAN | curses.A_BOLD)
- board = EepromAT24C(dev, const.EEPROM_FPGA_BUS, const.EEPROM_U64_ADD)
- val = board.read_identification()
- val = val.split(":")[4]
- val = val.replace("\"","")
- val = val.split(",")[0]
- win1.addstr(" Running on : " + val, CYAN | curses.A_BOLD)
- win1.refresh()
-
- win2 = stdscr.subwin(y_max/3 +1,
- x_max/2,
- 0,
- x_max/2)
- win2.box()
- win2.addstr(1, 1, "PLL SI54345_1", CYAN | curses.A_BOLD)
- win2.refresh()
-
- win3 = stdscr.subwin(y_max/3 +1,
- x_max/2,
- y_max/3 +1,
- x_max/2)
- win3.box()
- win3.addstr(1, 1, "PLL SI54345_2", CYAN | curses.A_BOLD)
- win3.refresh()
-
- win4 = stdscr.subwin(min(y_max/3,y_max - (2*y_max/3 +1)),
- x_max/2,
- 2*y_max/3 +1,
- x_max/2)
- win4.box()
- win4.addstr(1, 1, "PLL SI54344", CYAN | curses.A_BOLD)
- win4.refresh()
-
- win5 = stdscr.subwin(5,
- x_max / 2,
- y_max - 9,
- 0)
- win5.box()
- win5.addstr(1, 1, "Clock FTSW", CYAN | curses.A_BOLD)
- win5.refresh()
-
- win6 = stdscr.subwin(4,
- x_max / 2,
- y_max - 4,
- 0)
- win6.box()
- win6.addstr(1, 1, "F2: Program PLLs (source = FTSW), F3: Program PLLs (source = Osci.)", CYAN | curses.A_BOLD)
- win6.addstr(2, 1, "F4: Clear LOS/OOF/LOL Flag, F5 : Hard reset, F6: Soft reset", CYAN | curses.A_BOLD)
- win6.refresh()
-
-
-
- # Loop where k is the last character pressed
- while (k != ord ('q')):
-
- # Initialization
-
- # height, width = stdscr.getmaxyx ()
-
- if k == curses.KEY_DOWN:
- cursor_y = cursor_y + 1
- elif k == curses.KEY_UP:
- cursor_y = cursor_y - 1
- elif k == curses.KEY_RIGHT:
- cursor_x = cursor_x + 1
- elif k == curses.KEY_LEFT:
- cursor_x = cursor_x - 1
- elif k == curses.KEY_F2:
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- win1.addstr(3, 1, "Programming PLLs (source = FTSW)")
- files = files1b
- conf = conf1
- program_plls(plls, devices, files, win1)
- win2.move(2, 1)
- win2.clrtobot()
- win2.box()
- win3.move(2, 1)
- win3.clrtobot()
- win3.box()
- win4.move(2, 1)
- win4.clrtobot()
- win4.box()
- elif k == curses.KEY_F3:
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- win1.addstr(3, 1, "Programming PLLs (source = Oscillator) ")
- files = files2b
- conf = conf2
- program_plls(plls, devices, files, win1)
- win2.move(2, 1)
- win2.clrtobot()
- win2.box()
- win3.move(2, 1)
- win3.clrtobot()
- win3.box()
- win4.move(2, 1)
- win4.clrtobot()
- win4.box()
- elif k == curses.KEY_F4:
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- start_time = time.time()
- win1.addstr(3, 1, " Clearing input LOS and output LOL sticky bit ", WHITE)
- for i in plls.keys():
- plls[i].clear_lol_flg_bit()
- plls[i].clear_los_oof_flg_reg()
- win1.refresh()
- elif k== curses.KEY_F5:
- line = 3
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- for i in plls.keys():
- win1.addstr(line, 1, "Sending Hard reset to device "+devices[i])
- plls[i].hard_reset()
- line = line + 1
- win1.addstr(line, 1, "..... Done")
- line = line + 1
- win1.refresh()
- elif k== curses.KEY_F6:
- line = 3
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- for i in plls.keys():
- win1.addstr(line, 1, "Sending Soft reset to device "+devices[i])
- plls[i].soft_reset()
- line = line + 1
- win1.addstr(line, 1, "..... Done")
- line = line + 1
- win1.refresh()
- elif k== curses.KEY_F7:
- y_max, x_max = win1.getmaxyx()
- win1.move(2, 1)
- win1.clrtobot()
- win1.box()
- win1.addstr(2, 1, " Initializing INTR masks ", WHITE)
- line = 3
- col = 1
- for i in plls.keys():
- plls[i].init_mask_values()
- win1.addstr(line, 1, devices[i])
- masks = plls[i].read_mask_values()
- for mask in sorted(masks.keys()):
- win1.addstr(line, col, mask + " : " + str(masks[mask]))
- line = line + 1
- col = col + x_max / 3
- line = 3
-
-
-
- # cursor_x = max (0, cursor_x)
- # cursor_x = min (width - 1, cursor_x)
- #
- # cursor_y = max (0, cursor_y)
- # cursor_y = min (height - 1, cursor_y)
-
- # Refresh windows with pll information
- pll_window(pll_si5345_1, devices[1], fpga, freq[1], conf[1], win2)
- pll_window(pll_si5345_2, devices[2], fpga, freq[2], conf[2], win3)
- pll_window(pll_si5344 , devices[3], fpga, freq[3], conf[3], win4)
- fanout_window(fpga, win5)
-
-
- # Refresh the screen
- #stdscr.refresh ()
-
- # Wait for next input
- stdscr.nodelay (True)
- k = stdscr.getch ()
-
-
-def main():
- if (len(sys.argv) != 2):
- print "Missing argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot = 0 or 2"
- exit()
- elif (sys.argv[1] == "0"):
- print
- print "===== Target board = 0"
- dev = 0
- elif (sys.argv[1] == "2"):
- print
- print "===== Target board = 2"
- dev = 2
- else:
- print "Wrong argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot = 0 or 2"
- exit()
- curses.wrapper (draw_menu, dev)
-
-
-if __name__ == "__main__":
-
- size = subprocess.Popen("stty size", shell=True, stdout=subprocess.PIPE).stdout
- result = size.read()
- result = result.replace("\n","")
- y = int(result.split(" ")[0])
- x = int(result.split(" ")[1])
- print "x =" , x
- print "y =" , y
- if x < 180 or y < 53:
- print "Decrease police size by typing \"ctrl -\" and rerun"
- quit()
-
-
- main ()
diff --git a/Scripts/readPLLRegister.py b/Scripts/readPLLRegister.py
deleted file mode 100755
index d215b8c7cb9d38b261b2c989d3aa9399af8bc715..0000000000000000000000000000000000000000
--- a/Scripts/readPLLRegister.py
+++ /dev/null
@@ -1,68 +0,0 @@
-"""
- readPLLRegister.py -- module to read external PLLs registers via i2c
-
- Author
- PR: First version
-
-"""
-import time
-import os
-import pathtocomponents
-import sys
-
-
-from fpga_comp import Arria10
-from si534x_comp import Si534x
-from xcvr_comp import xcvr
-
-
-def main():
- if (len(sys.argv) != 2):
- print "Missing argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot"
- exit()
- elif (sys.argv[1] == "0"):
- print
- print "===== Target board = 0"
- dev = 0
- elif (sys.argv[1] == "2"):
- print
- print "===== Target board = 2"
- dev = 2
- else:
- print "Wrong argument"
- print "Syntax : config_PLLs <Nb_of_card> where Nb_of_pcie_slot = 0 or 2"
- exit()
-
- # Program PLLs
- devices = \
- {1: "SI5345_U23",
- 2: "SI5345_U48",
- 3: "SI5344_U54"
- }
- ports = \
- {1: [0, 1, 2, 3],
- 2: [0, 1, 3, 4, 8],
- 3: [0, 1]
- }
-
- #dev = 0 # Creates a list of objects with the 3 PLLs
- add = 0x68
- pll = [Si534x(dev, bus, add) for bus in devices.keys()]
- print
-
- for i in devices.keys(): # programs the 3 PLLs
- print "-----------------------------------------------"
- status, val = pll[i-1].read_part_number()
- print "..... Type of chip =", format(val,'x')
- status, val = pll[i-1].read_device_revision()
- print "..... Revision =", val
-
- print "-----------------------------------------------"
-
-
- # Measure clocks
-
-
-if __name__ == "__main__":
- main()
diff --git a/Scripts/testB2L.py b/Scripts/testB2L.py
deleted file mode 100644
index 386e4ee37118d54a41620c8e111ecbf0cd3888be..0000000000000000000000000000000000000000
--- a/Scripts/testB2L.py
+++ /dev/null
@@ -1,117 +0,0 @@
-from lli import mem_multi as mem
-
-nErr = 0
-
-import os
-
-CRC16_XMODEM_TABLE = [
- 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
- 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
- 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
- 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
- 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
- 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
- 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
- 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
- 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
- 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
- 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
- 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
- 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
- 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
- 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
- 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
- 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
- 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
- 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
- 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
- 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
- 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
- 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
- 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
- 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
- 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
- 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
- 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
- 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
- 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
- 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
- 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
- ]
-
-
-def _crc16(data, crc, table):
- """Calculate CRC16 using the given table.
- `data` - data for calculating CRC, must be a string
- `crc` - initial value
- `table` - table for caclulating CRC (list of 256 integers)
- Return calculated value of CRC
- """
- for byte in data:
- byte1 = byte & 0xFF
- byte2 = ( byte & 0xFF00 ) >> 8
- crc = ((crc<<8)&0xff00) ^ table[((crc>>8)&0xff)^byte2]
- crc = ((crc<<8)&0xff00) ^ table[((crc>>8)&0xff)^byte1]
- return crc & 0xffff
-
-import socket
-hname = socket.gethostname()
-
-for nev in range( 10 ):
-
- # Send trigger (adapt this line to your system)
- if ( hname == 'belle2daq.local' ):
- os.system( "ssh vme \"trigft -80 pulse 1 1\"" ) ### ADD this to suppress output >/dev/null 2>&1" )
- else: ### KEK
- os.system( "ssh ttd3 \"trigft -23 pulse 1 1\"" )
-
- # wait for data to arrive
- size = 0
- ## temporisation of 2s
- import time
- time.sleep( 2 )
- status, val = mem.read( 0 , 0x00050080)
- size = val
-
- print "Number of words received = {0}".format( size )
-
- if size == 0:
- print 'Not enough data read, exit'
- exit( 0 )
-
- # read data
-
- data = []
- data_crc = []
-
- for i in range( size / 2 + 1 ):
- status, val = mem.read( 0 , 0x00050060 )
- data.append( ( ( val & 0xFFFF ) << 16 ) | ( ( val & 0xFFFF0000 ) >> 16 ) )
- if ( i <= size / 2 - 3) :
- data_crc.append( ( val & 0xFFFF ) )
- data_crc.append( ( val & 0xFFFF0000 ) >> 16 )
-
- # Display data:
- print '==================================='
- print 'B2L: {0:08x}'.format(data[0])
- print 'B2L: {0:08x}'.format(data[1])
- print 'B2L: {0:08x}'.format(data[2])
- print 'B2L: {0:08x}'.format(data[3])
- print 'B2L: {0:08x}'.format(data[4])
- print '-----------------------------------'
- print 'FEE: data #0 {0:08x}'.format(data[5])
- print 'FEE: data #1 {0:08x}'.format(data[6])
- print 'FEE: ..........'
- print 'FEE: data #{0} {1:08x}'.format(size/2-7,data[size/2-3])
- print '-----------------------------------'
- print 'B2L: {0:08x}'.format(data[size/2-2])
- print 'B2L: {0:08x}'.format(data[size/2-1])
- print '==================================='
- print ''
- print 'CRC = {0:04x}'.format(data[size/2]&0xFFFF)
- print 'Computed CRC {0:04x}'.format(_crc16( data_crc, 0xffff , CRC16_XMODEM_TABLE ) )
- if ( data[size/2-1]&0xFFFF ) != ( _crc16( data_crc, 0xffff , CRC16_XMODEM_TABLE ) ):
- print 'Error in CRC comparison'
- nErr = nErr + 1
-
-print 'number of errors = {0}'.format( nErr )