From 6227278927078c580a6a9c94fa59a6715e705439 Mon Sep 17 00:00:00 2001
From: ROBBE Patrick <robbe@lal.in2p3.fr>
Date: Mon, 13 Jan 2020 14:35:24 +0100
Subject: [PATCH] Add program to read FPGA version
---
.gitignore | 1 +
Pcie40Applications/Makefile | 7 ++++
.../main_pcie40_readFPGAversion.c | 40 +++++++++++++++++++
3 files changed, 48 insertions(+)
create mode 100644 Pcie40Applications/main_pcie40_readFPGAversion.c
diff --git a/.gitignore b/.gitignore
index 65c88a7..dbaa898 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,6 +31,7 @@ Pcie40Applications/pcie40_dma
Pcie40Applications/pcie40_b2linkreset
Pcie40Applications/pcie40_daq
Pcie40Applications/pcie40_ul
+Pcie40Applications/pcie40_readFPGAversion
*.d
**/pcie40_reload.out
diff --git a/Pcie40Applications/Makefile b/Pcie40Applications/Makefile
index 2d2eab2..19bfd05 100644
--- a/Pcie40Applications/Makefile
+++ b/Pcie40Applications/Makefile
@@ -51,6 +51,12 @@ PCIE40_UL_CFLAGS =$(CFLAGS) -I$(TOP) -I$(TOP)/../Pcie40Driver
PCIE40_UL_INSTALL =$(PREFIX)/bin
PCIE40_UL_LDFLAGS = -L../Pcie40Libraries/lib -lpcie40 -L../Pcie40DriverLibraries/ -lpcie40driver_ecs
+PCIE40_READFPGAVERSION :=pcie40_readFPGAversion
+PCIE40_READFPGAVERSION_OBJS =main_pcie40_readFPGAversion.o
+PCIE40_READFPGAVERSION_CFLAGS =$(CFLAGS) -I$(TOP) -I$(TOP)/../Pcie40Driver -I$(TOP)/../Pcie40DriverLibraries
+PCIE40_READFPGAVERSION_INSTALL =$(PREFIX)/bin
+PCIE40_READFPGAVERSION_LDFLAGS = -L../Pcie40Libraries/lib -lpcie40 -L../Pcie40DriverLibraries/ -lpcie40driver_ecs
+
VPATH :=$(TOP)
include $(TOP)/rules.mk
@@ -62,6 +68,7 @@ $(eval $(call ODIR_template,PCIE40_B2LRESET))
$(eval $(call ODIR_template,PCIE40_DMA))
$(eval $(call ODIR_template,PCIE40_DAQ))
$(eval $(call ODIR_template,PCIE40_UL))
+$(eval $(call ODIR_template,PCIE40_READFPGAVERSION))
$(eval $(call COPY_template,SCRIPTS,755))
$(eval $(call LINK_template,PCIE40_RELOAD))
$(eval $(call ODIR_template,PCIE40_RELOAD_SUID))
diff --git a/Pcie40Applications/main_pcie40_readFPGAversion.c b/Pcie40Applications/main_pcie40_readFPGAversion.c
new file mode 100644
index 0000000..625bfc1
--- /dev/null
+++ b/Pcie40Applications/main_pcie40_readFPGAversion.c
@@ -0,0 +1,40 @@
+/****************************************************************************************//**
+* \file readFPGAMemoire.c
+*
+* lecture de la memore du FPGA
+* la taille est de x octets
+* l'adresse de depart de lecture vaut 0
+*//********************************************************************************************/
+#include <stdio.h>
+#include <stdlib.h>
+#include <getopt.h>
+#include "ecs_driverlib.h"
+
+#define SIZE_MEMO_FPGA 220 /* taille max de la memoire interne FPG */
+
+int main(int argc, char *argv[]){
+ int board = 0;
+ int i;
+ unsigned val;
+ int reg = 0;
+ char contenuMemoireFPGA[SIZE_MEMO_FPGA + 1];
+
+ ecs_openLli(board);
+ for(i=0; i < SIZE_MEMO_FPGA; i++)
+ {
+ if (ecs_iordLli(board, reg, &val)!=0)
+ {
+ printf("LLI bar2 Read fails at 0x%08x\n", reg);
+ exit(0);
+ }
+
+ contenuMemoireFPGA[i] = val;
+ reg += 4;
+
+ }
+ contenuMemoireFPGA[SIZE_MEMO_FPGA+1] = '\0';
+ printf("contenu memoire FPGA %s\n",contenuMemoireFPGA);
+ ecs_closeLli(board);
+ return 0;
+}
+
--
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