diff --git a/Pcie40Applications/regconfig.cpp b/Pcie40Applications/regconfig.cpp
index 882860ee456bc610dc82f8eabe4b4486472935aa..be502191ca5a48e9136b542ca9b5f567a97e6695 100644
--- a/Pcie40Applications/regconfig.cpp
+++ b/Pcie40Applications/regconfig.cpp
@@ -337,44 +337,47 @@ int main(int argc, char** argv){
// open pcie40 device driver for current process
ecs_open( dev_slot , SLC_BAR );
-
+ pcie40reg_t pcie40;
int result = -1;
- if(USE_FEE8 && READ_ONLY){
- result = pcie40_readfee8( dev_slot , ch , addr );
- printf("reg%04x = %08x\n", addr, result);
- }else if(USE_FEE8 && WRITE){
- result = pcie40_writefee8( dev_slot , ch , addr, data );
- if(result == 0)
- printf("Write 0x%04x to register 0x%04x\n", data, addr);
- else
- printf("ERROR: Failed to write 0x%04x to register 0x%04x\n", data, addr);
- }else if(USE_FEE32 && READ_ONLY){
- result = pcie40_readfee32( dev_slot , ch , addr );
- printf("reg%04x = %08x\n", addr, result);
- }else if(USE_FEE32 && WRITE){
- result = pcie40_writefee32( dev_slot , ch , addr, data );
- if(result == 0)
- printf("Write 0x%08x to register 0x%04x\n", data, addr);
- else
- printf("ERROR: Failed to write 0x%08x to register %04x\n", data, addr);
- }else if(STREAM){
- if(STREAM_ARICH)
- result = pcie40_writestream_arich( dev_slot , ch , filename ) ;
- else
- result = pcie40_writestream_klm( dev_slot , ch , filename ) ;
- if(result == 0)
- std::cerr<<"Succeed streaming file: " << filename << std::endl;
- else
- std::cerr<<"ERROR: Failed streaming file: " << filename << std::endl;
- }
-
- //This is only frame for register operation in the furture
- if(OP_FLAG){
- unsigned int op_addr = hsreg( operation );
+ if(pcie40_b2l_status(dev_slot, ch) && pcie40_b2l_rxready(dev_slot, ch) && pcie40_b2l_txready(dev_slot, ch)){
+ if(USE_FEE8 && READ_ONLY){
+ result = pcie40_readfee8( dev_slot , ch , addr );
+ printf("reg%04x = %08x\n", addr, result);
+ }else if(USE_FEE8 && WRITE){
+ result = pcie40_writefee8( dev_slot , ch , addr, data );
+ if(result == 0)
+ printf("Write 0x%04x to register 0x%04x\n", data, addr);
+ else
+ printf("ERROR: Failed to write 0x%04x to register 0x%04x\n", data, addr);
+ }else if(USE_FEE32 && READ_ONLY){
+ result = pcie40_readfee32( dev_slot , ch , addr );
+ printf("reg%04x = %08x\n", addr, result);
+ }else if(USE_FEE32 && WRITE){
+ result = pcie40_writefee32( dev_slot , ch , addr, data );
+ if(result == 0)
+ printf("Write 0x%08x to register 0x%04x\n", data, addr);
+ else
+ printf("ERROR: Failed to write 0x%08x to register %04x\n", data, addr);
+ }else if(STREAM){
+ if(STREAM_ARICH)
+ result = pcie40_writestream_arich( dev_slot , ch , filename ) ;
+ else
+ result = pcie40_writestream_klm( dev_slot , ch , filename ) ;
+ if(result == 0)
+ std::cerr<<"Succeed streaming file: " << filename << std::endl;
+ else
+ std::cerr<<"ERROR: Failed streaming file: " << filename << std::endl;
+ }
+
+ //This is only frame for register operation in the furture
+ if(OP_FLAG){
+ unsigned int op_addr = hsreg( operation );
pcie40_op(dev_slot, ch, op_addr, addr, data);
+ }
+ }else{
+ printf("ERROR: b2link-%02d is down or not ready\n", ch);
}
-
// close pcie40 device driver for current process
ecs_close( dev_slot , SLC_BAR) ;
diff --git a/Pcie40Applications/statlink.cpp b/Pcie40Applications/statlink.cpp
index 2c60e53cc37f0b8c5a6be53e2940a8519afd48e5..17109f21f349b8c27d7613775691822a61cf8840 100644
--- a/Pcie40Applications/statlink.cpp
+++ b/Pcie40Applications/statlink.cpp
@@ -21,7 +21,7 @@
extern "C" int ecs_open(int dev, int bar);
extern "C" void ecs_close(int dev, int bar);
-//#define PCIE_DEV 0
+
#define MAX_NUM_CH 48
#define MAX_SLOT 3
#define SLC_BAR 2
@@ -151,32 +151,35 @@ readregs(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
int o_readonly = 1;
int notfound = 1;
- // for (i=0; i<48; i++) {
+ for (i=0; i<48; i++) {
pcie40reg_t *pcie = &pcie40reg[i];
memset(pcie, 0, sizeof(*pcie));
- // if (!link_mask[i]) continue;
+ if (!link_mask[i]) continue;
- pcie->xbusy = pcie40_readfee32(dev_slot, ch, PCIE40REG_CCLK);
- pcie->conf = pcie40_readfee32(dev_slot, ch, PCIE40REG_CONF);
-
- pcie->pcie40ver = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VER); /* 81 */
- pcie->rxdata = pcie40_readfee32(dev_slot, ch, PCIE40REGL_RXDATA); /* 84 */
- pcie->eventsz = pcie40_readfee32(dev_slot, ch, PCIE40REGL_EVENTSZ); /* 85 */
- pcie->nevent = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NEVENT); /* 86 */
- pcie->nkbyte = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NKBYTE); /* 87 */
- pcie->nword = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NWORD); /* 88 */
- pcie->vetoset = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOSET); /* 89 */
- pcie->vetocnt = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOCNT); /* 8a */
- pcie->vetobuf[0] = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOBUF0); /* 8b */
- pcie->vetobuf[1] = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOBUF1); /* 8c */
-
- pcie->feeser = 0xffff;
- pcie->feever = 0xffff;
- if ( pcie40_b2l_status(dev_slot, i) ) {
- getfee(pcie);
- }
-
- // }
+ if ( !pcie40_b2l_status(dev_slot, i) ) {
+ printf("b2link-%02d is down\n", i);
+ continue;
+ }
+ pcie->xbusy = pcie40_readfee32(dev_slot, ch, PCIE40REG_CCLK);
+ pcie->conf = pcie40_readfee32(dev_slot, ch, PCIE40REG_CONF);
+
+ pcie->pcie40ver = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VER); /* 81 */
+ pcie->rxdata = pcie40_readfee32(dev_slot, ch, PCIE40REGL_RXDATA); /* 84 */
+ pcie->eventsz = pcie40_readfee32(dev_slot, ch, PCIE40REGL_EVENTSZ); /* 85 */
+ pcie->nevent = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NEVENT); /* 86 */
+ pcie->nkbyte = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NKBYTE); /* 87 */
+ pcie->nword = pcie40_readfee32(dev_slot, ch, PCIE40REGL_NWORD); /* 88 */
+ pcie->vetoset = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOSET); /* 89 */
+ pcie->vetocnt = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOCNT); /* 8a */
+ pcie->vetobuf[0] = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOBUF0); /* 8b */
+ pcie->vetobuf[1] = pcie40_readfee32(dev_slot, ch, PCIE40REGL_VETOBUF1); /* 8c */
+
+ pcie->feeser = 0xffff;
+ pcie->feever = 0xffff;
+ if ( pcie40_b2l_status(dev_slot, i) ) {
+ getfee(pcie);
+ }
+ }
return notfound;
}
@@ -196,22 +199,22 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
char prompt[128];
if (!link_mask[i]) continue;
-
+
quiet = 0;
if (! first) printf("\n");
first =0;
sprintf(prompt, "(%02d) ", i);
- if ( !pcie40_b2l_status(dev_slot, i) ) {
- printf("b2link is down\n");
- } else if (pcie->feeser & 0x8000) {
- printf("fee info is not available\n");
- } else {
- printf("%s serial %d version %d\n",
- feename(pcie->feehw, pcie->feefw), pcie->feeser, pcie->feever);
+ if ( pcie40_b2l_status(dev_slot, i) ) {
+
+ if (pcie->feeser & 0x8000) {
+ printf("fee info is not available\n");
+ } else {
+ printf("%s serial %d version %d\n",
+ feename(pcie->feehw, pcie->feefw), pcie->feeser, pcie->feever);
+ }
}
-
printf("%s", prompt);
printf("b2l=%s (rx=%s tx=%s rxsta=%s txsta=%s mask=%s)\n",
pcie40_b2l_status(dev_slot, i)?"UP":"DOWN",
@@ -223,10 +226,9 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
printf("%s", prompt);
- printf("%s", prompt);
printf("rxdata=%04x rxlinkdown=%d rxcrcerr=%d feecrcerr=%d\n",
- D(pcie->rxdata,15,0), D(pcie->rxdata,31,24), D(pcie->rxdata,23,16),
- pcie->feecrce);
+ D(pcie->rxdata,15,0), D(pcie->rxdata,31,24), D(pcie->rxdata,23,16),
+ pcie->feecrce);
printf("%s", prompt);
total = (pcie->nkbyte * 256.0 + (pcie->nword & 0xff)) * 4.0;
printf("event=%d total=%1.0fkB", pcie->nevent, total / 1000);
@@ -234,14 +236,14 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
double avg = total / pcie->nevent;
printf(" (avg=%1.0fB", avg);
if (D(pcie->eventsz,31,16) == 0xffff) {
- printf(" last=oflow");
+ printf(" last=oflow");
} else {
- printf(" last=%dB", D(pcie->eventsz,31,16)*4);
+ printf(" last=%dB", D(pcie->eventsz,31,16)*4);
}
if (D(pcie->eventsz,15,0) == 0xffff) {
- printf(" max=oflow)");
+ printf(" max=oflow)");
} else {
- printf(" max=%dB)", D(pcie->eventsz,15,0)*4);
+ printf(" max=%dB)", D(pcie->eventsz,15,0)*4);
}
}
printf("\n");
@@ -253,19 +255,20 @@ statlink(std::bitset<48> link_mask, pcie40reg_t pcie40reg[])
printf("no b2link error");
} else {
printf("b2link error %d(%c) %d(%c) %c%02x %c%02x %c%02x %c%02x %c%02x %c%02x",
- D(pcie->vetocnt,31,16),
- B(pcie->vetoset,1) ? 'i' : '-',
- D(pcie->vetocnt,15,0),
- B(pcie->vetoset,0) ? 'd' : '-',
- B(pcie->vetobuf[0],25)?'K':'D', D(pcie->vetobuf[0],15,8),
- B(pcie->vetobuf[0],24)?'K':'D', D(pcie->vetobuf[0],7,0),
- B(pcie->vetobuf[0],21)?'K':'D', D(pcie->vetobuf[1],31,24),
- B(pcie->vetobuf[0],20)?'K':'D', D(pcie->vetobuf[1],23,16),
- B(pcie->vetobuf[0],17)?'K':'D', D(pcie->vetobuf[1],15,8),
- B(pcie->vetobuf[0],16)?'K':'D', D(pcie->vetobuf[1],7,0));
+ D(pcie->vetocnt,31,16),
+ B(pcie->vetoset,1) ? 'i' : '-',
+ D(pcie->vetocnt,15,0),
+ B(pcie->vetoset,0) ? 'd' : '-',
+ B(pcie->vetobuf[0],25)?'K':'D', D(pcie->vetobuf[0],15,8),
+ B(pcie->vetobuf[0],24)?'K':'D', D(pcie->vetobuf[0],7,0),
+ B(pcie->vetobuf[0],21)?'K':'D', D(pcie->vetobuf[1],31,24),
+ B(pcie->vetobuf[0],20)?'K':'D', D(pcie->vetobuf[1],23,16),
+ B(pcie->vetobuf[0],17)?'K':'D', D(pcie->vetobuf[1],15,8),
+ B(pcie->vetobuf[0],16)?'K':'D', D(pcie->vetobuf[1],7,0));
}
printf("\n");
}
+
if (quiet) {
printf("no PCIE40 was found.\n");
@@ -285,7 +288,8 @@ int main(int argc, char** argv){
ecs_open( dev_slot , SLC_BAR );
printf("statlink version %d (%d) / ", VERSION, MOD_DATE);
- statpice40(pcie40);
+ statpice40(pcie40);
+
readregs(link_mask, pcie40reg);
statlink(link_mask, pcie40reg);